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swr: [rasterizer] Cleanup naming of codegen files
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "gen_state_llvm.h"
33
34 #include "gallivm/lp_bld_tgsi.h"
35 #include "util/u_format.h"
36
37 #include "util/u_memory.h"
38 #include "util/u_inlines.h"
39 #include "util/u_helpers.h"
40 #include "util/u_framebuffer.h"
41 #include "util/u_viewport.h"
42
43 #include "swr_state.h"
44 #include "swr_context.h"
45 #include "gen_swr_context_llvm.h"
46 #include "swr_screen.h"
47 #include "swr_resource.h"
48 #include "swr_tex_sample.h"
49 #include "swr_scratch.h"
50 #include "swr_shader.h"
51 #include "swr_fence.h"
52
53 /* These should be pulled out into separate files as necessary
54 * Just initializing everything here to get going. */
55
56 static void *
57 swr_create_blend_state(struct pipe_context *pipe,
58 const struct pipe_blend_state *blend)
59 {
60 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
61
62 memcpy(&state->pipe, blend, sizeof(*blend));
63
64 struct pipe_blend_state *pipe_blend = &state->pipe;
65
66 for (int target = 0;
67 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
68 target++) {
69
70 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
71 SWR_RENDER_TARGET_BLEND_STATE &blendState =
72 state->blendState.renderTarget[target];
73 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
74 state->compileState[target];
75
76 if (target != 0 && !pipe_blend->independent_blend_enable) {
77 memcpy(&compileState,
78 &state->compileState[0],
79 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
80 continue;
81 }
82
83 compileState.blendEnable = rt_blend->blend_enable;
84 if (compileState.blendEnable) {
85 compileState.sourceAlphaBlendFactor =
86 swr_convert_blend_factor(rt_blend->alpha_src_factor);
87 compileState.destAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
89 compileState.sourceBlendFactor =
90 swr_convert_blend_factor(rt_blend->rgb_src_factor);
91 compileState.destBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
93
94 compileState.colorBlendFunc =
95 swr_convert_blend_func(rt_blend->rgb_func);
96 compileState.alphaBlendFunc =
97 swr_convert_blend_func(rt_blend->alpha_func);
98 }
99 compileState.logicOpEnable = state->pipe.logicop_enable;
100 if (compileState.logicOpEnable) {
101 compileState.logicOpFunc =
102 swr_convert_logic_op(state->pipe.logicop_func);
103 }
104
105 blendState.writeDisableRed =
106 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
107 blendState.writeDisableGreen =
108 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
109 blendState.writeDisableBlue =
110 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
111 blendState.writeDisableAlpha =
112 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
113
114 if (rt_blend->colormask == 0)
115 compileState.blendEnable = false;
116 }
117
118 return state;
119 }
120
121 static void
122 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
123 {
124 struct swr_context *ctx = swr_context(pipe);
125
126 if (ctx->blend == blend)
127 return;
128
129 ctx->blend = (swr_blend_state *)blend;
130
131 ctx->dirty |= SWR_NEW_BLEND;
132 }
133
134 static void
135 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
136 {
137 FREE(blend);
138 }
139
140 static void
141 swr_set_blend_color(struct pipe_context *pipe,
142 const struct pipe_blend_color *color)
143 {
144 struct swr_context *ctx = swr_context(pipe);
145
146 ctx->blend_color = *color;
147
148 ctx->dirty |= SWR_NEW_BLEND;
149 }
150
151 static void
152 swr_set_stencil_ref(struct pipe_context *pipe,
153 const struct pipe_stencil_ref *ref)
154 {
155 struct swr_context *ctx = swr_context(pipe);
156
157 ctx->stencil_ref = *ref;
158
159 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
160 }
161
162 static void *
163 swr_create_depth_stencil_state(
164 struct pipe_context *pipe,
165 const struct pipe_depth_stencil_alpha_state *depth_stencil)
166 {
167 struct pipe_depth_stencil_alpha_state *state;
168
169 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
170 sizeof *depth_stencil);
171
172 return state;
173 }
174
175 static void
176 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
177 {
178 struct swr_context *ctx = swr_context(pipe);
179
180 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
181 return;
182
183 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
184
185 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
186 }
187
188 static void
189 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
190 {
191 FREE(depth);
192 }
193
194
195 static void *
196 swr_create_rasterizer_state(struct pipe_context *pipe,
197 const struct pipe_rasterizer_state *rast)
198 {
199 struct pipe_rasterizer_state *state;
200 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
201
202 return state;
203 }
204
205 static void
206 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
207 {
208 struct swr_context *ctx = swr_context(pipe);
209 const struct pipe_rasterizer_state *rasterizer =
210 (const struct pipe_rasterizer_state *)handle;
211
212 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
213 return;
214
215 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
216
217 ctx->dirty |= SWR_NEW_RASTERIZER;
218 }
219
220 static void
221 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
222 {
223 FREE(rasterizer);
224 }
225
226
227 static void *
228 swr_create_sampler_state(struct pipe_context *pipe,
229 const struct pipe_sampler_state *sampler)
230 {
231 struct pipe_sampler_state *state =
232 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
233
234 return state;
235 }
236
237 static void
238 swr_bind_sampler_states(struct pipe_context *pipe,
239 enum pipe_shader_type shader,
240 unsigned start,
241 unsigned num,
242 void **samplers)
243 {
244 struct swr_context *ctx = swr_context(pipe);
245 unsigned i;
246
247 assert(shader < PIPE_SHADER_TYPES);
248 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
249
250 /* set the new samplers */
251 ctx->num_samplers[shader] = num;
252 for (i = 0; i < num; i++) {
253 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
254 }
255
256 ctx->dirty |= SWR_NEW_SAMPLER;
257 }
258
259 static void
260 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
261 {
262 FREE(sampler);
263 }
264
265
266 static struct pipe_sampler_view *
267 swr_create_sampler_view(struct pipe_context *pipe,
268 struct pipe_resource *texture,
269 const struct pipe_sampler_view *templ)
270 {
271 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
272
273 if (view) {
274 *view = *templ;
275 view->reference.count = 1;
276 view->texture = NULL;
277 pipe_resource_reference(&view->texture, texture);
278 view->context = pipe;
279 }
280
281 return view;
282 }
283
284 static void
285 swr_set_sampler_views(struct pipe_context *pipe,
286 enum pipe_shader_type shader,
287 unsigned start,
288 unsigned num,
289 struct pipe_sampler_view **views)
290 {
291 struct swr_context *ctx = swr_context(pipe);
292 uint i;
293
294 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
295
296 assert(shader < PIPE_SHADER_TYPES);
297 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
298
299 /* set the new sampler views */
300 ctx->num_sampler_views[shader] = num;
301 for (i = 0; i < num; i++) {
302 /* Note: we're using pipe_sampler_view_release() here to work around
303 * a possible crash when the old view belongs to another context that
304 * was already destroyed.
305 */
306 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
307 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
308 views[i]);
309 }
310
311 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
312 }
313
314 static void
315 swr_sampler_view_destroy(struct pipe_context *pipe,
316 struct pipe_sampler_view *view)
317 {
318 pipe_resource_reference(&view->texture, NULL);
319 FREE(view);
320 }
321
322 static void *
323 swr_create_vs_state(struct pipe_context *pipe,
324 const struct pipe_shader_state *vs)
325 {
326 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
327 if (!swr_vs)
328 return NULL;
329
330 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
331 swr_vs->pipe.stream_output = vs->stream_output;
332
333 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
334
335 swr_vs->soState = {0};
336
337 if (swr_vs->pipe.stream_output.num_outputs) {
338 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
339
340 swr_vs->soState.soEnable = true;
341 // soState.rasterizerDisable set on state dirty
342 // soState.streamToRasterizer not used
343
344 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
345 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
346 1 << (stream_output->output[i].register_index - 1);
347 }
348 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
349 swr_vs->soState.streamNumEntries[i] =
350 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
351 }
352 }
353
354 return swr_vs;
355 }
356
357 static void
358 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
359 {
360 struct swr_context *ctx = swr_context(pipe);
361
362 if (ctx->vs == vs)
363 return;
364
365 ctx->vs = (swr_vertex_shader *)vs;
366 ctx->dirty |= SWR_NEW_VS;
367 }
368
369 static void
370 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
371 {
372 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
373 FREE((void *)swr_vs->pipe.tokens);
374 struct swr_screen *screen = swr_screen(pipe->screen);
375
376 /* Defer deletion of vs state */
377 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
378 }
379
380 static void *
381 swr_create_fs_state(struct pipe_context *pipe,
382 const struct pipe_shader_state *fs)
383 {
384 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
385 if (!swr_fs)
386 return NULL;
387
388 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
389
390 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
391
392 return swr_fs;
393 }
394
395
396 static void
397 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
398 {
399 struct swr_context *ctx = swr_context(pipe);
400
401 if (ctx->fs == fs)
402 return;
403
404 ctx->fs = (swr_fragment_shader *)fs;
405 ctx->dirty |= SWR_NEW_FS;
406 }
407
408 static void
409 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
410 {
411 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
412 FREE((void *)swr_fs->pipe.tokens);
413 struct swr_screen *screen = swr_screen(pipe->screen);
414
415 /* Defer deleton of fs state */
416 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
417 }
418
419 static void *
420 swr_create_gs_state(struct pipe_context *pipe,
421 const struct pipe_shader_state *gs)
422 {
423 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
424 if (!swr_gs)
425 return NULL;
426
427 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
428
429 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
430
431 return swr_gs;
432 }
433
434
435 static void
436 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
437 {
438 struct swr_context *ctx = swr_context(pipe);
439
440 if (ctx->gs == gs)
441 return;
442
443 ctx->gs = (swr_geometry_shader *)gs;
444 ctx->dirty |= SWR_NEW_GS;
445 }
446
447 static void
448 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
449 {
450 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
451 FREE((void *)swr_gs->pipe.tokens);
452 struct swr_screen *screen = swr_screen(pipe->screen);
453
454 /* Defer deleton of fs state */
455 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
456 }
457
458 static void
459 swr_set_constant_buffer(struct pipe_context *pipe,
460 enum pipe_shader_type shader,
461 uint index,
462 const struct pipe_constant_buffer *cb)
463 {
464 struct swr_context *ctx = swr_context(pipe);
465 struct pipe_resource *constants = cb ? cb->buffer : NULL;
466
467 assert(shader < PIPE_SHADER_TYPES);
468 assert(index < ARRAY_SIZE(ctx->constants[shader]));
469
470 /* note: reference counting */
471 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
472
473 if (shader == PIPE_SHADER_VERTEX) {
474 ctx->dirty |= SWR_NEW_VSCONSTANTS;
475 } else if (shader == PIPE_SHADER_FRAGMENT) {
476 ctx->dirty |= SWR_NEW_FSCONSTANTS;
477 } else if (shader == PIPE_SHADER_GEOMETRY) {
478 ctx->dirty |= SWR_NEW_GSCONSTANTS;
479 }
480
481 if (cb && cb->user_buffer) {
482 pipe_resource_reference(&constants, NULL);
483 }
484 }
485
486
487 static void *
488 swr_create_vertex_elements_state(struct pipe_context *pipe,
489 unsigned num_elements,
490 const struct pipe_vertex_element *attribs)
491 {
492 struct swr_vertex_element_state *velems;
493 assert(num_elements <= PIPE_MAX_ATTRIBS);
494 velems = new swr_vertex_element_state;
495 if (velems) {
496 velems->fsState.bVertexIDOffsetEnable = true;
497 velems->fsState.numAttribs = num_elements;
498 for (unsigned i = 0; i < num_elements; i++) {
499 // XXX: we should do this keyed on the VS usage info
500
501 const struct util_format_description *desc =
502 util_format_description(attribs[i].src_format);
503
504 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
505 velems->fsState.layout[i].Format =
506 mesa_to_swr_format(attribs[i].src_format);
507 velems->fsState.layout[i].StreamIndex =
508 attribs[i].vertex_buffer_index;
509 velems->fsState.layout[i].InstanceEnable =
510 attribs[i].instance_divisor != 0;
511 velems->fsState.layout[i].ComponentControl0 =
512 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
513 ? ComponentControl::StoreSrc
514 : ComponentControl::Store0;
515 velems->fsState.layout[i].ComponentControl1 =
516 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
517 ? ComponentControl::StoreSrc
518 : ComponentControl::Store0;
519 velems->fsState.layout[i].ComponentControl2 =
520 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
521 ? ComponentControl::StoreSrc
522 : ComponentControl::Store0;
523 velems->fsState.layout[i].ComponentControl3 =
524 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
525 ? ComponentControl::StoreSrc
526 : ComponentControl::Store1Fp;
527 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
528 velems->fsState.layout[i].InstanceDataStepRate =
529 attribs[i].instance_divisor;
530
531 /* Calculate the pitch of each stream */
532 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
533 mesa_to_swr_format(attribs[i].src_format));
534 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
535
536 if (attribs[i].instance_divisor != 0) {
537 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
538 uint32_t *min_instance_div =
539 &velems->min_instance_div[attribs[i].vertex_buffer_index];
540 if (!*min_instance_div ||
541 attribs[i].instance_divisor < *min_instance_div)
542 *min_instance_div = attribs[i].instance_divisor;
543 }
544 }
545 }
546
547 return velems;
548 }
549
550 static void
551 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
552 {
553 struct swr_context *ctx = swr_context(pipe);
554 struct swr_vertex_element_state *swr_velems =
555 (struct swr_vertex_element_state *)velems;
556
557 ctx->velems = swr_velems;
558 ctx->dirty |= SWR_NEW_VERTEX;
559 }
560
561 static void
562 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
563 {
564 struct swr_vertex_element_state *swr_velems =
565 (struct swr_vertex_element_state *) velems;
566 /* XXX Need to destroy fetch shader? */
567 delete swr_velems;
568 }
569
570
571 static void
572 swr_set_vertex_buffers(struct pipe_context *pipe,
573 unsigned start_slot,
574 unsigned num_elements,
575 const struct pipe_vertex_buffer *buffers)
576 {
577 struct swr_context *ctx = swr_context(pipe);
578
579 assert(num_elements <= PIPE_MAX_ATTRIBS);
580
581 util_set_vertex_buffers_count(ctx->vertex_buffer,
582 &ctx->num_vertex_buffers,
583 buffers,
584 start_slot,
585 num_elements);
586
587 ctx->dirty |= SWR_NEW_VERTEX;
588 }
589
590
591 static void
592 swr_set_index_buffer(struct pipe_context *pipe,
593 const struct pipe_index_buffer *ib)
594 {
595 struct swr_context *ctx = swr_context(pipe);
596
597 if (ib)
598 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
599 else
600 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
601
602 ctx->dirty |= SWR_NEW_VERTEX;
603 }
604
605 static void
606 swr_set_polygon_stipple(struct pipe_context *pipe,
607 const struct pipe_poly_stipple *stipple)
608 {
609 struct swr_context *ctx = swr_context(pipe);
610
611 ctx->poly_stipple = *stipple; /* struct copy */
612 ctx->dirty |= SWR_NEW_STIPPLE;
613 }
614
615 static void
616 swr_set_clip_state(struct pipe_context *pipe,
617 const struct pipe_clip_state *clip)
618 {
619 struct swr_context *ctx = swr_context(pipe);
620
621 ctx->clip = *clip;
622 /* XXX Unimplemented, but prevents crash */
623
624 ctx->dirty |= SWR_NEW_CLIP;
625 }
626
627
628 static void
629 swr_set_scissor_states(struct pipe_context *pipe,
630 unsigned start_slot,
631 unsigned num_viewports,
632 const struct pipe_scissor_state *scissor)
633 {
634 struct swr_context *ctx = swr_context(pipe);
635
636 ctx->scissor = *scissor;
637 ctx->swr_scissor.xmin = scissor->minx;
638 ctx->swr_scissor.xmax = scissor->maxx;
639 ctx->swr_scissor.ymin = scissor->miny;
640 ctx->swr_scissor.ymax = scissor->maxy;
641 ctx->dirty |= SWR_NEW_SCISSOR;
642 }
643
644 static void
645 swr_set_viewport_states(struct pipe_context *pipe,
646 unsigned start_slot,
647 unsigned num_viewports,
648 const struct pipe_viewport_state *vpt)
649 {
650 struct swr_context *ctx = swr_context(pipe);
651
652 ctx->viewport = *vpt;
653 ctx->dirty |= SWR_NEW_VIEWPORT;
654 }
655
656
657 static void
658 swr_set_framebuffer_state(struct pipe_context *pipe,
659 const struct pipe_framebuffer_state *fb)
660 {
661 struct swr_context *ctx = swr_context(pipe);
662
663 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
664
665 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
666 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
667
668 if (changed) {
669 util_copy_framebuffer_state(&ctx->framebuffer, fb);
670
671 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
672 }
673 }
674
675
676 static void
677 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
678 {
679 struct swr_context *ctx = swr_context(pipe);
680
681 if (sample_mask != ctx->sample_mask) {
682 ctx->sample_mask = sample_mask;
683 ctx->dirty |= SWR_NEW_RASTERIZER;
684 }
685 }
686
687 /*
688 * Update resource in-use status
689 * All resources bound to color or depth targets marked as WRITE resources.
690 * VBO Vertex/index buffers and texture views marked as READ resources.
691 */
692 void
693 swr_update_resource_status(struct pipe_context *pipe,
694 const struct pipe_draw_info *p_draw_info)
695 {
696 struct swr_context *ctx = swr_context(pipe);
697 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
698
699 /* colorbuffer targets */
700 if (fb->nr_cbufs)
701 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
702 if (fb->cbufs[i])
703 swr_resource_write(fb->cbufs[i]->texture);
704
705 /* depth/stencil target */
706 if (fb->zsbuf)
707 swr_resource_write(fb->zsbuf->texture);
708
709 /* VBO vertex buffers */
710 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
711 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
712 if (!vb->user_buffer)
713 swr_resource_read(vb->buffer);
714 }
715
716 /* VBO index buffer */
717 if (p_draw_info && p_draw_info->indexed) {
718 struct pipe_index_buffer *ib = &ctx->index_buffer;
719 if (!ib->user_buffer)
720 swr_resource_read(ib->buffer);
721 }
722
723 /* transform feedback buffers */
724 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
725 struct pipe_stream_output_target *target = ctx->so_targets[i];
726 if (target && target->buffer)
727 swr_resource_write(target->buffer);
728 }
729
730 /* texture sampler views */
731 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
732 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
733 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
734 if (view)
735 swr_resource_read(view->texture);
736 }
737 }
738
739 /* constant buffers */
740 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
741 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
742 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
743 if (cb->buffer)
744 swr_resource_read(cb->buffer);
745 }
746 }
747 }
748
749 static void
750 swr_update_texture_state(struct swr_context *ctx,
751 enum pipe_shader_type shader_type,
752 unsigned num_sampler_views,
753 swr_jit_texture *textures)
754 {
755 for (unsigned i = 0; i < num_sampler_views; i++) {
756 struct pipe_sampler_view *view =
757 ctx->sampler_views[shader_type][i];
758 struct swr_jit_texture *jit_tex = &textures[i];
759
760 memset(jit_tex, 0, sizeof(*jit_tex));
761 if (view) {
762 struct pipe_resource *res = view->texture;
763 struct swr_resource *swr_res = swr_resource(res);
764 SWR_SURFACE_STATE *swr = &swr_res->swr;
765 size_t *mip_offsets = swr_res->mip_offsets;
766 if (swr_res->has_depth && swr_res->has_stencil &&
767 !util_format_has_depth(util_format_description(view->format))) {
768 swr = &swr_res->secondary;
769 mip_offsets = swr_res->secondary_mip_offsets;
770 }
771
772 jit_tex->width = res->width0;
773 jit_tex->height = res->height0;
774 jit_tex->base_ptr = swr->pBaseAddress;
775 if (view->target != PIPE_BUFFER) {
776 jit_tex->first_level = view->u.tex.first_level;
777 jit_tex->last_level = view->u.tex.last_level;
778 if (view->target == PIPE_TEXTURE_3D)
779 jit_tex->depth = res->depth0;
780 else
781 jit_tex->depth =
782 view->u.tex.last_layer - view->u.tex.first_layer + 1;
783 jit_tex->base_ptr += view->u.tex.first_layer *
784 swr->qpitch * swr->pitch;
785 } else {
786 unsigned view_blocksize = util_format_get_blocksize(view->format);
787 jit_tex->base_ptr += view->u.buf.offset;
788 jit_tex->width = view->u.buf.size / view_blocksize;
789 jit_tex->depth = 1;
790 }
791
792 for (unsigned level = jit_tex->first_level;
793 level <= jit_tex->last_level;
794 level++) {
795 jit_tex->row_stride[level] = swr->pitch;
796 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
797 jit_tex->mip_offsets[level] = mip_offsets[level];
798 }
799 }
800 }
801 }
802
803 static void
804 swr_update_sampler_state(struct swr_context *ctx,
805 enum pipe_shader_type shader_type,
806 unsigned num_samplers,
807 swr_jit_sampler *samplers)
808 {
809 for (unsigned i = 0; i < num_samplers; i++) {
810 const struct pipe_sampler_state *sampler =
811 ctx->samplers[shader_type][i];
812
813 if (sampler) {
814 samplers[i].min_lod = sampler->min_lod;
815 samplers[i].max_lod = sampler->max_lod;
816 samplers[i].lod_bias = sampler->lod_bias;
817 COPY_4V(samplers[i].border_color, sampler->border_color.f);
818 }
819 }
820 }
821
822 static void
823 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
824 {
825 swr_draw_context *pDC = &ctx->swrDC;
826
827 const float **constant;
828 uint32_t *num_constants;
829 struct swr_scratch_space *scratch;
830
831 switch (shaderType) {
832 case PIPE_SHADER_VERTEX:
833 constant = pDC->constantVS;
834 num_constants = pDC->num_constantsVS;
835 scratch = &ctx->scratch->vs_constants;
836 break;
837 case PIPE_SHADER_FRAGMENT:
838 constant = pDC->constantFS;
839 num_constants = pDC->num_constantsFS;
840 scratch = &ctx->scratch->fs_constants;
841 break;
842 case PIPE_SHADER_GEOMETRY:
843 constant = pDC->constantGS;
844 num_constants = pDC->num_constantsGS;
845 scratch = &ctx->scratch->gs_constants;
846 break;
847 default:
848 debug_printf("Unsupported shader type constants\n");
849 return;
850 }
851
852 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
853 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
854 num_constants[i] = cb->buffer_size;
855 if (cb->buffer) {
856 constant[i] =
857 (const float *)(swr_resource_data(cb->buffer) +
858 cb->buffer_offset);
859 } else {
860 /* Need to copy these constants to scratch space */
861 if (cb->user_buffer && cb->buffer_size) {
862 const void *ptr =
863 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
864 uint32_t size = AlignUp(cb->buffer_size, 4);
865 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
866 constant[i] = (const float *)ptr;
867 }
868 }
869 }
870 }
871
872 static bool
873 swr_change_rt(struct swr_context *ctx,
874 unsigned attachment,
875 const struct pipe_surface *sf)
876 {
877 swr_draw_context *pDC = &ctx->swrDC;
878 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
879
880 /* Do nothing if the render target hasn't changed */
881 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
882 return false;
883
884 /* Deal with disabling RT up front */
885 if (!sf || !sf->texture) {
886 /* If detaching attachment, mark tiles as RESOLVED so core
887 * won't try to load from non-existent target. */
888 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
889 *rt = {0};
890 return true;
891 }
892
893 const struct swr_resource *swr = swr_resource(sf->texture);
894 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
895 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
896
897 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
898 swr_surface = &swr->secondary;
899 fmt = swr_surface->format;
900 }
901
902 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
903 rt->format == fmt &&
904 rt->lod == sf->u.tex.level &&
905 rt->arrayIndex == sf->u.tex.first_layer)
906 return false;
907
908 bool need_fence = false;
909
910 /* StoreTile for changed target */
911 if (rt->pBaseAddress) {
912 /* If changing attachment to a new target, mark tiles as
913 * INVALID so they are reloaded from surface. */
914 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
915 need_fence = true;
916 }
917
918 /* Make new attachment */
919 *rt = *swr_surface;
920 rt->format = fmt;
921 rt->lod = sf->u.tex.level;
922 rt->arrayIndex = sf->u.tex.first_layer;
923
924 return need_fence;
925 }
926
927 static inline void
928 swr_user_vbuf_range(const struct pipe_draw_info *info,
929 const struct swr_vertex_element_state *velems,
930 const struct pipe_vertex_buffer *vb,
931 uint32_t i,
932 uint32_t *totelems,
933 uint32_t *base,
934 uint32_t *size)
935 {
936 /* FIXME: The size is too large - we don't access the full extra stride. */
937 unsigned elems;
938 if (velems->instanced_bufs & (1U << i)) {
939 elems = info->instance_count / velems->min_instance_div[i] + 1;
940 *totelems = info->start_instance + elems;
941 *base = info->start_instance * vb->stride;
942 *size = elems * vb->stride;
943 } else if (vb->stride) {
944 elems = info->max_index - info->min_index + 1;
945 *totelems = info->max_index + 1;
946 *base = info->min_index * vb->stride;
947 *size = elems * vb->stride;
948 } else {
949 *totelems = 1;
950 *base = 0;
951 *size = velems->stream_pitch[i];
952 }
953 }
954
955 void
956 swr_update_derived(struct pipe_context *pipe,
957 const struct pipe_draw_info *p_draw_info)
958 {
959 struct swr_context *ctx = swr_context(pipe);
960 struct swr_screen *screen = swr_screen(pipe->screen);
961
962 /* When called from swr_clear (p_draw_info = null), set any null
963 * state-objects to the dummy state objects to prevent nullptr dereference
964 * in validation below.
965 *
966 * Important that this remains static for zero initialization. These
967 * aren't meant to be proper state objects, just empty structs. They will
968 * not be written to.
969 *
970 * Shaders can't be part of the union since they contain std::unordered_map
971 */
972 static struct {
973 union {
974 struct pipe_rasterizer_state rasterizer;
975 struct pipe_depth_stencil_alpha_state depth_stencil;
976 struct swr_blend_state blend;
977 } state;
978 struct swr_vertex_shader vs;
979 struct swr_fragment_shader fs;
980 } swr_dummy;
981
982 if (!p_draw_info) {
983 if (!ctx->rasterizer)
984 ctx->rasterizer = &swr_dummy.state.rasterizer;
985 if (!ctx->depth_stencil)
986 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
987 if (!ctx->blend)
988 ctx->blend = &swr_dummy.state.blend;
989 if (!ctx->vs)
990 ctx->vs = &swr_dummy.vs;
991 if (!ctx->fs)
992 ctx->fs = &swr_dummy.fs;
993 }
994
995 /* Update screen->pipe to current pipe context. */
996 if (screen->pipe != pipe)
997 screen->pipe = pipe;
998
999 /* Any state that requires dirty flags to be re-triggered sets this mask */
1000 /* For example, user_buffer vertex and index buffers. */
1001 unsigned post_update_dirty_flags = 0;
1002
1003 /* Render Targets */
1004 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1005 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1006 const struct util_format_description *desc = NULL;
1007 bool need_fence = false;
1008
1009 /* colorbuffer targets */
1010 if (fb->nr_cbufs) {
1011 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1012 need_fence |= swr_change_rt(
1013 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1014 }
1015 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1016 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1017
1018 /* depth/stencil target */
1019 if (fb->zsbuf)
1020 desc = util_format_description(fb->zsbuf->format);
1021 if (fb->zsbuf && util_format_has_depth(desc))
1022 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1023 else
1024 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1025
1026 if (fb->zsbuf && util_format_has_stencil(desc))
1027 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1028 else
1029 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1030
1031 /* This fence ensures any attachment changes are resolved before the
1032 * next draw */
1033 if (need_fence)
1034 swr_fence_submit(ctx, screen->flush_fence);
1035 }
1036
1037 /* Raster state */
1038 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1039 SWR_NEW_VS | // clipping
1040 SWR_NEW_FRAMEBUFFER)) {
1041 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1042 pipe_framebuffer_state *fb = &ctx->framebuffer;
1043
1044 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1045 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1046 rastState->frontWinding = rasterizer->front_ccw
1047 ? SWR_FRONTWINDING_CCW
1048 : SWR_FRONTWINDING_CW;
1049 rastState->scissorEnable = rasterizer->scissor;
1050 rastState->pointSize = rasterizer->point_size > 0.0f
1051 ? rasterizer->point_size
1052 : 1.0f;
1053 rastState->lineWidth = rasterizer->line_width > 0.0f
1054 ? rasterizer->line_width
1055 : 1.0f;
1056
1057 rastState->pointParam = rasterizer->point_size_per_vertex;
1058
1059 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1060 rastState->pointSpriteTopOrigin =
1061 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1062
1063 /* XXX TODO: Add multisample */
1064 rastState->msaaRastEnable = false;
1065 rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
1066 rastState->sampleCount = SWR_MULTISAMPLE_1X;
1067 rastState->forcedSampleCount = false;
1068
1069 bool do_offset = false;
1070 switch (rasterizer->fill_front) {
1071 case PIPE_POLYGON_MODE_FILL:
1072 do_offset = rasterizer->offset_tri;
1073 break;
1074 case PIPE_POLYGON_MODE_LINE:
1075 do_offset = rasterizer->offset_line;
1076 break;
1077 case PIPE_POLYGON_MODE_POINT:
1078 do_offset = rasterizer->offset_point;
1079 break;
1080 }
1081
1082 if (do_offset) {
1083 rastState->depthBias = rasterizer->offset_units;
1084 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1085 rastState->depthBiasClamp = rasterizer->offset_clamp;
1086 } else {
1087 rastState->depthBias = 0;
1088 rastState->slopeScaledDepthBias = 0;
1089 rastState->depthBiasClamp = 0;
1090 }
1091 struct pipe_surface *zb = fb->zsbuf;
1092 if (zb && swr_resource(zb->texture)->has_depth)
1093 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1094
1095 rastState->depthClipEnable = rasterizer->depth_clip;
1096 rastState->clipHalfZ = rasterizer->clip_halfz;
1097
1098 rastState->clipDistanceMask =
1099 ctx->vs->info.base.num_written_clipdistance ?
1100 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
1101 rasterizer->clip_plane_enable;
1102
1103 rastState->cullDistanceMask =
1104 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
1105
1106 SwrSetRastState(ctx->swrContext, rastState);
1107 }
1108
1109 /* Scissor */
1110 if (ctx->dirty & SWR_NEW_SCISSOR) {
1111 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
1112 }
1113
1114 /* Viewport */
1115 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1116 | SWR_NEW_RASTERIZER)) {
1117 pipe_viewport_state *state = &ctx->viewport;
1118 pipe_framebuffer_state *fb = &ctx->framebuffer;
1119 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1120
1121 SWR_VIEWPORT *vp = &ctx->derived.vp;
1122 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1123
1124 vp->x = state->translate[0] - state->scale[0];
1125 vp->width = 2 * state->scale[0];
1126 vp->y = state->translate[1] - fabs(state->scale[1]);
1127 vp->height = 2 * fabs(state->scale[1]);
1128 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1129 &vp->minZ, &vp->maxZ);
1130
1131 vpm->m00[0] = state->scale[0];
1132 vpm->m11[0] = state->scale[1];
1133 vpm->m22[0] = state->scale[2];
1134 vpm->m30[0] = state->translate[0];
1135 vpm->m31[0] = state->translate[1];
1136 vpm->m32[0] = state->translate[2];
1137
1138 /* Now that the matrix is calculated, clip the view coords to screen
1139 * size. OpenGL allows for -ve x,y in the viewport. */
1140 if (vp->x < 0.0f) {
1141 vp->width += vp->x;
1142 vp->x = 0.0f;
1143 }
1144 if (vp->y < 0.0f) {
1145 vp->height += vp->y;
1146 vp->y = 0.0f;
1147 }
1148 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1149 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1150
1151 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1152 }
1153
1154 /* Set vertex & index buffers */
1155 /* (using draw info if called by swr_draw_vbo) */
1156 if (ctx->dirty & SWR_NEW_VERTEX) {
1157 uint32_t scratch_total;
1158 uint8_t *scratch = NULL;
1159
1160 /* If being called by swr_draw_vbo, copy draw details */
1161 struct pipe_draw_info info = {0};
1162 if (p_draw_info)
1163 info = *p_draw_info;
1164
1165 /* We must get all the scratch space in one go */
1166 scratch_total = 0;
1167 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1168 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1169
1170 if (!vb->user_buffer)
1171 continue;
1172
1173 uint32_t elems, base, size;
1174 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1175 scratch_total += AlignUp(size, 4);
1176 }
1177
1178 if (scratch_total) {
1179 scratch = (uint8_t *)swr_copy_to_scratch_space(
1180 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1181 }
1182
1183 /* vertex buffers */
1184 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1185 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1186 uint32_t size, pitch, elems, partial_inbounds;
1187 uint32_t min_vertex_index;
1188 const uint8_t *p_data;
1189 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1190
1191 pitch = vb->stride;
1192 if (!vb->user_buffer) {
1193 /* VBO
1194 * size is based on buffer->width0 rather than info.max_index
1195 * to prevent having to validate VBO on each draw */
1196 size = vb->buffer->width0;
1197 elems = size / pitch;
1198 partial_inbounds = size % pitch;
1199 min_vertex_index = 0;
1200
1201 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
1202 } else {
1203 /* Client buffer
1204 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1205 * revalidate on each draw */
1206 post_update_dirty_flags |= SWR_NEW_VERTEX;
1207
1208 uint32_t base;
1209 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1210 partial_inbounds = 0;
1211 min_vertex_index = info.min_index;
1212
1213 /* Copy only needed vertices to scratch space */
1214 size = AlignUp(size, 4);
1215 const void *ptr = (const uint8_t *) vb->user_buffer + base;
1216 memcpy(scratch, ptr, size);
1217 ptr = scratch;
1218 scratch += size;
1219 p_data = (const uint8_t *)ptr - base;
1220 }
1221
1222 swrVertexBuffers[i] = {0};
1223 swrVertexBuffers[i].index = i;
1224 swrVertexBuffers[i].pitch = pitch;
1225 swrVertexBuffers[i].pData = p_data;
1226 swrVertexBuffers[i].size = size;
1227 swrVertexBuffers[i].minVertex = min_vertex_index;
1228 swrVertexBuffers[i].maxVertex = elems;
1229 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1230 }
1231
1232 SwrSetVertexBuffers(
1233 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1234
1235 /* index buffer, if required (info passed in by swr_draw_vbo) */
1236 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1237 if (info.indexed) {
1238 const uint8_t *p_data;
1239 uint32_t size, pitch;
1240 struct pipe_index_buffer *ib = &ctx->index_buffer;
1241
1242 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1243 index_type = swr_convert_index_type(pitch);
1244
1245 if (!ib->user_buffer) {
1246 /* VBO
1247 * size is based on buffer->width0 rather than info.count
1248 * to prevent having to validate VBO on each draw */
1249 size = ib->buffer->width0;
1250 p_data = swr_resource_data(ib->buffer) + ib->offset;
1251 } else {
1252 /* Client buffer
1253 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1254 * revalidate on each draw */
1255 post_update_dirty_flags |= SWR_NEW_VERTEX;
1256
1257 size = info.count * pitch;
1258 size = AlignUp(size, 4);
1259
1260 /* Copy indices to scratch space */
1261 const void *ptr = ib->user_buffer;
1262 ptr = swr_copy_to_scratch_space(
1263 ctx, &ctx->scratch->index_buffer, ptr, size);
1264 p_data = (const uint8_t *)ptr;
1265 }
1266
1267 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1268 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1269 swrIndexBuffer.pIndices = p_data;
1270 swrIndexBuffer.size = size;
1271
1272 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1273 }
1274
1275 struct swr_vertex_element_state *velems = ctx->velems;
1276 if (velems && velems->fsState.indexType != index_type) {
1277 velems->fsFunc = NULL;
1278 velems->fsState.indexType = index_type;
1279 }
1280 }
1281
1282 /* GeometryShader */
1283 if (ctx->dirty & (SWR_NEW_GS |
1284 SWR_NEW_VS |
1285 SWR_NEW_SAMPLER |
1286 SWR_NEW_SAMPLER_VIEW)) {
1287 if (ctx->gs) {
1288 swr_jit_gs_key key;
1289 swr_generate_gs_key(key, ctx, ctx->gs);
1290 auto search = ctx->gs->map.find(key);
1291 PFN_GS_FUNC func;
1292 if (search != ctx->gs->map.end()) {
1293 func = search->second->shader;
1294 } else {
1295 func = swr_compile_gs(ctx, key);
1296 }
1297 SwrSetGsFunc(ctx->swrContext, func);
1298
1299 /* JIT sampler state */
1300 if (ctx->dirty & SWR_NEW_SAMPLER) {
1301 swr_update_sampler_state(ctx,
1302 PIPE_SHADER_GEOMETRY,
1303 key.nr_samplers,
1304 ctx->swrDC.samplersGS);
1305 }
1306
1307 /* JIT sampler view state */
1308 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1309 swr_update_texture_state(ctx,
1310 PIPE_SHADER_GEOMETRY,
1311 key.nr_sampler_views,
1312 ctx->swrDC.texturesGS);
1313 }
1314
1315 SwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1316 } else {
1317 SWR_GS_STATE state = { 0 };
1318 SwrSetGsState(ctx->swrContext, &state);
1319 SwrSetGsFunc(ctx->swrContext, NULL);
1320 }
1321 }
1322
1323 /* VertexShader */
1324 if (ctx->dirty & (SWR_NEW_VS |
1325 SWR_NEW_RASTERIZER | // for clip planes
1326 SWR_NEW_SAMPLER |
1327 SWR_NEW_SAMPLER_VIEW |
1328 SWR_NEW_FRAMEBUFFER)) {
1329 swr_jit_vs_key key;
1330 swr_generate_vs_key(key, ctx, ctx->vs);
1331 auto search = ctx->vs->map.find(key);
1332 PFN_VERTEX_FUNC func;
1333 if (search != ctx->vs->map.end()) {
1334 func = search->second->shader;
1335 } else {
1336 func = swr_compile_vs(ctx, key);
1337 }
1338 SwrSetVertexFunc(ctx->swrContext, func);
1339
1340 /* JIT sampler state */
1341 if (ctx->dirty & SWR_NEW_SAMPLER) {
1342 swr_update_sampler_state(ctx,
1343 PIPE_SHADER_VERTEX,
1344 key.nr_samplers,
1345 ctx->swrDC.samplersVS);
1346 }
1347
1348 /* JIT sampler view state */
1349 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1350 swr_update_texture_state(ctx,
1351 PIPE_SHADER_VERTEX,
1352 key.nr_sampler_views,
1353 ctx->swrDC.texturesVS);
1354 }
1355 }
1356
1357 /* FragmentShader */
1358 if (ctx->dirty & (SWR_NEW_FS |
1359 SWR_NEW_VS |
1360 SWR_NEW_GS |
1361 SWR_NEW_RASTERIZER |
1362 SWR_NEW_SAMPLER |
1363 SWR_NEW_SAMPLER_VIEW |
1364 SWR_NEW_FRAMEBUFFER)) {
1365 swr_jit_fs_key key;
1366 swr_generate_fs_key(key, ctx, ctx->fs);
1367 auto search = ctx->fs->map.find(key);
1368 PFN_PIXEL_KERNEL func;
1369 if (search != ctx->fs->map.end()) {
1370 func = search->second->shader;
1371 } else {
1372 func = swr_compile_fs(ctx, key);
1373 }
1374 SWR_PS_STATE psState = {0};
1375 psState.pfnPixelShader = func;
1376 psState.killsPixel = ctx->fs->info.base.uses_kill;
1377 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1378 psState.writesODepth = ctx->fs->info.base.writes_z;
1379 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1380 psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1381 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1382 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1383 uint32_t barycentricsMask = 0;
1384 #if 0
1385 // when we switch to mesa-master
1386 if (ctx->fs->info.base.uses_persp_center ||
1387 ctx->fs->info.base.uses_linear_center)
1388 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1389 if (ctx->fs->info.base.uses_persp_centroid ||
1390 ctx->fs->info.base.uses_linear_centroid)
1391 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1392 if (ctx->fs->info.base.uses_persp_sample ||
1393 ctx->fs->info.base.uses_linear_sample)
1394 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1395 #else
1396 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1397 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1398 case TGSI_INTERPOLATE_LOC_CENTER:
1399 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1400 break;
1401 case TGSI_INTERPOLATE_LOC_CENTROID:
1402 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1403 break;
1404 case TGSI_INTERPOLATE_LOC_SAMPLE:
1405 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1406 break;
1407 }
1408 }
1409 #endif
1410 psState.barycentricsMask = barycentricsMask;
1411 psState.usesUAV = false; // XXX
1412 psState.forceEarlyZ = false;
1413 SwrSetPixelShaderState(ctx->swrContext, &psState);
1414
1415 /* JIT sampler state */
1416 if (ctx->dirty & (SWR_NEW_SAMPLER |
1417 SWR_NEW_FS)) {
1418 swr_update_sampler_state(ctx,
1419 PIPE_SHADER_FRAGMENT,
1420 key.nr_samplers,
1421 ctx->swrDC.samplersFS);
1422 }
1423
1424 /* JIT sampler view state */
1425 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1426 SWR_NEW_FRAMEBUFFER |
1427 SWR_NEW_FS)) {
1428 swr_update_texture_state(ctx,
1429 PIPE_SHADER_FRAGMENT,
1430 key.nr_sampler_views,
1431 ctx->swrDC.texturesFS);
1432 }
1433 }
1434
1435
1436 /* VertexShader Constants */
1437 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1438 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1439 }
1440
1441 /* FragmentShader Constants */
1442 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1443 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1444 }
1445
1446 /* GeometryShader Constants */
1447 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1448 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1449 }
1450
1451 /* Depth/stencil state */
1452 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1453 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1454 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1455 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1456 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1457
1458 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1459 struct pipe_stencil_state *front_stencil =
1460 ctx->depth_stencil.stencil[0];
1461 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1462 struct pipe_alpha_state alpha;
1463 */
1464 if (stencil[0].enabled) {
1465 depthStencilState.stencilWriteEnable = 1;
1466 depthStencilState.stencilTestEnable = 1;
1467 depthStencilState.stencilTestFunc =
1468 swr_convert_depth_func(stencil[0].func);
1469
1470 depthStencilState.stencilPassDepthPassOp =
1471 swr_convert_stencil_op(stencil[0].zpass_op);
1472 depthStencilState.stencilPassDepthFailOp =
1473 swr_convert_stencil_op(stencil[0].zfail_op);
1474 depthStencilState.stencilFailOp =
1475 swr_convert_stencil_op(stencil[0].fail_op);
1476 depthStencilState.stencilWriteMask = stencil[0].writemask;
1477 depthStencilState.stencilTestMask = stencil[0].valuemask;
1478 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1479 }
1480 if (stencil[1].enabled) {
1481 depthStencilState.doubleSidedStencilTestEnable = 1;
1482
1483 depthStencilState.backfaceStencilTestFunc =
1484 swr_convert_depth_func(stencil[1].func);
1485
1486 depthStencilState.backfaceStencilPassDepthPassOp =
1487 swr_convert_stencil_op(stencil[1].zpass_op);
1488 depthStencilState.backfaceStencilPassDepthFailOp =
1489 swr_convert_stencil_op(stencil[1].zfail_op);
1490 depthStencilState.backfaceStencilFailOp =
1491 swr_convert_stencil_op(stencil[1].fail_op);
1492 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1493 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1494
1495 depthStencilState.backfaceStencilRefValue =
1496 ctx->stencil_ref.ref_value[1];
1497 }
1498
1499 depthStencilState.depthTestEnable = depth->enabled;
1500 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1501 depthStencilState.depthWriteEnable = depth->writemask;
1502 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1503
1504 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1505 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1506 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1507 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1508 }
1509
1510 /* Blend State */
1511 if (ctx->dirty & (SWR_NEW_BLEND |
1512 SWR_NEW_FRAMEBUFFER |
1513 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1514 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1515
1516 SWR_BLEND_STATE blendState;
1517 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1518 blendState.constantColor[0] = ctx->blend_color.color[0];
1519 blendState.constantColor[1] = ctx->blend_color.color[1];
1520 blendState.constantColor[2] = ctx->blend_color.color[2];
1521 blendState.constantColor[3] = ctx->blend_color.color[3];
1522 blendState.alphaTestReference =
1523 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1524
1525 // XXX MSAA
1526 blendState.sampleMask = 0;
1527 blendState.sampleCount = SWR_MULTISAMPLE_1X;
1528
1529 /* If there are no color buffers bound, disable writes on RT0
1530 * and skip loop */
1531 if (fb->nr_cbufs == 0) {
1532 blendState.renderTarget[0].writeDisableRed = 1;
1533 blendState.renderTarget[0].writeDisableGreen = 1;
1534 blendState.renderTarget[0].writeDisableBlue = 1;
1535 blendState.renderTarget[0].writeDisableAlpha = 1;
1536 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1537 }
1538 else
1539 for (int target = 0;
1540 target < std::min(SWR_NUM_RENDERTARGETS,
1541 PIPE_MAX_COLOR_BUFS);
1542 target++) {
1543 if (!fb->cbufs[target])
1544 continue;
1545
1546 struct swr_resource *colorBuffer =
1547 swr_resource(fb->cbufs[target]->texture);
1548
1549 BLEND_COMPILE_STATE compileState;
1550 memset(&compileState, 0, sizeof(compileState));
1551 compileState.format = colorBuffer->swr.format;
1552 memcpy(&compileState.blendState,
1553 &ctx->blend->compileState[target],
1554 sizeof(compileState.blendState));
1555
1556 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1557 if (compileState.blendState.logicOpEnable &&
1558 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1559 compileState.blendState.logicOpEnable = false;
1560 }
1561
1562 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1563 compileState.blendState.blendEnable = false;
1564
1565 if (compileState.blendState.blendEnable == false &&
1566 compileState.blendState.logicOpEnable == false &&
1567 ctx->depth_stencil->alpha.enabled == 0) {
1568 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1569 continue;
1570 }
1571
1572 compileState.desc.alphaTestEnable =
1573 ctx->depth_stencil->alpha.enabled;
1574 compileState.desc.independentAlphaBlendEnable =
1575 (compileState.blendState.sourceBlendFactor !=
1576 compileState.blendState.sourceAlphaBlendFactor) ||
1577 (compileState.blendState.destBlendFactor !=
1578 compileState.blendState.destAlphaBlendFactor) ||
1579 (compileState.blendState.colorBlendFunc !=
1580 compileState.blendState.alphaBlendFunc);
1581 compileState.desc.alphaToCoverageEnable =
1582 ctx->blend->pipe.alpha_to_coverage;
1583 compileState.desc.sampleMaskEnable = 0; // XXX
1584 compileState.desc.numSamples = 1; // XXX
1585
1586 compileState.alphaTestFunction =
1587 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1588 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1589
1590 compileState.Canonicalize();
1591
1592 PFN_BLEND_JIT_FUNC func = NULL;
1593 auto search = ctx->blendJIT->find(compileState);
1594 if (search != ctx->blendJIT->end()) {
1595 func = search->second;
1596 } else {
1597 HANDLE hJitMgr = screen->hJitMgr;
1598 func = JitCompileBlend(hJitMgr, compileState);
1599 debug_printf("BLEND shader %p\n", func);
1600 assert(func && "Error: BlendShader = NULL");
1601
1602 ctx->blendJIT->insert(std::make_pair(compileState, func));
1603 }
1604 SwrSetBlendFunc(ctx->swrContext, target, func);
1605 }
1606
1607 SwrSetBlendState(ctx->swrContext, &blendState);
1608 }
1609
1610 if (ctx->dirty & SWR_NEW_STIPPLE) {
1611 /* XXX What to do with this one??? SWR doesn't stipple */
1612 }
1613
1614 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1615 ctx->vs->soState.rasterizerDisable =
1616 ctx->rasterizer->rasterizer_discard;
1617 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1618
1619 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1620
1621 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1622 SWR_STREAMOUT_BUFFER buffer = {0};
1623 if (!ctx->so_targets[i])
1624 continue;
1625 buffer.enable = true;
1626 buffer.pBuffer =
1627 (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) +
1628 ctx->so_targets[i]->buffer_offset);
1629 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1630 buffer.pitch = stream_output->stride[i];
1631 buffer.streamOffset = 0;
1632
1633 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1634 }
1635 }
1636
1637 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1638 // shader exporting clip distances overrides all user clip planes
1639 if (ctx->rasterizer->clip_plane_enable &&
1640 !ctx->vs->info.base.num_written_clipdistance)
1641 {
1642 swr_draw_context *pDC = &ctx->swrDC;
1643 memcpy(pDC->userClipPlanes,
1644 ctx->clip.ucp,
1645 sizeof(pDC->userClipPlanes));
1646 }
1647 }
1648
1649 // set up backend state
1650 SWR_BACKEND_STATE backendState = {0};
1651 backendState.numAttributes =
1652 ((ctx->gs ? ctx->gs->info.base.num_outputs : ctx->vs->info.base.num_outputs) - 1) +
1653 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1654 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
1655 sizeof(backendState.numComponents));
1656 for (unsigned i = 0; i < backendState.numAttributes; i++)
1657 backendState.numComponents[i] = 4;
1658 backendState.constantInterpolationMask = ctx->fs->constantMask |
1659 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1660 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1661
1662 SwrSetBackendState(ctx->swrContext, &backendState);
1663
1664 /* Ensure that any in-progress attachment change StoreTiles finish */
1665 if (swr_is_fence_pending(screen->flush_fence))
1666 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1667
1668 /* Finally, update the in-use status of all resources involved in draw */
1669 swr_update_resource_status(pipe, p_draw_info);
1670
1671 ctx->dirty = post_update_dirty_flags;
1672 }
1673
1674
1675 static struct pipe_stream_output_target *
1676 swr_create_so_target(struct pipe_context *pipe,
1677 struct pipe_resource *buffer,
1678 unsigned buffer_offset,
1679 unsigned buffer_size)
1680 {
1681 struct pipe_stream_output_target *target;
1682
1683 target = CALLOC_STRUCT(pipe_stream_output_target);
1684 if (!target)
1685 return NULL;
1686
1687 target->context = pipe;
1688 target->reference.count = 1;
1689 pipe_resource_reference(&target->buffer, buffer);
1690 target->buffer_offset = buffer_offset;
1691 target->buffer_size = buffer_size;
1692 return target;
1693 }
1694
1695 static void
1696 swr_destroy_so_target(struct pipe_context *pipe,
1697 struct pipe_stream_output_target *target)
1698 {
1699 pipe_resource_reference(&target->buffer, NULL);
1700 FREE(target);
1701 }
1702
1703 static void
1704 swr_set_so_targets(struct pipe_context *pipe,
1705 unsigned num_targets,
1706 struct pipe_stream_output_target **targets,
1707 const unsigned *offsets)
1708 {
1709 struct swr_context *swr = swr_context(pipe);
1710 uint32_t i;
1711
1712 assert(num_targets <= MAX_SO_STREAMS);
1713
1714 for (i = 0; i < num_targets; i++) {
1715 pipe_so_target_reference(
1716 (struct pipe_stream_output_target **)&swr->so_targets[i],
1717 targets[i]);
1718 }
1719
1720 for (/* fall-through */; i < swr->num_so_targets; i++) {
1721 pipe_so_target_reference(
1722 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1723 }
1724
1725 swr->num_so_targets = num_targets;
1726
1727 swr->dirty |= SWR_NEW_SO;
1728 }
1729
1730
1731 void
1732 swr_state_init(struct pipe_context *pipe)
1733 {
1734 pipe->create_blend_state = swr_create_blend_state;
1735 pipe->bind_blend_state = swr_bind_blend_state;
1736 pipe->delete_blend_state = swr_delete_blend_state;
1737
1738 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1739 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1740 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1741
1742 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1743 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1744 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1745
1746 pipe->create_sampler_state = swr_create_sampler_state;
1747 pipe->bind_sampler_states = swr_bind_sampler_states;
1748 pipe->delete_sampler_state = swr_delete_sampler_state;
1749
1750 pipe->create_sampler_view = swr_create_sampler_view;
1751 pipe->set_sampler_views = swr_set_sampler_views;
1752 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1753
1754 pipe->create_vs_state = swr_create_vs_state;
1755 pipe->bind_vs_state = swr_bind_vs_state;
1756 pipe->delete_vs_state = swr_delete_vs_state;
1757
1758 pipe->create_fs_state = swr_create_fs_state;
1759 pipe->bind_fs_state = swr_bind_fs_state;
1760 pipe->delete_fs_state = swr_delete_fs_state;
1761
1762 pipe->create_gs_state = swr_create_gs_state;
1763 pipe->bind_gs_state = swr_bind_gs_state;
1764 pipe->delete_gs_state = swr_delete_gs_state;
1765
1766 pipe->set_constant_buffer = swr_set_constant_buffer;
1767
1768 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1769 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1770 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1771
1772 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1773 pipe->set_index_buffer = swr_set_index_buffer;
1774
1775 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1776 pipe->set_clip_state = swr_set_clip_state;
1777 pipe->set_scissor_states = swr_set_scissor_states;
1778 pipe->set_viewport_states = swr_set_viewport_states;
1779
1780 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1781
1782 pipe->set_blend_color = swr_set_blend_color;
1783 pipe->set_stencil_ref = swr_set_stencil_ref;
1784
1785 pipe->set_sample_mask = swr_set_sample_mask;
1786
1787 pipe->create_stream_output_target = swr_create_so_target;
1788 pipe->stream_output_target_destroy = swr_destroy_so_target;
1789 pipe->set_stream_output_targets = swr_set_so_targets;
1790 }