swr: Minor cleanup of variable usage, no functional change.
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
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4 * Permission is hereby granted, free of charge, to any person obtaining a
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "gen_state_llvm.h"
33 #include "core/multisample.h"
34 #include "core/state_funcs.h"
35
36 #include "gallivm/lp_bld_tgsi.h"
37 #include "util/u_format.h"
38
39 #include "util/u_memory.h"
40 #include "util/u_inlines.h"
41 #include "util/u_helpers.h"
42 #include "util/u_framebuffer.h"
43 #include "util/u_viewport.h"
44 #include "util/u_prim.h"
45
46 #include "swr_state.h"
47 #include "swr_context.h"
48 #include "gen_swr_context_llvm.h"
49 #include "swr_screen.h"
50 #include "swr_resource.h"
51 #include "swr_tex_sample.h"
52 #include "swr_scratch.h"
53 #include "swr_shader.h"
54 #include "swr_fence.h"
55
56 /* These should be pulled out into separate files as necessary
57 * Just initializing everything here to get going. */
58
59 static void *
60 swr_create_blend_state(struct pipe_context *pipe,
61 const struct pipe_blend_state *blend)
62 {
63 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
64
65 memcpy(&state->pipe, blend, sizeof(*blend));
66
67 struct pipe_blend_state *pipe_blend = &state->pipe;
68
69 for (int target = 0;
70 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
71 target++) {
72
73 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
74 SWR_RENDER_TARGET_BLEND_STATE &blendState =
75 state->blendState.renderTarget[target];
76 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
77 state->compileState[target];
78
79 if (target != 0 && !pipe_blend->independent_blend_enable) {
80 memcpy(&compileState,
81 &state->compileState[0],
82 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
83 continue;
84 }
85
86 compileState.blendEnable = rt_blend->blend_enable;
87 if (compileState.blendEnable) {
88 compileState.sourceAlphaBlendFactor =
89 swr_convert_blend_factor(rt_blend->alpha_src_factor);
90 compileState.destAlphaBlendFactor =
91 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
92 compileState.sourceBlendFactor =
93 swr_convert_blend_factor(rt_blend->rgb_src_factor);
94 compileState.destBlendFactor =
95 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
96
97 compileState.colorBlendFunc =
98 swr_convert_blend_func(rt_blend->rgb_func);
99 compileState.alphaBlendFunc =
100 swr_convert_blend_func(rt_blend->alpha_func);
101 }
102 compileState.logicOpEnable = state->pipe.logicop_enable;
103 if (compileState.logicOpEnable) {
104 compileState.logicOpFunc =
105 swr_convert_logic_op(state->pipe.logicop_func);
106 }
107
108 blendState.writeDisableRed =
109 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
110 blendState.writeDisableGreen =
111 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
112 blendState.writeDisableBlue =
113 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
114 blendState.writeDisableAlpha =
115 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
116
117 if (rt_blend->colormask == 0)
118 compileState.blendEnable = false;
119 }
120
121 return state;
122 }
123
124 static void
125 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
126 {
127 struct swr_context *ctx = swr_context(pipe);
128
129 if (ctx->blend == blend)
130 return;
131
132 ctx->blend = (swr_blend_state *)blend;
133
134 ctx->dirty |= SWR_NEW_BLEND;
135 }
136
137 static void
138 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
139 {
140 FREE(blend);
141 }
142
143 static void
144 swr_set_blend_color(struct pipe_context *pipe,
145 const struct pipe_blend_color *color)
146 {
147 struct swr_context *ctx = swr_context(pipe);
148
149 ctx->blend_color = *color;
150
151 ctx->dirty |= SWR_NEW_BLEND;
152 }
153
154 static void
155 swr_set_stencil_ref(struct pipe_context *pipe,
156 const struct pipe_stencil_ref *ref)
157 {
158 struct swr_context *ctx = swr_context(pipe);
159
160 ctx->stencil_ref = *ref;
161
162 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
163 }
164
165 static void *
166 swr_create_depth_stencil_state(
167 struct pipe_context *pipe,
168 const struct pipe_depth_stencil_alpha_state *depth_stencil)
169 {
170 struct pipe_depth_stencil_alpha_state *state;
171
172 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
173 sizeof *depth_stencil);
174
175 return state;
176 }
177
178 static void
179 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
180 {
181 struct swr_context *ctx = swr_context(pipe);
182
183 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
184 return;
185
186 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
187
188 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
189 }
190
191 static void
192 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
193 {
194 FREE(depth);
195 }
196
197
198 static void *
199 swr_create_rasterizer_state(struct pipe_context *pipe,
200 const struct pipe_rasterizer_state *rast)
201 {
202 struct pipe_rasterizer_state *state;
203 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
204
205 return state;
206 }
207
208 static void
209 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
210 {
211 struct swr_context *ctx = swr_context(pipe);
212 const struct pipe_rasterizer_state *rasterizer =
213 (const struct pipe_rasterizer_state *)handle;
214
215 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
216 return;
217
218 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
219
220 ctx->dirty |= SWR_NEW_RASTERIZER;
221 }
222
223 static void
224 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
225 {
226 FREE(rasterizer);
227 }
228
229
230 static void *
231 swr_create_sampler_state(struct pipe_context *pipe,
232 const struct pipe_sampler_state *sampler)
233 {
234 struct pipe_sampler_state *state =
235 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
236
237 return state;
238 }
239
240 static void
241 swr_bind_sampler_states(struct pipe_context *pipe,
242 enum pipe_shader_type shader,
243 unsigned start,
244 unsigned num,
245 void **samplers)
246 {
247 struct swr_context *ctx = swr_context(pipe);
248 unsigned i;
249
250 assert(shader < PIPE_SHADER_TYPES);
251 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
252
253 /* set the new samplers */
254 ctx->num_samplers[shader] = num;
255 for (i = 0; i < num; i++) {
256 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
257 }
258
259 ctx->dirty |= SWR_NEW_SAMPLER;
260 }
261
262 static void
263 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
264 {
265 FREE(sampler);
266 }
267
268
269 static struct pipe_sampler_view *
270 swr_create_sampler_view(struct pipe_context *pipe,
271 struct pipe_resource *texture,
272 const struct pipe_sampler_view *templ)
273 {
274 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
275
276 if (view) {
277 *view = *templ;
278 view->reference.count = 1;
279 view->texture = NULL;
280 pipe_resource_reference(&view->texture, texture);
281 view->context = pipe;
282 }
283
284 return view;
285 }
286
287 static void
288 swr_set_sampler_views(struct pipe_context *pipe,
289 enum pipe_shader_type shader,
290 unsigned start,
291 unsigned num,
292 struct pipe_sampler_view **views)
293 {
294 struct swr_context *ctx = swr_context(pipe);
295 uint i;
296
297 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
298
299 assert(shader < PIPE_SHADER_TYPES);
300 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
301
302 /* set the new sampler views */
303 ctx->num_sampler_views[shader] = num;
304 for (i = 0; i < num; i++) {
305 /* Note: we're using pipe_sampler_view_release() here to work around
306 * a possible crash when the old view belongs to another context that
307 * was already destroyed.
308 */
309 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
310 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
311 views[i]);
312 }
313
314 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
315 }
316
317 static void
318 swr_sampler_view_destroy(struct pipe_context *pipe,
319 struct pipe_sampler_view *view)
320 {
321 pipe_resource_reference(&view->texture, NULL);
322 FREE(view);
323 }
324
325 static void *
326 swr_create_vs_state(struct pipe_context *pipe,
327 const struct pipe_shader_state *vs)
328 {
329 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
330 if (!swr_vs)
331 return NULL;
332
333 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
334 swr_vs->pipe.stream_output = vs->stream_output;
335
336 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
337
338 swr_vs->soState = {0};
339
340 if (swr_vs->pipe.stream_output.num_outputs) {
341 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
342
343 swr_vs->soState.soEnable = true;
344 // soState.rasterizerDisable set on state dirty
345 // soState.streamToRasterizer not used
346
347 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
348 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
349 1 << (stream_output->output[i].register_index - 1);
350 }
351 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
352 swr_vs->soState.streamNumEntries[i] =
353 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
354 swr_vs->soState.vertexAttribOffset[i] = VERTEX_ATTRIB_START_SLOT; // TODO: optimize
355 }
356 }
357
358 return swr_vs;
359 }
360
361 static void
362 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
363 {
364 struct swr_context *ctx = swr_context(pipe);
365
366 if (ctx->vs == vs)
367 return;
368
369 ctx->vs = (swr_vertex_shader *)vs;
370 ctx->dirty |= SWR_NEW_VS;
371 }
372
373 static void
374 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
375 {
376 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
377 FREE((void *)swr_vs->pipe.tokens);
378 struct swr_screen *screen = swr_screen(pipe->screen);
379
380 /* Defer deletion of vs state */
381 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
382 }
383
384 static void *
385 swr_create_fs_state(struct pipe_context *pipe,
386 const struct pipe_shader_state *fs)
387 {
388 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
389 if (!swr_fs)
390 return NULL;
391
392 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
393
394 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
395
396 return swr_fs;
397 }
398
399
400 static void
401 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
402 {
403 struct swr_context *ctx = swr_context(pipe);
404
405 if (ctx->fs == fs)
406 return;
407
408 ctx->fs = (swr_fragment_shader *)fs;
409 ctx->dirty |= SWR_NEW_FS;
410 }
411
412 static void
413 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
414 {
415 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
416 FREE((void *)swr_fs->pipe.tokens);
417 struct swr_screen *screen = swr_screen(pipe->screen);
418
419 /* Defer deleton of fs state */
420 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
421 }
422
423 static void *
424 swr_create_gs_state(struct pipe_context *pipe,
425 const struct pipe_shader_state *gs)
426 {
427 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
428 if (!swr_gs)
429 return NULL;
430
431 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
432
433 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
434
435 return swr_gs;
436 }
437
438
439 static void
440 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
441 {
442 struct swr_context *ctx = swr_context(pipe);
443
444 if (ctx->gs == gs)
445 return;
446
447 ctx->gs = (swr_geometry_shader *)gs;
448 ctx->dirty |= SWR_NEW_GS;
449 }
450
451 static void
452 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
453 {
454 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
455 FREE((void *)swr_gs->pipe.tokens);
456 struct swr_screen *screen = swr_screen(pipe->screen);
457
458 /* Defer deleton of fs state */
459 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
460 }
461
462 static void
463 swr_set_constant_buffer(struct pipe_context *pipe,
464 enum pipe_shader_type shader,
465 uint index,
466 const struct pipe_constant_buffer *cb)
467 {
468 struct swr_context *ctx = swr_context(pipe);
469 struct pipe_resource *constants = cb ? cb->buffer : NULL;
470
471 assert(shader < PIPE_SHADER_TYPES);
472 assert(index < ARRAY_SIZE(ctx->constants[shader]));
473
474 /* note: reference counting */
475 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
476
477 if (shader == PIPE_SHADER_VERTEX) {
478 ctx->dirty |= SWR_NEW_VSCONSTANTS;
479 } else if (shader == PIPE_SHADER_FRAGMENT) {
480 ctx->dirty |= SWR_NEW_FSCONSTANTS;
481 } else if (shader == PIPE_SHADER_GEOMETRY) {
482 ctx->dirty |= SWR_NEW_GSCONSTANTS;
483 }
484
485 if (cb && cb->user_buffer) {
486 pipe_resource_reference(&constants, NULL);
487 }
488 }
489
490
491 static void *
492 swr_create_vertex_elements_state(struct pipe_context *pipe,
493 unsigned num_elements,
494 const struct pipe_vertex_element *attribs)
495 {
496 struct swr_vertex_element_state *velems;
497 assert(num_elements <= PIPE_MAX_ATTRIBS);
498 velems = new swr_vertex_element_state;
499 if (velems) {
500 memset(&velems->fsState, 0, sizeof(velems->fsState));
501 velems->fsState.bVertexIDOffsetEnable = true;
502 velems->fsState.numAttribs = num_elements;
503 for (unsigned i = 0; i < num_elements; i++) {
504 // XXX: we should do this keyed on the VS usage info
505
506 const struct util_format_description *desc =
507 util_format_description(attribs[i].src_format);
508
509 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
510 velems->fsState.layout[i].Format =
511 mesa_to_swr_format(attribs[i].src_format);
512 velems->fsState.layout[i].StreamIndex =
513 attribs[i].vertex_buffer_index;
514 velems->fsState.layout[i].InstanceEnable =
515 attribs[i].instance_divisor != 0;
516 velems->fsState.layout[i].ComponentControl0 =
517 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
518 ? ComponentControl::StoreSrc
519 : ComponentControl::Store0;
520 velems->fsState.layout[i].ComponentControl1 =
521 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
522 ? ComponentControl::StoreSrc
523 : ComponentControl::Store0;
524 velems->fsState.layout[i].ComponentControl2 =
525 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
526 ? ComponentControl::StoreSrc
527 : ComponentControl::Store0;
528 velems->fsState.layout[i].ComponentControl3 =
529 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
530 ? ComponentControl::StoreSrc
531 : ComponentControl::Store1Fp;
532 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
533 velems->fsState.layout[i].InstanceDataStepRate =
534 attribs[i].instance_divisor;
535
536 /* Calculate the pitch of each stream */
537 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
538 mesa_to_swr_format(attribs[i].src_format));
539 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
540
541 if (attribs[i].instance_divisor != 0) {
542 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
543 uint32_t *min_instance_div =
544 &velems->min_instance_div[attribs[i].vertex_buffer_index];
545 if (!*min_instance_div ||
546 attribs[i].instance_divisor < *min_instance_div)
547 *min_instance_div = attribs[i].instance_divisor;
548 }
549 }
550 }
551
552 return velems;
553 }
554
555 static void
556 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
557 {
558 struct swr_context *ctx = swr_context(pipe);
559 struct swr_vertex_element_state *swr_velems =
560 (struct swr_vertex_element_state *)velems;
561
562 ctx->velems = swr_velems;
563 ctx->dirty |= SWR_NEW_VERTEX;
564 }
565
566 static void
567 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
568 {
569 struct swr_vertex_element_state *swr_velems =
570 (struct swr_vertex_element_state *) velems;
571 /* XXX Need to destroy fetch shader? */
572 delete swr_velems;
573 }
574
575
576 static void
577 swr_set_vertex_buffers(struct pipe_context *pipe,
578 unsigned start_slot,
579 unsigned num_elements,
580 const struct pipe_vertex_buffer *buffers)
581 {
582 struct swr_context *ctx = swr_context(pipe);
583
584 assert(num_elements <= PIPE_MAX_ATTRIBS);
585
586 util_set_vertex_buffers_count(ctx->vertex_buffer,
587 &ctx->num_vertex_buffers,
588 buffers,
589 start_slot,
590 num_elements);
591
592 ctx->dirty |= SWR_NEW_VERTEX;
593 }
594
595
596 static void
597 swr_set_polygon_stipple(struct pipe_context *pipe,
598 const struct pipe_poly_stipple *stipple)
599 {
600 struct swr_context *ctx = swr_context(pipe);
601
602 ctx->poly_stipple.pipe = *stipple; /* struct copy */
603 ctx->dirty |= SWR_NEW_STIPPLE;
604 }
605
606 static void
607 swr_set_clip_state(struct pipe_context *pipe,
608 const struct pipe_clip_state *clip)
609 {
610 struct swr_context *ctx = swr_context(pipe);
611
612 ctx->clip = *clip;
613 /* XXX Unimplemented, but prevents crash */
614
615 ctx->dirty |= SWR_NEW_CLIP;
616 }
617
618
619 static void
620 swr_set_scissor_states(struct pipe_context *pipe,
621 unsigned start_slot,
622 unsigned num_viewports,
623 const struct pipe_scissor_state *scissor)
624 {
625 struct swr_context *ctx = swr_context(pipe);
626
627 ctx->scissor = *scissor;
628 ctx->swr_scissor.xmin = scissor->minx;
629 ctx->swr_scissor.xmax = scissor->maxx;
630 ctx->swr_scissor.ymin = scissor->miny;
631 ctx->swr_scissor.ymax = scissor->maxy;
632 ctx->dirty |= SWR_NEW_SCISSOR;
633 }
634
635 static void
636 swr_set_viewport_states(struct pipe_context *pipe,
637 unsigned start_slot,
638 unsigned num_viewports,
639 const struct pipe_viewport_state *vpt)
640 {
641 struct swr_context *ctx = swr_context(pipe);
642
643 ctx->viewport = *vpt;
644 ctx->dirty |= SWR_NEW_VIEWPORT;
645 }
646
647
648 static void
649 swr_set_framebuffer_state(struct pipe_context *pipe,
650 const struct pipe_framebuffer_state *fb)
651 {
652 struct swr_context *ctx = swr_context(pipe);
653
654 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
655
656 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
657 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
658
659 if (changed) {
660 util_copy_framebuffer_state(&ctx->framebuffer, fb);
661
662 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
663 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
664
665 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
666 }
667 }
668
669
670 static void
671 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
672 {
673 struct swr_context *ctx = swr_context(pipe);
674
675 if (sample_mask != ctx->sample_mask) {
676 ctx->sample_mask = sample_mask;
677 ctx->dirty |= SWR_NEW_RASTERIZER;
678 }
679 }
680
681 /*
682 * MSAA fixed sample position table
683 * used by update_derived and get_sample_position
684 * (integer locations on a 16x16 grid)
685 */
686 static const uint8_t swr_sample_positions[][2] =
687 { /* 1x*/ { 8, 8},
688 /* 2x*/ {12,12},{ 4, 4},
689 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
690 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
691 { 3,13},{ 1, 7},{11,15},{15, 1},
692 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
693 { 3, 6},{10,13},{13,11},{11, 3},
694 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
695 { 0, 8},{15, 4},{14,15},{ 1, 0} };
696
697 static void
698 swr_get_sample_position(struct pipe_context *pipe,
699 unsigned sample_count, unsigned sample_index,
700 float *out_value)
701 {
702 /* validate sample_count */
703 sample_count = GetNumSamples(GetSampleCount(sample_count));
704
705 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
706 out_value[0] = sample[0] / 16.0f;
707 out_value[1] = sample[1] / 16.0f;
708 }
709
710
711 /*
712 * Update resource in-use status
713 * All resources bound to color or depth targets marked as WRITE resources.
714 * VBO Vertex/index buffers and texture views marked as READ resources.
715 */
716 void
717 swr_update_resource_status(struct pipe_context *pipe,
718 const struct pipe_draw_info *p_draw_info)
719 {
720 struct swr_context *ctx = swr_context(pipe);
721 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
722
723 /* colorbuffer targets */
724 if (fb->nr_cbufs)
725 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
726 if (fb->cbufs[i])
727 swr_resource_write(fb->cbufs[i]->texture);
728
729 /* depth/stencil target */
730 if (fb->zsbuf)
731 swr_resource_write(fb->zsbuf->texture);
732
733 /* VBO vertex buffers */
734 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
735 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
736 if (!vb->is_user_buffer)
737 swr_resource_read(vb->buffer.resource);
738 }
739
740 /* VBO index buffer */
741 if (p_draw_info && p_draw_info->index_size) {
742 if (!p_draw_info->has_user_indices)
743 swr_resource_read(p_draw_info->index.resource);
744 }
745
746 /* transform feedback buffers */
747 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
748 struct pipe_stream_output_target *target = ctx->so_targets[i];
749 if (target && target->buffer)
750 swr_resource_write(target->buffer);
751 }
752
753 /* texture sampler views */
754 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
755 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
756 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
757 if (view)
758 swr_resource_read(view->texture);
759 }
760 }
761
762 /* constant buffers */
763 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
764 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
765 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
766 if (cb->buffer)
767 swr_resource_read(cb->buffer);
768 }
769 }
770 }
771
772 static void
773 swr_update_texture_state(struct swr_context *ctx,
774 enum pipe_shader_type shader_type,
775 unsigned num_sampler_views,
776 swr_jit_texture *textures)
777 {
778 for (unsigned i = 0; i < num_sampler_views; i++) {
779 struct pipe_sampler_view *view =
780 ctx->sampler_views[shader_type][i];
781 struct swr_jit_texture *jit_tex = &textures[i];
782
783 memset(jit_tex, 0, sizeof(*jit_tex));
784 if (view) {
785 struct pipe_resource *res = view->texture;
786 struct swr_resource *swr_res = swr_resource(res);
787 SWR_SURFACE_STATE *swr = &swr_res->swr;
788 size_t *mip_offsets = swr_res->mip_offsets;
789 if (swr_res->has_depth && swr_res->has_stencil &&
790 !util_format_has_depth(util_format_description(view->format))) {
791 swr = &swr_res->secondary;
792 mip_offsets = swr_res->secondary_mip_offsets;
793 }
794
795 jit_tex->width = res->width0;
796 jit_tex->height = res->height0;
797 jit_tex->base_ptr = swr->pBaseAddress;
798 if (view->target != PIPE_BUFFER) {
799 jit_tex->first_level = view->u.tex.first_level;
800 jit_tex->last_level = view->u.tex.last_level;
801 if (view->target == PIPE_TEXTURE_3D)
802 jit_tex->depth = res->depth0;
803 else
804 jit_tex->depth =
805 view->u.tex.last_layer - view->u.tex.first_layer + 1;
806 jit_tex->base_ptr += view->u.tex.first_layer *
807 swr->qpitch * swr->pitch;
808 } else {
809 unsigned view_blocksize = util_format_get_blocksize(view->format);
810 jit_tex->base_ptr += view->u.buf.offset;
811 jit_tex->width = view->u.buf.size / view_blocksize;
812 jit_tex->depth = 1;
813 }
814
815 for (unsigned level = jit_tex->first_level;
816 level <= jit_tex->last_level;
817 level++) {
818 jit_tex->row_stride[level] = swr->pitch;
819 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
820 jit_tex->mip_offsets[level] = mip_offsets[level];
821 }
822 }
823 }
824 }
825
826 static void
827 swr_update_sampler_state(struct swr_context *ctx,
828 enum pipe_shader_type shader_type,
829 unsigned num_samplers,
830 swr_jit_sampler *samplers)
831 {
832 for (unsigned i = 0; i < num_samplers; i++) {
833 const struct pipe_sampler_state *sampler =
834 ctx->samplers[shader_type][i];
835
836 if (sampler) {
837 samplers[i].min_lod = sampler->min_lod;
838 samplers[i].max_lod = sampler->max_lod;
839 samplers[i].lod_bias = sampler->lod_bias;
840 COPY_4V(samplers[i].border_color, sampler->border_color.f);
841 }
842 }
843 }
844
845 static void
846 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
847 {
848 swr_draw_context *pDC = &ctx->swrDC;
849
850 const float **constant;
851 uint32_t *num_constants;
852 struct swr_scratch_space *scratch;
853
854 switch (shaderType) {
855 case PIPE_SHADER_VERTEX:
856 constant = pDC->constantVS;
857 num_constants = pDC->num_constantsVS;
858 scratch = &ctx->scratch->vs_constants;
859 break;
860 case PIPE_SHADER_FRAGMENT:
861 constant = pDC->constantFS;
862 num_constants = pDC->num_constantsFS;
863 scratch = &ctx->scratch->fs_constants;
864 break;
865 case PIPE_SHADER_GEOMETRY:
866 constant = pDC->constantGS;
867 num_constants = pDC->num_constantsGS;
868 scratch = &ctx->scratch->gs_constants;
869 break;
870 default:
871 debug_printf("Unsupported shader type constants\n");
872 return;
873 }
874
875 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
876 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
877 num_constants[i] = cb->buffer_size;
878 if (cb->buffer) {
879 constant[i] =
880 (const float *)(swr_resource_data(cb->buffer) +
881 cb->buffer_offset);
882 } else {
883 /* Need to copy these constants to scratch space */
884 if (cb->user_buffer && cb->buffer_size) {
885 const void *ptr =
886 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
887 uint32_t size = AlignUp(cb->buffer_size, 4);
888 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
889 constant[i] = (const float *)ptr;
890 }
891 }
892 }
893 }
894
895 static bool
896 swr_change_rt(struct swr_context *ctx,
897 unsigned attachment,
898 const struct pipe_surface *sf)
899 {
900 swr_draw_context *pDC = &ctx->swrDC;
901 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
902
903 /* Do nothing if the render target hasn't changed */
904 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
905 return false;
906
907 /* Deal with disabling RT up front */
908 if (!sf || !sf->texture) {
909 /* If detaching attachment, mark tiles as RESOLVED so core
910 * won't try to load from non-existent target. */
911 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
912 *rt = {0};
913 return true;
914 }
915
916 const struct swr_resource *swr = swr_resource(sf->texture);
917 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
918 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
919
920 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
921 swr_surface = &swr->secondary;
922 fmt = swr_surface->format;
923 }
924
925 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
926 rt->format == fmt &&
927 rt->lod == sf->u.tex.level &&
928 rt->arrayIndex == sf->u.tex.first_layer)
929 return false;
930
931 bool need_fence = false;
932
933 /* StoreTile for changed target */
934 if (rt->pBaseAddress) {
935 /* If changing attachment to a new target, mark tiles as
936 * INVALID so they are reloaded from surface. */
937 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
938 need_fence = true;
939 } else {
940 /* if no previous attachment, invalidate tiles that may be marked
941 * RESOLVED because of an old attachment */
942 swr_invalidate_render_target(&ctx->pipe, attachment, sf->width, sf->height);
943 /* no need to set fence here */
944 }
945
946 /* Make new attachment */
947 *rt = *swr_surface;
948 rt->format = fmt;
949 rt->lod = sf->u.tex.level;
950 rt->arrayIndex = sf->u.tex.first_layer;
951
952 return need_fence;
953 }
954
955 static inline void
956 swr_user_vbuf_range(const struct pipe_draw_info *info,
957 const struct swr_vertex_element_state *velems,
958 const struct pipe_vertex_buffer *vb,
959 uint32_t i,
960 uint32_t *totelems,
961 uint32_t *base,
962 uint32_t *size)
963 {
964 /* FIXME: The size is too large - we don't access the full extra stride. */
965 unsigned elems;
966 if (velems->instanced_bufs & (1U << i)) {
967 elems = info->instance_count / velems->min_instance_div[i] + 1;
968 *totelems = info->start_instance + elems;
969 *base = info->start_instance * vb->stride;
970 *size = elems * vb->stride;
971 } else if (vb->stride) {
972 elems = info->max_index - info->min_index + 1;
973 *totelems = info->max_index + 1;
974 *base = info->min_index * vb->stride;
975 *size = elems * vb->stride;
976 } else {
977 *totelems = 1;
978 *base = 0;
979 *size = velems->stream_pitch[i];
980 }
981 }
982
983 static void
984 swr_update_poly_stipple(struct swr_context *ctx)
985 {
986 struct swr_draw_context *pDC = &ctx->swrDC;
987
988 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
989 memcpy(pDC->polyStipple,
990 ctx->poly_stipple.pipe.stipple,
991 sizeof(ctx->poly_stipple.pipe.stipple));
992 }
993
994 void
995 swr_update_derived(struct pipe_context *pipe,
996 const struct pipe_draw_info *p_draw_info)
997 {
998 struct swr_context *ctx = swr_context(pipe);
999 struct swr_screen *screen = swr_screen(pipe->screen);
1000
1001 /* When called from swr_clear (p_draw_info = null), set any null
1002 * state-objects to the dummy state objects to prevent nullptr dereference
1003 * in validation below.
1004 *
1005 * Important that this remains static for zero initialization. These
1006 * aren't meant to be proper state objects, just empty structs. They will
1007 * not be written to.
1008 *
1009 * Shaders can't be part of the union since they contain std::unordered_map
1010 */
1011 static struct {
1012 union {
1013 struct pipe_rasterizer_state rasterizer;
1014 struct pipe_depth_stencil_alpha_state depth_stencil;
1015 struct swr_blend_state blend;
1016 } state;
1017 struct swr_vertex_shader vs;
1018 struct swr_fragment_shader fs;
1019 } swr_dummy;
1020
1021 if (!p_draw_info) {
1022 if (!ctx->rasterizer)
1023 ctx->rasterizer = &swr_dummy.state.rasterizer;
1024 if (!ctx->depth_stencil)
1025 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1026 if (!ctx->blend)
1027 ctx->blend = &swr_dummy.state.blend;
1028 if (!ctx->vs)
1029 ctx->vs = &swr_dummy.vs;
1030 if (!ctx->fs)
1031 ctx->fs = &swr_dummy.fs;
1032 }
1033
1034 /* Update screen->pipe to current pipe context. */
1035 if (screen->pipe != pipe)
1036 screen->pipe = pipe;
1037
1038 /* Any state that requires dirty flags to be re-triggered sets this mask */
1039 /* For example, user_buffer vertex and index buffers. */
1040 unsigned post_update_dirty_flags = 0;
1041
1042 /* Render Targets */
1043 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1044 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1045 const struct util_format_description *desc = NULL;
1046 bool need_fence = false;
1047
1048 /* colorbuffer targets */
1049 if (fb->nr_cbufs) {
1050 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1051 need_fence |= swr_change_rt(
1052 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1053 }
1054 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1055 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1056
1057 /* depth/stencil target */
1058 if (fb->zsbuf)
1059 desc = util_format_description(fb->zsbuf->format);
1060 if (fb->zsbuf && util_format_has_depth(desc))
1061 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1062 else
1063 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1064
1065 if (fb->zsbuf && util_format_has_stencil(desc))
1066 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1067 else
1068 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1069
1070 /* This fence ensures any attachment changes are resolved before the
1071 * next draw */
1072 if (need_fence)
1073 swr_fence_submit(ctx, screen->flush_fence);
1074 }
1075
1076 /* Raster state */
1077 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1078 SWR_NEW_VS | // clipping
1079 SWR_NEW_FRAMEBUFFER)) {
1080 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1081 pipe_framebuffer_state *fb = &ctx->framebuffer;
1082
1083 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1084 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1085 rastState->frontWinding = rasterizer->front_ccw
1086 ? SWR_FRONTWINDING_CCW
1087 : SWR_FRONTWINDING_CW;
1088 rastState->scissorEnable = rasterizer->scissor;
1089 rastState->pointSize = rasterizer->point_size > 0.0f
1090 ? rasterizer->point_size
1091 : 1.0f;
1092 rastState->lineWidth = rasterizer->line_width > 0.0f
1093 ? rasterizer->line_width
1094 : 1.0f;
1095
1096 rastState->pointParam = rasterizer->point_size_per_vertex;
1097
1098 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1099 rastState->pointSpriteTopOrigin =
1100 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1101
1102 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1103 if (screen->msaa_force_enable && !rasterizer->multisample) {
1104 /* Force enable and use the value the surface was created with */
1105 rasterizer->multisample = true;
1106 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1107 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1108 }
1109
1110 rastState->sampleCount = GetSampleCount(fb->samples);
1111 rastState->forcedSampleCount = false;
1112 rastState->bIsCenterPattern = !rasterizer->multisample;
1113 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1114
1115 /* Only initialize sample positions if msaa is enabled */
1116 if (rasterizer->multisample) {
1117 for (uint32_t i = 0; i < fb->samples; i++) {
1118 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1119 rastState->samplePositions.SetXi(i, sample[0] << 4);
1120 rastState->samplePositions.SetYi(i, sample[1] << 4);
1121 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1122 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1123 }
1124 rastState->samplePositions.PrecalcSampleData(fb->samples);
1125 }
1126
1127 bool do_offset = false;
1128 switch (rasterizer->fill_front) {
1129 case PIPE_POLYGON_MODE_FILL:
1130 do_offset = rasterizer->offset_tri;
1131 break;
1132 case PIPE_POLYGON_MODE_LINE:
1133 do_offset = rasterizer->offset_line;
1134 break;
1135 case PIPE_POLYGON_MODE_POINT:
1136 do_offset = rasterizer->offset_point;
1137 break;
1138 }
1139
1140 if (do_offset) {
1141 rastState->depthBias = rasterizer->offset_units;
1142 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1143 rastState->depthBiasClamp = rasterizer->offset_clamp;
1144 } else {
1145 rastState->depthBias = 0;
1146 rastState->slopeScaledDepthBias = 0;
1147 rastState->depthBiasClamp = 0;
1148 }
1149
1150 /* translate polygon mode, at least for the front==back case */
1151 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front);
1152
1153 struct pipe_surface *zb = fb->zsbuf;
1154 if (zb && swr_resource(zb->texture)->has_depth)
1155 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1156
1157 rastState->depthClipEnable = rasterizer->depth_clip;
1158 rastState->clipHalfZ = rasterizer->clip_halfz;
1159
1160 rastState->clipDistanceMask =
1161 ctx->vs->info.base.num_written_clipdistance ?
1162 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
1163 rasterizer->clip_plane_enable;
1164
1165 rastState->cullDistanceMask =
1166 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
1167
1168 SwrSetRastState(ctx->swrContext, rastState);
1169 }
1170
1171 /* Scissor */
1172 if (ctx->dirty & SWR_NEW_SCISSOR) {
1173 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
1174 }
1175
1176 /* Viewport */
1177 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1178 | SWR_NEW_RASTERIZER)) {
1179 pipe_viewport_state *state = &ctx->viewport;
1180 pipe_framebuffer_state *fb = &ctx->framebuffer;
1181 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1182
1183 SWR_VIEWPORT *vp = &ctx->derived.vp;
1184 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1185
1186 vp->x = state->translate[0] - state->scale[0];
1187 vp->width = 2 * state->scale[0];
1188 vp->y = state->translate[1] - fabs(state->scale[1]);
1189 vp->height = 2 * fabs(state->scale[1]);
1190 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1191 &vp->minZ, &vp->maxZ);
1192
1193 vpm->m00[0] = state->scale[0];
1194 vpm->m11[0] = state->scale[1];
1195 vpm->m22[0] = state->scale[2];
1196 vpm->m30[0] = state->translate[0];
1197 vpm->m31[0] = state->translate[1];
1198 vpm->m32[0] = state->translate[2];
1199
1200 /* Now that the matrix is calculated, clip the view coords to screen
1201 * size. OpenGL allows for -ve x,y in the viewport. */
1202 if (vp->x < 0.0f) {
1203 vp->width += vp->x;
1204 vp->x = 0.0f;
1205 }
1206 if (vp->y < 0.0f) {
1207 vp->height += vp->y;
1208 vp->y = 0.0f;
1209 }
1210 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1211 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1212
1213 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1214 }
1215
1216 /* Set vertex & index buffers
1217 * (using draw info if called by swr_draw_vbo)
1218 * If indexed draw, revalidate since index buffer comes from
1219 * pipe_draw_info.
1220 */
1221 if (ctx->dirty & SWR_NEW_VERTEX ||
1222 (p_draw_info && p_draw_info->index_size)) {
1223
1224 /* If being called by swr_draw_vbo, copy draw details */
1225 struct pipe_draw_info info = {0};
1226 if (p_draw_info)
1227 info = *p_draw_info;
1228
1229 /* vertex buffers */
1230 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1231 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1232 uint32_t size, pitch, elems, partial_inbounds;
1233 uint32_t min_vertex_index;
1234 const uint8_t *p_data;
1235 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1236
1237 pitch = vb->stride;
1238 if (!vb->is_user_buffer) {
1239 /* VBO */
1240 if (!pitch) {
1241 /* If pitch=0 (ie vb->stride), buffer contains a single
1242 * constant attribute. Use the stream_pitch which was
1243 * calculated during creation of vertex_elements_state for the
1244 * size of the attribute. */
1245 size = ctx->velems->stream_pitch[i];
1246 elems = 1;
1247 partial_inbounds = 0;
1248 min_vertex_index = 0;
1249 } else {
1250 /* size is based on buffer->width0 rather than info.max_index
1251 * to prevent having to validate VBO on each draw. */
1252 size = vb->buffer.resource->width0;
1253 elems = size / pitch;
1254 partial_inbounds = size % pitch;
1255 min_vertex_index = 0;
1256 }
1257
1258 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset;
1259 } else {
1260 /* Client buffer
1261 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1262 * revalidate on each draw */
1263 post_update_dirty_flags |= SWR_NEW_VERTEX;
1264
1265 uint32_t base;
1266 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1267 partial_inbounds = 0;
1268 min_vertex_index = info.min_index;
1269
1270 /* Copy only needed vertices to scratch space */
1271 size = AlignUp(size, 4);
1272 const void *ptr = (const uint8_t *) vb->buffer.user + base;
1273 ptr = (uint8_t *)swr_copy_to_scratch_space(
1274 ctx, &ctx->scratch->vertex_buffer, ptr, size);
1275 p_data = (const uint8_t *)ptr - base;
1276 }
1277
1278 swrVertexBuffers[i] = {0};
1279 swrVertexBuffers[i].index = i;
1280 swrVertexBuffers[i].pitch = pitch;
1281 swrVertexBuffers[i].pData = p_data;
1282 swrVertexBuffers[i].size = size;
1283 swrVertexBuffers[i].minVertex = min_vertex_index;
1284 swrVertexBuffers[i].maxVertex = elems;
1285 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1286 }
1287
1288 SwrSetVertexBuffers(
1289 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1290
1291 /* index buffer, if required (info passed in by swr_draw_vbo) */
1292 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1293 if (info.index_size) {
1294 const uint8_t *p_data;
1295 uint32_t size, pitch;
1296
1297 pitch = info.index_size ? info.index_size : sizeof(uint32_t);
1298 index_type = swr_convert_index_type(pitch);
1299
1300 if (!info.has_user_indices) {
1301 /* VBO
1302 * size is based on buffer->width0 rather than info.count
1303 * to prevent having to validate VBO on each draw */
1304 size = info.index.resource->width0;
1305 p_data = swr_resource_data(info.index.resource);
1306 } else {
1307 /* Client buffer
1308 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1309 * revalidate on each draw */
1310 post_update_dirty_flags |= SWR_NEW_VERTEX;
1311
1312 size = info.count * pitch;
1313 size = AlignUp(size, 4);
1314
1315 /* Copy indices to scratch space */
1316 const void *ptr = info.index.user;
1317 ptr = swr_copy_to_scratch_space(
1318 ctx, &ctx->scratch->index_buffer, ptr, size);
1319 p_data = (const uint8_t *)ptr;
1320 }
1321
1322 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1323 swrIndexBuffer.format = swr_convert_index_type(info.index_size);
1324 swrIndexBuffer.pIndices = p_data;
1325 swrIndexBuffer.size = size;
1326
1327 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1328 }
1329
1330 struct swr_vertex_element_state *velems = ctx->velems;
1331 if (velems && velems->fsState.indexType != index_type) {
1332 velems->fsFunc = NULL;
1333 velems->fsState.indexType = index_type;
1334 }
1335 }
1336
1337 /* GeometryShader */
1338 if (ctx->dirty & (SWR_NEW_GS |
1339 SWR_NEW_VS |
1340 SWR_NEW_SAMPLER |
1341 SWR_NEW_SAMPLER_VIEW)) {
1342 if (ctx->gs) {
1343 swr_jit_gs_key key;
1344 swr_generate_gs_key(key, ctx, ctx->gs);
1345 auto search = ctx->gs->map.find(key);
1346 PFN_GS_FUNC func;
1347 if (search != ctx->gs->map.end()) {
1348 func = search->second->shader;
1349 } else {
1350 func = swr_compile_gs(ctx, key);
1351 }
1352 SwrSetGsFunc(ctx->swrContext, func);
1353
1354 /* JIT sampler state */
1355 if (ctx->dirty & SWR_NEW_SAMPLER) {
1356 swr_update_sampler_state(ctx,
1357 PIPE_SHADER_GEOMETRY,
1358 key.nr_samplers,
1359 ctx->swrDC.samplersGS);
1360 }
1361
1362 /* JIT sampler view state */
1363 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1364 swr_update_texture_state(ctx,
1365 PIPE_SHADER_GEOMETRY,
1366 key.nr_sampler_views,
1367 ctx->swrDC.texturesGS);
1368 }
1369
1370 SwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1371 } else {
1372 SWR_GS_STATE state = { 0 };
1373 SwrSetGsState(ctx->swrContext, &state);
1374 SwrSetGsFunc(ctx->swrContext, NULL);
1375 }
1376 }
1377
1378 /* VertexShader */
1379 if (ctx->dirty & (SWR_NEW_VS |
1380 SWR_NEW_RASTERIZER | // for clip planes
1381 SWR_NEW_SAMPLER |
1382 SWR_NEW_SAMPLER_VIEW |
1383 SWR_NEW_FRAMEBUFFER)) {
1384 swr_jit_vs_key key;
1385 swr_generate_vs_key(key, ctx, ctx->vs);
1386 auto search = ctx->vs->map.find(key);
1387 PFN_VERTEX_FUNC func;
1388 if (search != ctx->vs->map.end()) {
1389 func = search->second->shader;
1390 } else {
1391 func = swr_compile_vs(ctx, key);
1392 }
1393 SwrSetVertexFunc(ctx->swrContext, func);
1394
1395 /* JIT sampler state */
1396 if (ctx->dirty & SWR_NEW_SAMPLER) {
1397 swr_update_sampler_state(ctx,
1398 PIPE_SHADER_VERTEX,
1399 key.nr_samplers,
1400 ctx->swrDC.samplersVS);
1401 }
1402
1403 /* JIT sampler view state */
1404 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1405 swr_update_texture_state(ctx,
1406 PIPE_SHADER_VERTEX,
1407 key.nr_sampler_views,
1408 ctx->swrDC.texturesVS);
1409 }
1410 }
1411
1412 /* work around the fact that poly stipple also affects lines */
1413 /* and points, since we rasterize them as triangles, too */
1414 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1415 if (p_draw_info) {
1416 bool new_prim_is_poly =
1417 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) &&
1418 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID);
1419 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1420 ctx->dirty |= SWR_NEW_FS;
1421 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1422 }
1423 }
1424
1425 /* FragmentShader */
1426 if (ctx->dirty & (SWR_NEW_FS |
1427 SWR_NEW_VS |
1428 SWR_NEW_GS |
1429 SWR_NEW_RASTERIZER |
1430 SWR_NEW_SAMPLER |
1431 SWR_NEW_SAMPLER_VIEW |
1432 SWR_NEW_FRAMEBUFFER)) {
1433 swr_jit_fs_key key;
1434 swr_generate_fs_key(key, ctx, ctx->fs);
1435 auto search = ctx->fs->map.find(key);
1436 PFN_PIXEL_KERNEL func;
1437 if (search != ctx->fs->map.end()) {
1438 func = search->second->shader;
1439 } else {
1440 func = swr_compile_fs(ctx, key);
1441 }
1442 SWR_PS_STATE psState = {0};
1443 psState.pfnPixelShader = func;
1444 psState.killsPixel = ctx->fs->info.base.uses_kill;
1445 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1446 psState.writesODepth = ctx->fs->info.base.writes_z;
1447 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1448 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1449 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1450 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1451 uint32_t barycentricsMask = 0;
1452 #if 0
1453 // when we switch to mesa-master
1454 if (ctx->fs->info.base.uses_persp_center ||
1455 ctx->fs->info.base.uses_linear_center)
1456 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1457 if (ctx->fs->info.base.uses_persp_centroid ||
1458 ctx->fs->info.base.uses_linear_centroid)
1459 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1460 if (ctx->fs->info.base.uses_persp_sample ||
1461 ctx->fs->info.base.uses_linear_sample)
1462 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1463 #else
1464 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1465 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1466 case TGSI_INTERPOLATE_LOC_CENTER:
1467 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1468 break;
1469 case TGSI_INTERPOLATE_LOC_CENTROID:
1470 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1471 break;
1472 case TGSI_INTERPOLATE_LOC_SAMPLE:
1473 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1474 break;
1475 }
1476 }
1477 #endif
1478 psState.barycentricsMask = barycentricsMask;
1479 psState.usesUAV = false; // XXX
1480 psState.forceEarlyZ = false;
1481 SwrSetPixelShaderState(ctx->swrContext, &psState);
1482
1483 /* JIT sampler state */
1484 if (ctx->dirty & (SWR_NEW_SAMPLER |
1485 SWR_NEW_FS)) {
1486 swr_update_sampler_state(ctx,
1487 PIPE_SHADER_FRAGMENT,
1488 key.nr_samplers,
1489 ctx->swrDC.samplersFS);
1490 }
1491
1492 /* JIT sampler view state */
1493 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1494 SWR_NEW_FRAMEBUFFER |
1495 SWR_NEW_FS)) {
1496 swr_update_texture_state(ctx,
1497 PIPE_SHADER_FRAGMENT,
1498 key.nr_sampler_views,
1499 ctx->swrDC.texturesFS);
1500 }
1501 }
1502
1503
1504 /* VertexShader Constants */
1505 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1506 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1507 }
1508
1509 /* FragmentShader Constants */
1510 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1511 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1512 }
1513
1514 /* GeometryShader Constants */
1515 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1516 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1517 }
1518
1519 /* Depth/stencil state */
1520 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1521 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1522 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1523 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1524 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1525
1526 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1527 struct pipe_stencil_state *front_stencil =
1528 ctx->depth_stencil.stencil[0];
1529 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1530 struct pipe_alpha_state alpha;
1531 */
1532 if (stencil[0].enabled) {
1533 depthStencilState.stencilWriteEnable = 1;
1534 depthStencilState.stencilTestEnable = 1;
1535 depthStencilState.stencilTestFunc =
1536 swr_convert_depth_func(stencil[0].func);
1537
1538 depthStencilState.stencilPassDepthPassOp =
1539 swr_convert_stencil_op(stencil[0].zpass_op);
1540 depthStencilState.stencilPassDepthFailOp =
1541 swr_convert_stencil_op(stencil[0].zfail_op);
1542 depthStencilState.stencilFailOp =
1543 swr_convert_stencil_op(stencil[0].fail_op);
1544 depthStencilState.stencilWriteMask = stencil[0].writemask;
1545 depthStencilState.stencilTestMask = stencil[0].valuemask;
1546 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1547 }
1548 if (stencil[1].enabled) {
1549 depthStencilState.doubleSidedStencilTestEnable = 1;
1550
1551 depthStencilState.backfaceStencilTestFunc =
1552 swr_convert_depth_func(stencil[1].func);
1553
1554 depthStencilState.backfaceStencilPassDepthPassOp =
1555 swr_convert_stencil_op(stencil[1].zpass_op);
1556 depthStencilState.backfaceStencilPassDepthFailOp =
1557 swr_convert_stencil_op(stencil[1].zfail_op);
1558 depthStencilState.backfaceStencilFailOp =
1559 swr_convert_stencil_op(stencil[1].fail_op);
1560 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1561 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1562
1563 depthStencilState.backfaceStencilRefValue =
1564 ctx->stencil_ref.ref_value[1];
1565 }
1566
1567 depthStencilState.depthTestEnable = depth->enabled;
1568 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1569 depthStencilState.depthWriteEnable = depth->writemask;
1570 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1571
1572 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1573 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1574 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1575 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1576 }
1577
1578 /* Blend State */
1579 if (ctx->dirty & (SWR_NEW_BLEND |
1580 SWR_NEW_RASTERIZER |
1581 SWR_NEW_FRAMEBUFFER |
1582 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1583 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1584
1585 SWR_BLEND_STATE blendState;
1586 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1587 blendState.constantColor[0] = ctx->blend_color.color[0];
1588 blendState.constantColor[1] = ctx->blend_color.color[1];
1589 blendState.constantColor[2] = ctx->blend_color.color[2];
1590 blendState.constantColor[3] = ctx->blend_color.color[3];
1591 blendState.alphaTestReference =
1592 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1593
1594 blendState.sampleMask = ctx->sample_mask;
1595 blendState.sampleCount = GetSampleCount(fb->samples);
1596
1597 /* If there are no color buffers bound, disable writes on RT0
1598 * and skip loop */
1599 if (fb->nr_cbufs == 0) {
1600 blendState.renderTarget[0].writeDisableRed = 1;
1601 blendState.renderTarget[0].writeDisableGreen = 1;
1602 blendState.renderTarget[0].writeDisableBlue = 1;
1603 blendState.renderTarget[0].writeDisableAlpha = 1;
1604 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1605 }
1606 else
1607 for (int target = 0;
1608 target < std::min(SWR_NUM_RENDERTARGETS,
1609 PIPE_MAX_COLOR_BUFS);
1610 target++) {
1611 if (!fb->cbufs[target])
1612 continue;
1613
1614 struct swr_resource *colorBuffer =
1615 swr_resource(fb->cbufs[target]->texture);
1616
1617 BLEND_COMPILE_STATE compileState;
1618 memset(&compileState, 0, sizeof(compileState));
1619 compileState.format = colorBuffer->swr.format;
1620 memcpy(&compileState.blendState,
1621 &ctx->blend->compileState[target],
1622 sizeof(compileState.blendState));
1623
1624 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1625 if (compileState.blendState.logicOpEnable &&
1626 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1627 compileState.blendState.logicOpEnable = false;
1628 }
1629
1630 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1631 compileState.blendState.blendEnable = false;
1632
1633 if (compileState.blendState.blendEnable == false &&
1634 compileState.blendState.logicOpEnable == false &&
1635 ctx->depth_stencil->alpha.enabled == 0) {
1636 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1637 continue;
1638 }
1639
1640 compileState.desc.alphaTestEnable =
1641 ctx->depth_stencil->alpha.enabled;
1642 compileState.desc.independentAlphaBlendEnable =
1643 (compileState.blendState.sourceBlendFactor !=
1644 compileState.blendState.sourceAlphaBlendFactor) ||
1645 (compileState.blendState.destBlendFactor !=
1646 compileState.blendState.destAlphaBlendFactor) ||
1647 (compileState.blendState.colorBlendFunc !=
1648 compileState.blendState.alphaBlendFunc);
1649 compileState.desc.alphaToCoverageEnable =
1650 ctx->blend->pipe.alpha_to_coverage;
1651 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1652 compileState.desc.numSamples = fb->samples;
1653
1654 compileState.alphaTestFunction =
1655 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1656 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1657
1658 compileState.Canonicalize();
1659
1660 PFN_BLEND_JIT_FUNC func = NULL;
1661 auto search = ctx->blendJIT->find(compileState);
1662 if (search != ctx->blendJIT->end()) {
1663 func = search->second;
1664 } else {
1665 HANDLE hJitMgr = screen->hJitMgr;
1666 func = JitCompileBlend(hJitMgr, compileState);
1667 debug_printf("BLEND shader %p\n", func);
1668 assert(func && "Error: BlendShader = NULL");
1669
1670 ctx->blendJIT->insert(std::make_pair(compileState, func));
1671 }
1672 SwrSetBlendFunc(ctx->swrContext, target, func);
1673 }
1674
1675 SwrSetBlendState(ctx->swrContext, &blendState);
1676 }
1677
1678 if (ctx->dirty & SWR_NEW_STIPPLE) {
1679 swr_update_poly_stipple(ctx);
1680 }
1681
1682 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1683 ctx->vs->soState.rasterizerDisable =
1684 ctx->rasterizer->rasterizer_discard;
1685 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1686
1687 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1688
1689 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1690 SWR_STREAMOUT_BUFFER buffer = {0};
1691 if (!ctx->so_targets[i])
1692 continue;
1693 buffer.enable = true;
1694 buffer.pBuffer =
1695 (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) +
1696 ctx->so_targets[i]->buffer_offset);
1697 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1698 buffer.pitch = stream_output->stride[i];
1699 buffer.streamOffset = 0;
1700
1701 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1702 }
1703 }
1704
1705 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1706 // shader exporting clip distances overrides all user clip planes
1707 if (ctx->rasterizer->clip_plane_enable &&
1708 !ctx->vs->info.base.num_written_clipdistance)
1709 {
1710 swr_draw_context *pDC = &ctx->swrDC;
1711 memcpy(pDC->userClipPlanes,
1712 ctx->clip.ucp,
1713 sizeof(pDC->userClipPlanes));
1714 }
1715 }
1716
1717 // set up backend state
1718 SWR_BACKEND_STATE backendState = {0};
1719 if (ctx->gs) {
1720 backendState.numAttributes = ctx->gs->info.base.num_outputs - 1;
1721 } else {
1722 backendState.numAttributes = ctx->vs->info.base.num_outputs - 1;
1723 if (ctx->fs->info.base.uses_primid) {
1724 backendState.numAttributes++;
1725 backendState.swizzleEnable = true;
1726 for (unsigned i = 0; i < sizeof(backendState.numComponents); i++) {
1727 backendState.swizzleMap[i].sourceAttrib = i;
1728 }
1729 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].constantSource =
1730 SWR_CONSTANT_SOURCE_PRIM_ID;
1731 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].componentOverrideMask = 1;
1732 }
1733 }
1734 if (ctx->rasterizer->sprite_coord_enable)
1735 backendState.numAttributes++;
1736
1737 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
1738 sizeof(backendState.numComponents));
1739 for (unsigned i = 0; i < backendState.numAttributes; i++)
1740 backendState.numComponents[i] = 4;
1741 backendState.constantInterpolationMask = ctx->fs->constantMask |
1742 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1743 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1744
1745 struct tgsi_shader_info *pLastFE =
1746 ctx->gs ?
1747 &ctx->gs->info.base :
1748 &ctx->vs->info.base;
1749 backendState.readRenderTargetArrayIndex = pLastFE->writes_layer;
1750 backendState.readViewportArrayIndex = pLastFE->writes_viewport_index;
1751 backendState.vertexAttribOffset = VERTEX_ATTRIB_START_SLOT; // TODO: optimize
1752
1753 SwrSetBackendState(ctx->swrContext, &backendState);
1754
1755 /* Ensure that any in-progress attachment change StoreTiles finish */
1756 if (swr_is_fence_pending(screen->flush_fence))
1757 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1758
1759 /* Finally, update the in-use status of all resources involved in draw */
1760 swr_update_resource_status(pipe, p_draw_info);
1761
1762 ctx->dirty = post_update_dirty_flags;
1763 }
1764
1765
1766 static struct pipe_stream_output_target *
1767 swr_create_so_target(struct pipe_context *pipe,
1768 struct pipe_resource *buffer,
1769 unsigned buffer_offset,
1770 unsigned buffer_size)
1771 {
1772 struct pipe_stream_output_target *target;
1773
1774 target = CALLOC_STRUCT(pipe_stream_output_target);
1775 if (!target)
1776 return NULL;
1777
1778 target->context = pipe;
1779 target->reference.count = 1;
1780 pipe_resource_reference(&target->buffer, buffer);
1781 target->buffer_offset = buffer_offset;
1782 target->buffer_size = buffer_size;
1783 return target;
1784 }
1785
1786 static void
1787 swr_destroy_so_target(struct pipe_context *pipe,
1788 struct pipe_stream_output_target *target)
1789 {
1790 pipe_resource_reference(&target->buffer, NULL);
1791 FREE(target);
1792 }
1793
1794 static void
1795 swr_set_so_targets(struct pipe_context *pipe,
1796 unsigned num_targets,
1797 struct pipe_stream_output_target **targets,
1798 const unsigned *offsets)
1799 {
1800 struct swr_context *swr = swr_context(pipe);
1801 uint32_t i;
1802
1803 assert(num_targets <= MAX_SO_STREAMS);
1804
1805 for (i = 0; i < num_targets; i++) {
1806 pipe_so_target_reference(
1807 (struct pipe_stream_output_target **)&swr->so_targets[i],
1808 targets[i]);
1809 }
1810
1811 for (/* fall-through */; i < swr->num_so_targets; i++) {
1812 pipe_so_target_reference(
1813 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1814 }
1815
1816 swr->num_so_targets = num_targets;
1817
1818 swr->dirty |= SWR_NEW_SO;
1819 }
1820
1821
1822 void
1823 swr_state_init(struct pipe_context *pipe)
1824 {
1825 pipe->create_blend_state = swr_create_blend_state;
1826 pipe->bind_blend_state = swr_bind_blend_state;
1827 pipe->delete_blend_state = swr_delete_blend_state;
1828
1829 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1830 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1831 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1832
1833 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1834 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1835 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1836
1837 pipe->create_sampler_state = swr_create_sampler_state;
1838 pipe->bind_sampler_states = swr_bind_sampler_states;
1839 pipe->delete_sampler_state = swr_delete_sampler_state;
1840
1841 pipe->create_sampler_view = swr_create_sampler_view;
1842 pipe->set_sampler_views = swr_set_sampler_views;
1843 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1844
1845 pipe->create_vs_state = swr_create_vs_state;
1846 pipe->bind_vs_state = swr_bind_vs_state;
1847 pipe->delete_vs_state = swr_delete_vs_state;
1848
1849 pipe->create_fs_state = swr_create_fs_state;
1850 pipe->bind_fs_state = swr_bind_fs_state;
1851 pipe->delete_fs_state = swr_delete_fs_state;
1852
1853 pipe->create_gs_state = swr_create_gs_state;
1854 pipe->bind_gs_state = swr_bind_gs_state;
1855 pipe->delete_gs_state = swr_delete_gs_state;
1856
1857 pipe->set_constant_buffer = swr_set_constant_buffer;
1858
1859 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1860 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1861 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1862
1863 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1864
1865 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1866 pipe->set_clip_state = swr_set_clip_state;
1867 pipe->set_scissor_states = swr_set_scissor_states;
1868 pipe->set_viewport_states = swr_set_viewport_states;
1869
1870 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1871
1872 pipe->set_blend_color = swr_set_blend_color;
1873 pipe->set_stencil_ref = swr_set_stencil_ref;
1874
1875 pipe->set_sample_mask = swr_set_sample_mask;
1876 pipe->get_sample_position = swr_get_sample_position;
1877
1878 pipe->create_stream_output_target = swr_create_so_target;
1879 pipe->stream_output_target_destroy = swr_destroy_so_target;
1880 pipe->set_stream_output_targets = swr_set_so_targets;
1881 }