v3d: Add support for texturing from linear.
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "v3d_drm.h"
40 #include "v3d_screen.h"
41
42 struct v3d_job;
43 struct v3d_bo;
44 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
45
46 #include "v3d_bufmgr.h"
47 #include "v3d_resource.h"
48 #include "v3d_cl.h"
49
50 #ifdef USE_V3D_SIMULATOR
51 #define using_v3d_simulator true
52 #else
53 #define using_v3d_simulator false
54 #endif
55
56 #define VC5_DIRTY_BLEND (1 << 0)
57 #define VC5_DIRTY_RASTERIZER (1 << 1)
58 #define VC5_DIRTY_ZSA (1 << 2)
59 #define VC5_DIRTY_FRAGTEX (1 << 3)
60 #define VC5_DIRTY_VERTTEX (1 << 4)
61
62 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
63 #define VC5_DIRTY_STENCIL_REF (1 << 8)
64 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
65 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
66 #define VC5_DIRTY_STIPPLE (1 << 11)
67 #define VC5_DIRTY_VIEWPORT (1 << 12)
68 #define VC5_DIRTY_CONSTBUF (1 << 13)
69 #define VC5_DIRTY_VTXSTATE (1 << 14)
70 #define VC5_DIRTY_VTXBUF (1 << 15)
71 #define VC5_DIRTY_SCISSOR (1 << 17)
72 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
73 #define VC5_DIRTY_PRIM_MODE (1 << 19)
74 #define VC5_DIRTY_CLIP (1 << 20)
75 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
76 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
77 #define VC5_DIRTY_COMPILED_CS (1 << 23)
78 #define VC5_DIRTY_COMPILED_VS (1 << 24)
79 #define VC5_DIRTY_COMPILED_FS (1 << 25)
80 #define VC5_DIRTY_FS_INPUTS (1 << 26)
81 #define VC5_DIRTY_STREAMOUT (1 << 27)
82 #define VC5_DIRTY_OQ (1 << 28)
83 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
84 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
85
86 #define VC5_MAX_FS_INPUTS 64
87
88 struct v3d_sampler_view {
89 struct pipe_sampler_view base;
90 uint32_t p0;
91 uint32_t p1;
92 /* Precomputed swizzles to pass in to the shader key. */
93 uint8_t swizzle[4];
94
95 uint8_t texture_shader_state[32];
96 /* V3D 4.x: Texture state struct. */
97 struct v3d_bo *bo;
98
99 /* Actual texture to be read by this sampler view. May be different
100 * from base.texture in the case of having a shadow tiled copy of a
101 * raster texture.
102 */
103 struct pipe_resource *texture;
104 };
105
106 struct v3d_sampler_state {
107 struct pipe_sampler_state base;
108 uint32_t p0;
109 uint32_t p1;
110
111 /* V3D 3.x: Packed texture state. */
112 uint8_t texture_shader_state[32];
113 /* V3D 4.x: Sampler state struct. */
114 struct v3d_bo *bo;
115 };
116
117 struct v3d_texture_stateobj {
118 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
119 unsigned num_textures;
120 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
121 unsigned num_samplers;
122 struct v3d_cl_reloc texture_state[PIPE_MAX_SAMPLERS];
123 };
124
125 struct v3d_shader_uniform_info {
126 enum quniform_contents *contents;
127 uint32_t *data;
128 uint32_t count;
129 };
130
131 struct v3d_uncompiled_shader {
132 /** A name for this program, so you can track it in shader-db output. */
133 uint32_t program_id;
134 /** How many variants of this program were compiled, for shader-db. */
135 uint32_t compiled_variant_count;
136 struct pipe_shader_state base;
137 uint32_t num_tf_outputs;
138 struct v3d_varying_slot *tf_outputs;
139 uint16_t tf_specs[16];
140 uint16_t tf_specs_psiz[16];
141 uint32_t num_tf_specs;
142
143 /**
144 * Flag for if the NIR in this shader originally came from TGSI. If
145 * so, we need to do some fixups at compile time, due to missing
146 * information in TGSI that exists in NIR.
147 */
148 bool was_tgsi;
149 };
150
151 struct v3d_compiled_shader {
152 struct pipe_resource *resource;
153 uint32_t offset;
154
155 union {
156 struct v3d_prog_data *base;
157 struct v3d_vs_prog_data *vs;
158 struct v3d_fs_prog_data *fs;
159 } prog_data;
160
161 /**
162 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
163 * uniforms have to be rewritten (and therefore the shader state
164 * reemitted).
165 */
166 uint32_t uniform_dirty_bits;
167 };
168
169 struct v3d_program_stateobj {
170 struct v3d_uncompiled_shader *bind_vs, *bind_fs;
171 struct v3d_compiled_shader *cs, *vs, *fs;
172
173 struct v3d_bo *spill_bo;
174 int spill_size_per_thread;
175 };
176
177 struct v3d_constbuf_stateobj {
178 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
179 uint32_t enabled_mask;
180 uint32_t dirty_mask;
181 };
182
183 struct v3d_vertexbuf_stateobj {
184 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
185 unsigned count;
186 uint32_t enabled_mask;
187 uint32_t dirty_mask;
188 };
189
190 struct v3d_vertex_stateobj {
191 struct pipe_vertex_element pipe[VC5_MAX_ATTRIBUTES];
192 unsigned num_elements;
193
194 uint8_t attrs[16 * VC5_MAX_ATTRIBUTES];
195 struct pipe_resource *defaults;
196 uint32_t defaults_offset;
197 };
198
199 struct v3d_streamout_stateobj {
200 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
201 /* Number of vertices we've written into the buffer so far. */
202 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
203 unsigned num_targets;
204 };
205
206 /* Hash table key for v3d->jobs */
207 struct v3d_job_key {
208 struct pipe_surface *cbufs[4];
209 struct pipe_surface *zsbuf;
210 };
211
212 enum v3d_ez_state {
213 VC5_EZ_UNDECIDED = 0,
214 VC5_EZ_GT_GE,
215 VC5_EZ_LT_LE,
216 VC5_EZ_DISABLED,
217 };
218
219 /**
220 * A complete bin/render job.
221 *
222 * This is all of the state necessary to submit a bin/render to the kernel.
223 * We want to be able to have multiple in progress at a time, so that we don't
224 * need to flush an existing CL just to switch to rendering to a new render
225 * target (which would mean reading back from the old render target when
226 * starting to render to it again).
227 */
228 struct v3d_job {
229 struct v3d_context *v3d;
230 struct v3d_cl bcl;
231 struct v3d_cl rcl;
232 struct v3d_cl indirect;
233 struct v3d_bo *tile_alloc;
234 struct v3d_bo *tile_state;
235 uint32_t shader_rec_count;
236
237 struct drm_v3d_submit_cl submit;
238
239 /**
240 * Set of all BOs referenced by the job. This will be used for making
241 * the list of BOs that the kernel will need to have paged in to
242 * execute our job.
243 */
244 struct set *bos;
245
246 /** Sum of the sizes of the BOs referenced by the job. */
247 uint32_t referenced_size;
248
249 struct set *write_prscs;
250
251 /* Size of the submit.bo_handles array. */
252 uint32_t bo_handles_size;
253
254 /** @{ Surfaces to submit rendering for. */
255 struct pipe_surface *cbufs[4];
256 struct pipe_surface *zsbuf;
257 /** @} */
258 /** @{
259 * Bounding box of the scissor across all queued drawing.
260 *
261 * Note that the max values are exclusive.
262 */
263 uint32_t draw_min_x;
264 uint32_t draw_min_y;
265 uint32_t draw_max_x;
266 uint32_t draw_max_y;
267 /** @} */
268 /** @{
269 * Width/height of the color framebuffer being rendered to,
270 * for VC5_TILE_RENDERING_MODE_CONFIG.
271 */
272 uint32_t draw_width;
273 uint32_t draw_height;
274 /** @} */
275 /** @{ Tile information, depending on MSAA and float color buffer. */
276 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
277 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
278
279 uint32_t tile_width; /** @< Width of a tile. */
280 uint32_t tile_height; /** @< Height of a tile. */
281 /** maximum internal_bpp of all color render targets. */
282 uint32_t internal_bpp;
283
284 /** Whether the current rendering is in a 4X MSAA tile buffer. */
285 bool msaa;
286 /** @} */
287
288 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
289 * first rendering.
290 */
291 uint32_t clear;
292 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
293 * call without having been cleared first.
294 */
295 uint32_t load;
296 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
297 * (either clears or draws) and should be stored.
298 */
299 uint32_t store;
300 uint32_t clear_color[4][4];
301 float clear_z;
302 uint8_t clear_s;
303
304 /**
305 * Set if some drawing (triangles, blits, or just a glClear()) has
306 * been done to the FBO, meaning that we need to
307 * DRM_IOCTL_VC5_SUBMIT_CL.
308 */
309 bool needs_flush;
310
311 /**
312 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
313 */
314 bool tf_enabled;
315
316 /**
317 * Current EZ state for drawing. Updated at the start of draw after
318 * we've decided on the shader being rendered.
319 */
320 enum v3d_ez_state ez_state;
321 /**
322 * The first EZ state that was used for drawing with a decided EZ
323 * direction (so either UNDECIDED, GT, or LT).
324 */
325 enum v3d_ez_state first_ez_state;
326
327 /**
328 * Number of draw calls (not counting full buffer clears) queued in
329 * the current job.
330 */
331 uint32_t draw_calls_queued;
332
333 struct v3d_job_key key;
334 };
335
336 struct v3d_context {
337 struct pipe_context base;
338
339 int fd;
340 struct v3d_screen *screen;
341
342 /** The 3D rendering job for the currently bound FBO. */
343 struct v3d_job *job;
344
345 /* Map from struct v3d_job_key to the job for that FBO.
346 */
347 struct hash_table *jobs;
348
349 /**
350 * Map from v3d_resource to a job writing to that resource.
351 *
352 * Primarily for flushing jobs rendering to textures that are now
353 * being read from.
354 */
355 struct hash_table *write_jobs;
356
357 struct slab_child_pool transfer_pool;
358 struct blitter_context *blitter;
359
360 /** bitfield of VC5_DIRTY_* */
361 uint32_t dirty;
362
363 struct primconvert_context *primconvert;
364
365 struct hash_table *fs_cache, *vs_cache;
366 uint32_t next_uncompiled_program_id;
367 uint64_t next_compiled_program_id;
368
369 struct v3d_compiler_state *compiler_state;
370
371 uint8_t prim_mode;
372
373 /** Maximum index buffer valid for the current shader_rec. */
374 uint32_t max_index;
375
376 /** Sync object that our RCL or TFU job will update as its out_sync. */
377 uint32_t out_sync;
378
379 /* Stream uploader used by gallium internals. This could also be used
380 * by driver internals, but we tend to use the v3d_cl.h interfaces
381 * instead.
382 */
383 struct u_upload_mgr *uploader;
384 /* State uploader used inside the driver. This is for packing bits of
385 * long-term state inside buffers, since the kernel interfaces
386 * allocate a page at a time.
387 */
388 struct u_upload_mgr *state_uploader;
389
390 /** @{ Current pipeline state objects */
391 struct pipe_scissor_state scissor;
392 struct v3d_blend_state *blend;
393 struct v3d_rasterizer_state *rasterizer;
394 struct v3d_depth_stencil_alpha_state *zsa;
395
396 struct v3d_program_stateobj prog;
397
398 struct v3d_vertex_stateobj *vtx;
399
400 struct {
401 struct pipe_blend_color f;
402 uint16_t hf[4];
403 } blend_color;
404 struct pipe_stencil_ref stencil_ref;
405 unsigned sample_mask;
406 struct pipe_framebuffer_state framebuffer;
407
408 /* Per render target, whether we should swap the R and B fields in the
409 * shader's color output and in blending. If render targets disagree
410 * on the R/B swap and use the constant color, then we would need to
411 * fall back to in-shader blending.
412 */
413 uint8_t swap_color_rb;
414
415 /* Per render target, whether we should treat the dst alpha values as
416 * one in blending.
417 *
418 * For RGBX formats, the tile buffer's alpha channel will be
419 * undefined.
420 */
421 uint8_t blend_dst_alpha_one;
422
423 bool active_queries;
424
425 uint32_t tf_prims_generated;
426 uint32_t prims_generated;
427
428 struct pipe_poly_stipple stipple;
429 struct pipe_clip_state clip;
430 struct pipe_viewport_state viewport;
431 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
432 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
433 struct v3d_vertexbuf_stateobj vertexbuf;
434 struct v3d_streamout_stateobj streamout;
435 struct v3d_bo *current_oq;
436 /** @} */
437 };
438
439 struct v3d_rasterizer_state {
440 struct pipe_rasterizer_state base;
441
442 float point_size;
443
444 uint8_t depth_offset[9];
445 uint8_t depth_offset_z16[9];
446 };
447
448 struct v3d_depth_stencil_alpha_state {
449 struct pipe_depth_stencil_alpha_state base;
450
451 enum v3d_ez_state ez_state;
452
453 uint8_t stencil_front[6];
454 uint8_t stencil_back[6];
455 };
456
457 struct v3d_blend_state {
458 struct pipe_blend_state base;
459
460 /* Per-RT mask of whether blending is enabled. */
461 uint8_t blend_enables;
462 };
463
464 #define perf_debug(...) do { \
465 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
466 fprintf(stderr, __VA_ARGS__); \
467 } while (0)
468
469 #define foreach_bit(b, mask) \
470 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
471
472 static inline struct v3d_context *
473 v3d_context(struct pipe_context *pcontext)
474 {
475 return (struct v3d_context *)pcontext;
476 }
477
478 static inline struct v3d_sampler_view *
479 v3d_sampler_view(struct pipe_sampler_view *psview)
480 {
481 return (struct v3d_sampler_view *)psview;
482 }
483
484 static inline struct v3d_sampler_state *
485 v3d_sampler_state(struct pipe_sampler_state *psampler)
486 {
487 return (struct v3d_sampler_state *)psampler;
488 }
489
490 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
491 void *priv, unsigned flags);
492 void v3d_program_init(struct pipe_context *pctx);
493 void v3d_program_fini(struct pipe_context *pctx);
494 void v3d_query_init(struct pipe_context *pctx);
495
496 void v3d_simulator_init(struct v3d_screen *screen);
497 void v3d_simulator_destroy(struct v3d_screen *screen);
498 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
499 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
500
501 static inline int
502 v3d_ioctl(int fd, unsigned long request, void *arg)
503 {
504 if (using_v3d_simulator)
505 return v3d_simulator_ioctl(fd, request, arg);
506 else
507 return drmIoctl(fd, request, arg);
508 }
509
510 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
511 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
512 struct v3d_compiled_shader *shader,
513 enum pipe_shader_type stage);
514
515 void v3d_flush(struct pipe_context *pctx);
516 void v3d_job_init(struct v3d_context *v3d);
517 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
518 struct pipe_surface **cbufs,
519 struct pipe_surface *zsbuf);
520 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
521 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
522 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
523 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
524 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
525 struct pipe_resource *prsc);
526 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
527 struct pipe_resource *prsc);
528 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
529
530 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
531 enum pipe_format f);
532 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
533 enum pipe_format f);
534 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
535 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
536 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
537 enum pipe_format f,
538 enum pipe_tex_compare compare);
539 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
540 enum pipe_format f);
541 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
542 enum pipe_format f);
543 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
544 uint32_t format,
545 uint32_t *type,
546 uint32_t *bpp);
547 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
548 uint32_t tex_format);
549
550 void v3d_init_query_functions(struct v3d_context *v3d);
551 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
552 void v3d_blitter_save(struct v3d_context *v3d);
553 boolean v3d_generate_mipmap(struct pipe_context *pctx,
554 struct pipe_resource *prsc,
555 enum pipe_format format,
556 unsigned int base_level,
557 unsigned int last_level,
558 unsigned int first_layer,
559 unsigned int last_layer);
560
561 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
562
563 #ifdef v3dX
564 # include "v3dx_context.h"
565 #else
566 # define v3dX(x) v3d33_##x
567 # include "v3dx_context.h"
568 # undef v3dX
569
570 # define v3dX(x) v3d41_##x
571 # include "v3dx_context.h"
572 # undef v3dX
573 #endif
574
575 #endif /* VC5_CONTEXT_H */