src/gallium/drivers/v3d/v3d_program.c

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <inttypes.h>
  25 #include "util/u_format.h"
  26 #include "util/u_math.h"
  27 #include "util/u_memory.h"
  28 #include "util/ralloc.h"
  29 #include "util/hash_table.h"
  30 #include "tgsi/tgsi_dump.h"
  31 #include "tgsi/tgsi_parse.h"
  32 #include "compiler/nir/nir.h"
  33 #include "compiler/nir/nir_builder.h"
  34 #include "nir/tgsi_to_nir.h"
  35 #include "compiler/v3d_compiler.h"
  36 #include "v3d_context.h"
  37 #include "broadcom/cle/v3d_packet_v33_pack.h"
  38 #include "mesa/state_tracker/st_glsl_types.h"
  39
  40 static gl_varying_slot
  41 vc5_get_slot_for_driver_location(nir_shader *s, uint32_t driver_location)
  42 {
  43         nir_foreach_variable(var, &s->outputs) {
  44                 if (var->data.driver_location == driver_location) {
  45                         return var->data.location;
  46                 }
  47         }
  48
  49         return -1;
  50 }
  51
  52 /**
  53  * Precomputes the TRANSFORM_FEEDBACK_OUTPUT_DATA_SPEC array for the shader.
  54  *
  55  * A shader can have 16 of these specs, and each one of them can write up to
  56  * 16 dwords.  Since we allow a total of 64 transform feedback output
  57  * components (not 16 vectors), we have to group the writes of multiple
  58  * varyings together in a single data spec.
  59  */
  60 static void
  61 vc5_set_transform_feedback_outputs(struct vc5_uncompiled_shader *so,
  62                                    const struct pipe_stream_output_info *stream_output)
  63 {
  64         if (!stream_output->num_outputs)
  65                 return;
  66
  67         struct v3d_varying_slot slots[PIPE_MAX_SO_OUTPUTS * 4];
  68         int slot_count = 0;
  69
  70         for (int buffer = 0; buffer < PIPE_MAX_SO_BUFFERS; buffer++) {
  71                 uint32_t buffer_offset = 0;
  72                 uint32_t vpm_start = slot_count;
  73
  74                 for (int i = 0; i < stream_output->num_outputs; i++) {
  75                         const struct pipe_stream_output *output =
  76                                 &stream_output->output[i];
  77
  78                         if (output->output_buffer != buffer)
  79                                 continue;
  80
  81                         /* We assume that the SO outputs appear in increasing
  82                          * order in the buffer.
  83                          */
  84                         assert(output->dst_offset >= buffer_offset);
  85
  86                         /* Pad any undefined slots in the output */
  87                         for (int j = buffer_offset; j < output->dst_offset; j++) {
  88                                 slots[slot_count] =
  89                                         v3d_slot_from_slot_and_component(VARYING_SLOT_POS, 0);
  90                                 slot_count++;
  91                                 buffer_offset++;
  92                         }
  93
  94                         /* Set the coordinate shader up to output the
  95                          * components of this varying.
  96                          */
  97                         for (int j = 0; j < output->num_components; j++) {
  98                                 gl_varying_slot slot =
  99                                         vc5_get_slot_for_driver_location(so->base.ir.nir, output->register_index);
 100
 101                                 slots[slot_count] =
 102                                         v3d_slot_from_slot_and_component(slot,
 103                                                                          output->start_component + j);
 104                                 slot_count++;
 105                                 buffer_offset++;
 106                         }
 107                 }
 108
 109                 uint32_t vpm_size = slot_count - vpm_start;
 110                 if (!vpm_size)
 111                         continue;
 112
 113                 uint32_t vpm_start_offset = vpm_start + 6;
 114
 115                 while (vpm_size) {
 116                         uint32_t write_size = MIN2(vpm_size, 1 << 4);
 117
 118                         struct V3D33_TRANSFORM_FEEDBACK_OUTPUT_DATA_SPEC unpacked = {
 119                                 /* We need the offset from the coordinate shader's VPM
 120                                  * output block, which has the [X, Y, Z, W, Xs, Ys]
 121                                  * values at the start.
 122                                  */
 123                                 .first_shaded_vertex_value_to_output = vpm_start_offset,
 124                                 .number_of_consecutive_vertex_values_to_output_as_32_bit_values_minus_1 = write_size - 1,
 125                                 .output_buffer_to_write_to = buffer,
 126                         };
 127
 128                         /* GFXH-1559 */
 129                         assert(unpacked.first_shaded_vertex_value_to_output != 8 ||
 130                                so->num_tf_specs != 0);
 131
 132                         assert(so->num_tf_specs != ARRAY_SIZE(so->tf_specs));
 133                         V3D33_TRANSFORM_FEEDBACK_OUTPUT_DATA_SPEC_pack(NULL,
 134                                                                        (void *)&so->tf_specs[so->num_tf_specs],
 135                                                                        &unpacked);
 136
 137                         /* If point size is being written by the shader, then
 138                          * all the VPM start offsets are shifted up by one.
 139                          * We won't know that until the variant is compiled,
 140                          * though.
 141                          */
 142                         unpacked.first_shaded_vertex_value_to_output++;
 143
 144                         /* GFXH-1559 */
 145                         assert(unpacked.first_shaded_vertex_value_to_output != 8 ||
 146                                so->num_tf_specs != 0);
 147
 148                         V3D33_TRANSFORM_FEEDBACK_OUTPUT_DATA_SPEC_pack(NULL,
 149                                                                        (void *)&so->tf_specs_psiz[so->num_tf_specs],
 150                                                                        &unpacked);
 151                         so->num_tf_specs++;
 152                         vpm_start_offset += write_size;
 153                         vpm_size -= write_size;
 154                 }
 155         }
 156
 157         so->num_tf_outputs = slot_count;
 158         so->tf_outputs = ralloc_array(so->base.ir.nir, struct v3d_varying_slot,
 159                                       slot_count);
 160         memcpy(so->tf_outputs, slots, sizeof(*slots) * slot_count);
 161 }
 162
 163 static int
 164 type_size(const struct glsl_type *type)
 165 {
 166         return glsl_count_attribute_slots(type, false);
 167 }
 168
 169 static int
 170 uniforms_type_size(const struct glsl_type *type)
 171 {
 172         return st_glsl_storage_type_size(type, false);
 173 }
 174
 175 static void *
 176 vc5_shader_state_create(struct pipe_context *pctx,
 177                         const struct pipe_shader_state *cso)
 178 {
 179         struct vc5_context *vc5 = vc5_context(pctx);
 180         struct vc5_uncompiled_shader *so = CALLOC_STRUCT(vc5_uncompiled_shader);
 181         if (!so)
 182                 return NULL;
 183
 184         so->program_id = vc5->next_uncompiled_program_id++;
 185
 186         nir_shader *s;
 187
 188         if (cso->type == PIPE_SHADER_IR_NIR) {
 189                 /* The backend takes ownership of the NIR shader on state
 190                  * creation.
 191                  */
 192                 s = cso->ir.nir;
 193
 194                 NIR_PASS_V(s, nir_lower_io, nir_var_all & ~nir_var_uniform,
 195                            type_size,
 196                            (nir_lower_io_options)0);
 197                 NIR_PASS_V(s, nir_lower_io, nir_var_uniform,
 198                            uniforms_type_size,
 199                            (nir_lower_io_options)0);
 200         } else {
 201                 assert(cso->type == PIPE_SHADER_IR_TGSI);
 202
 203                 if (V3D_DEBUG & V3D_DEBUG_TGSI) {
 204                         fprintf(stderr, "prog %d TGSI:\n",
 205                                 so->program_id);
 206                         tgsi_dump(cso->tokens, 0);
 207                         fprintf(stderr, "\n");
 208                 }
 209                 s = tgsi_to_nir(cso->tokens, &v3d_nir_options);
 210
 211                 so->was_tgsi = true;
 212         }
 213
 214         NIR_PASS_V(s, nir_opt_global_to_local);
 215         NIR_PASS_V(s, nir_lower_regs_to_ssa);
 216         NIR_PASS_V(s, nir_normalize_cubemap_coords);
 217
 218         NIR_PASS_V(s, nir_lower_load_const_to_scalar);
 219
 220         v3d_optimize_nir(s);
 221
 222         NIR_PASS_V(s, nir_remove_dead_variables, nir_var_local);
 223
 224         /* Garbage collect dead instructions */
 225         nir_sweep(s);
 226
 227         so->base.type = PIPE_SHADER_IR_NIR;
 228         so->base.ir.nir = s;
 229
 230         vc5_set_transform_feedback_outputs(so, &cso->stream_output);
 231
 232         if (V3D_DEBUG & (V3D_DEBUG_NIR |
 233                          v3d_debug_flag_for_shader_stage(s->info.stage))) {
 234                 fprintf(stderr, "%s prog %d NIR:\n",
 235                         gl_shader_stage_name(s->info.stage),
 236                         so->program_id);
 237                 nir_print_shader(s, stderr);
 238                 fprintf(stderr, "\n");
 239         }
 240
 241         return so;
 242 }
 243
 244 static struct vc5_compiled_shader *
 245 vc5_get_compiled_shader(struct vc5_context *vc5, struct v3d_key *key)
 246 {
 247         struct vc5_uncompiled_shader *shader_state = key->shader_state;
 248         nir_shader *s = shader_state->base.ir.nir;
 249
 250         struct hash_table *ht;
 251         uint32_t key_size;
 252         if (s->info.stage == MESA_SHADER_FRAGMENT) {
 253                 ht = vc5->fs_cache;
 254                 key_size = sizeof(struct v3d_fs_key);
 255         } else {
 256                 ht = vc5->vs_cache;
 257                 key_size = sizeof(struct v3d_vs_key);
 258         }
 259
 260         struct hash_entry *entry = _mesa_hash_table_search(ht, key);
 261         if (entry)
 262                 return entry->data;
 263
 264         struct vc5_compiled_shader *shader =
 265                 rzalloc(NULL, struct vc5_compiled_shader);
 266
 267         int program_id = shader_state->program_id;
 268         int variant_id =
 269                 p_atomic_inc_return(&shader_state->compiled_variant_count);
 270         uint64_t *qpu_insts;
 271         uint32_t shader_size;
 272
 273         switch (s->info.stage) {
 274         case MESA_SHADER_VERTEX:
 275                 shader->prog_data.vs = rzalloc(shader, struct v3d_vs_prog_data);
 276
 277                 qpu_insts = v3d_compile_vs(vc5->screen->compiler,
 278                                            (struct v3d_vs_key *)key,
 279                                            shader->prog_data.vs, s,
 280                                            program_id, variant_id,
 281                                            &shader_size);
 282                 break;
 283         case MESA_SHADER_FRAGMENT:
 284                 shader->prog_data.fs = rzalloc(shader, struct v3d_fs_prog_data);
 285
 286                 qpu_insts = v3d_compile_fs(vc5->screen->compiler,
 287                                            (struct v3d_fs_key *)key,
 288                                            shader->prog_data.fs, s,
 289                                            program_id, variant_id,
 290                                            &shader_size);
 291                 break;
 292         default:
 293                 unreachable("bad stage");
 294         }
 295
 296         vc5_set_shader_uniform_dirty_flags(shader);
 297
 298         shader->bo = vc5_bo_alloc(vc5->screen, shader_size, "shader");
 299         vc5_bo_map(shader->bo);
 300         memcpy(shader->bo->map, qpu_insts, shader_size);
 301
 302         free(qpu_insts);
 303
 304         struct vc5_key *dup_key;
 305         dup_key = ralloc_size(shader, key_size);
 306         memcpy(dup_key, key, key_size);
 307         _mesa_hash_table_insert(ht, dup_key, shader);
 308
 309         if (shader->prog_data.base->spill_size >
 310             vc5->prog.spill_size_per_thread) {
 311                 /* Max 4 QPUs per slice, 3 slices per core. We only do single
 312                  * core so far.  This overallocates memory on smaller cores.
 313                  */
 314                 int total_spill_size =
 315                         4 * 3 * shader->prog_data.base->spill_size;
 316
 317                 vc5_bo_unreference(&vc5->prog.spill_bo);
 318                 vc5->prog.spill_bo = vc5_bo_alloc(vc5->screen,
 319                                                   total_spill_size, "spill");
 320                 vc5->prog.spill_size_per_thread =
 321                         shader->prog_data.base->spill_size;
 322         }
 323
 324         return shader;
 325 }
 326
 327 static void
 328 vc5_setup_shared_key(struct vc5_context *vc5, struct v3d_key *key,
 329                      struct vc5_texture_stateobj *texstate)
 330 {
 331         const struct v3d_device_info *devinfo = &vc5->screen->devinfo;
 332
 333         for (int i = 0; i < texstate->num_textures; i++) {
 334                 struct pipe_sampler_view *sampler = texstate->textures[i];
 335                 struct vc5_sampler_view *vc5_sampler = vc5_sampler_view(sampler);
 336                 struct pipe_sampler_state *sampler_state =
 337                         texstate->samplers[i];
 338
 339                 if (!sampler)
 340                         continue;
 341
 342                 key->tex[i].return_size =
 343                         vc5_get_tex_return_size(devinfo,
 344                                                 sampler->format,
 345                                                 sampler_state->compare_mode);
 346
 347                 /* For 16-bit, we set up the sampler to always return 2
 348                  * channels (meaning no recompiles for most statechanges),
 349                  * while for 32 we actually scale the returns with channels.
 350                  */
 351                 if (key->tex[i].return_size == 16) {
 352                         key->tex[i].return_channels = 2;
 353                 } else if (devinfo->ver > 40) {
 354                         key->tex[i].return_channels = 4;
 355                 } else {
 356                         key->tex[i].return_channels =
 357                                 vc5_get_tex_return_channels(devinfo,
 358                                                             sampler->format);
 359                 }
 360
 361                 if (key->tex[i].return_size == 32 && devinfo->ver < 40) {
 362                         memcpy(key->tex[i].swizzle,
 363                                vc5_sampler->swizzle,
 364                                sizeof(vc5_sampler->swizzle));
 365                 } else {
 366                         /* For 16-bit returns, we let the sampler state handle
 367                          * the swizzle.
 368                          */
 369                         key->tex[i].swizzle[0] = PIPE_SWIZZLE_X;
 370                         key->tex[i].swizzle[1] = PIPE_SWIZZLE_Y;
 371                         key->tex[i].swizzle[2] = PIPE_SWIZZLE_Z;
 372                         key->tex[i].swizzle[3] = PIPE_SWIZZLE_W;
 373                 }
 374
 375                 if (sampler) {
 376                         key->tex[i].compare_mode = sampler_state->compare_mode;
 377                         key->tex[i].compare_func = sampler_state->compare_func;
 378                         key->tex[i].clamp_s =
 379                                 sampler_state->wrap_s == PIPE_TEX_WRAP_CLAMP;
 380                         key->tex[i].clamp_t =
 381                                 sampler_state->wrap_t == PIPE_TEX_WRAP_CLAMP;
 382                         key->tex[i].clamp_r =
 383                                 sampler_state->wrap_r == PIPE_TEX_WRAP_CLAMP;
 384                 }
 385         }
 386
 387         key->ucp_enables = vc5->rasterizer->base.clip_plane_enable;
 388 }
 389
 390 static void
 391 vc5_update_compiled_fs(struct vc5_context *vc5, uint8_t prim_mode)
 392 {
 393         struct vc5_job *job = vc5->job;
 394         struct v3d_fs_key local_key;
 395         struct v3d_fs_key *key = &local_key;
 396
 397         if (!(vc5->dirty & (VC5_DIRTY_PRIM_MODE |
 398                             VC5_DIRTY_BLEND |
 399                             VC5_DIRTY_FRAMEBUFFER |
 400                             VC5_DIRTY_ZSA |
 401                             VC5_DIRTY_RASTERIZER |
 402                             VC5_DIRTY_SAMPLE_MASK |
 403                             VC5_DIRTY_FRAGTEX |
 404                             VC5_DIRTY_UNCOMPILED_FS))) {
 405                 return;
 406         }
 407
 408         memset(key, 0, sizeof(*key));
 409         vc5_setup_shared_key(vc5, &key->base, &vc5->fragtex);
 410         key->base.shader_state = vc5->prog.bind_fs;
 411         key->is_points = (prim_mode == PIPE_PRIM_POINTS);
 412         key->is_lines = (prim_mode >= PIPE_PRIM_LINES &&
 413                          prim_mode <= PIPE_PRIM_LINE_STRIP);
 414         key->clamp_color = vc5->rasterizer->base.clamp_fragment_color;
 415         if (vc5->blend->logicop_enable) {
 416                 key->logicop_func = vc5->blend->logicop_func;
 417         } else {
 418                 key->logicop_func = PIPE_LOGICOP_COPY;
 419         }
 420         if (job->msaa) {
 421                 key->msaa = vc5->rasterizer->base.multisample;
 422                 key->sample_coverage = (vc5->rasterizer->base.multisample &&
 423                                         vc5->sample_mask != (1 << VC5_MAX_SAMPLES) - 1);
 424                 key->sample_alpha_to_coverage = vc5->blend->alpha_to_coverage;
 425                 key->sample_alpha_to_one = vc5->blend->alpha_to_one;
 426         }
 427
 428         key->depth_enabled = (vc5->zsa->base.depth.enabled ||
 429                               vc5->zsa->base.stencil[0].enabled);
 430         if (vc5->zsa->base.alpha.enabled) {
 431                 key->alpha_test = true;
 432                 key->alpha_test_func = vc5->zsa->base.alpha.func;
 433         }
 434
 435         /* gl_FragColor's propagation to however many bound color buffers
 436          * there are means that the buffer count needs to be in the key.
 437          */
 438         key->nr_cbufs = vc5->framebuffer.nr_cbufs;
 439         key->swap_color_rb = vc5->swap_color_rb;
 440
 441         for (int i = 0; i < key->nr_cbufs; i++) {
 442                 struct pipe_surface *cbuf = vc5->framebuffer.cbufs[i];
 443                 if (!cbuf)
 444                         continue;
 445
 446                 const struct util_format_description *desc =
 447                         util_format_description(cbuf->format);
 448
 449                 if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT &&
 450                     desc->channel[0].size == 32) {
 451                         key->f32_color_rb |= 1 << i;
 452                 }
 453
 454                 if (vc5->prog.bind_fs->was_tgsi) {
 455                         if (util_format_is_pure_uint(cbuf->format))
 456                                 key->uint_color_rb |= 1 << i;
 457                         else if (util_format_is_pure_sint(cbuf->format))
 458                                 key->int_color_rb |= 1 << i;
 459                 }
 460         }
 461
 462         if (key->is_points) {
 463                 key->point_sprite_mask =
 464                         vc5->rasterizer->base.sprite_coord_enable;
 465                 key->point_coord_upper_left =
 466                         (vc5->rasterizer->base.sprite_coord_mode ==
 467                          PIPE_SPRITE_COORD_UPPER_LEFT);
 468         }
 469
 470         key->light_twoside = vc5->rasterizer->base.light_twoside;
 471         key->shade_model_flat = vc5->rasterizer->base.flatshade;
 472
 473         struct vc5_compiled_shader *old_fs = vc5->prog.fs;
 474         vc5->prog.fs = vc5_get_compiled_shader(vc5, &key->base);
 475         if (vc5->prog.fs == old_fs)
 476                 return;
 477
 478         vc5->dirty |= VC5_DIRTY_COMPILED_FS;
 479
 480         if (old_fs) {
 481                 if (vc5->prog.fs->prog_data.fs->flat_shade_flags !=
 482                     old_fs->prog_data.fs->flat_shade_flags) {
 483                         vc5->dirty |= VC5_DIRTY_FLAT_SHADE_FLAGS;
 484                 }
 485
 486                 if (vc5->prog.fs->prog_data.fs->centroid_flags !=
 487                     old_fs->prog_data.fs->centroid_flags) {
 488                         vc5->dirty |= VC5_DIRTY_CENTROID_FLAGS;
 489                 }
 490         }
 491
 492         if (old_fs && memcmp(vc5->prog.fs->prog_data.fs->input_slots,
 493                              old_fs->prog_data.fs->input_slots,
 494                              sizeof(vc5->prog.fs->prog_data.fs->input_slots))) {
 495                 vc5->dirty |= VC5_DIRTY_FS_INPUTS;
 496         }
 497 }
 498
 499 static void
 500 vc5_update_compiled_vs(struct vc5_context *vc5, uint8_t prim_mode)
 501 {
 502         struct v3d_vs_key local_key;
 503         struct v3d_vs_key *key = &local_key;
 504
 505         if (!(vc5->dirty & (VC5_DIRTY_PRIM_MODE |
 506                             VC5_DIRTY_RASTERIZER |
 507                             VC5_DIRTY_VERTTEX |
 508                             VC5_DIRTY_VTXSTATE |
 509                             VC5_DIRTY_UNCOMPILED_VS |
 510                             VC5_DIRTY_FS_INPUTS))) {
 511                 return;
 512         }
 513
 514         memset(key, 0, sizeof(*key));
 515         vc5_setup_shared_key(vc5, &key->base, &vc5->verttex);
 516         key->base.shader_state = vc5->prog.bind_vs;
 517         key->num_fs_inputs = vc5->prog.fs->prog_data.fs->base.num_inputs;
 518         STATIC_ASSERT(sizeof(key->fs_inputs) ==
 519                       sizeof(vc5->prog.fs->prog_data.fs->input_slots));
 520         memcpy(key->fs_inputs, vc5->prog.fs->prog_data.fs->input_slots,
 521                sizeof(key->fs_inputs));
 522         key->clamp_color = vc5->rasterizer->base.clamp_vertex_color;
 523
 524         key->per_vertex_point_size =
 525                 (prim_mode == PIPE_PRIM_POINTS &&
 526                  vc5->rasterizer->base.point_size_per_vertex);
 527
 528         struct vc5_compiled_shader *vs =
 529                 vc5_get_compiled_shader(vc5, &key->base);
 530         if (vs != vc5->prog.vs) {
 531                 vc5->prog.vs = vs;
 532                 vc5->dirty |= VC5_DIRTY_COMPILED_VS;
 533         }
 534
 535         key->is_coord = true;
 536         /* Coord shaders only output varyings used by transform feedback. */
 537         struct vc5_uncompiled_shader *shader_state = key->base.shader_state;
 538         memcpy(key->fs_inputs, shader_state->tf_outputs,
 539                sizeof(*key->fs_inputs) * shader_state->num_tf_outputs);
 540         if (shader_state->num_tf_outputs < key->num_fs_inputs) {
 541                 memset(&key->fs_inputs[shader_state->num_tf_outputs],
 542                        0,
 543                        sizeof(*key->fs_inputs) * (key->num_fs_inputs -
 544                                                   shader_state->num_tf_outputs));
 545         }
 546         key->num_fs_inputs = shader_state->num_tf_outputs;
 547
 548         struct vc5_compiled_shader *cs =
 549                 vc5_get_compiled_shader(vc5, &key->base);
 550         if (cs != vc5->prog.cs) {
 551                 vc5->prog.cs = cs;
 552                 vc5->dirty |= VC5_DIRTY_COMPILED_CS;
 553         }
 554 }
 555
 556 void
 557 vc5_update_compiled_shaders(struct vc5_context *vc5, uint8_t prim_mode)
 558 {
 559         vc5_update_compiled_fs(vc5, prim_mode);
 560         vc5_update_compiled_vs(vc5, prim_mode);
 561 }
 562
 563 static uint32_t
 564 fs_cache_hash(const void *key)
 565 {
 566         return _mesa_hash_data(key, sizeof(struct v3d_fs_key));
 567 }
 568
 569 static uint32_t
 570 vs_cache_hash(const void *key)
 571 {
 572         return _mesa_hash_data(key, sizeof(struct v3d_vs_key));
 573 }
 574
 575 static bool
 576 fs_cache_compare(const void *key1, const void *key2)
 577 {
 578         return memcmp(key1, key2, sizeof(struct v3d_fs_key)) == 0;
 579 }
 580
 581 static bool
 582 vs_cache_compare(const void *key1, const void *key2)
 583 {
 584         return memcmp(key1, key2, sizeof(struct v3d_vs_key)) == 0;
 585 }
 586
 587 static void
 588 delete_from_cache_if_matches(struct hash_table *ht,
 589                              struct vc5_compiled_shader **last_compile,
 590                              struct hash_entry *entry,
 591                              struct vc5_uncompiled_shader *so)
 592 {
 593         const struct v3d_key *key = entry->key;
 594
 595         if (key->shader_state == so) {
 596                 struct vc5_compiled_shader *shader = entry->data;
 597                 _mesa_hash_table_remove(ht, entry);
 598                 vc5_bo_unreference(&shader->bo);
 599
 600                 if (shader == *last_compile)
 601                         *last_compile = NULL;
 602
 603                 ralloc_free(shader);
 604         }
 605 }
 606
 607 static void
 608 vc5_shader_state_delete(struct pipe_context *pctx, void *hwcso)
 609 {
 610         struct vc5_context *vc5 = vc5_context(pctx);
 611         struct vc5_uncompiled_shader *so = hwcso;
 612
 613         struct hash_entry *entry;
 614         hash_table_foreach(vc5->fs_cache, entry) {
 615                 delete_from_cache_if_matches(vc5->fs_cache, &vc5->prog.fs,
 616                                              entry, so);
 617         }
 618         hash_table_foreach(vc5->vs_cache, entry) {
 619                 delete_from_cache_if_matches(vc5->vs_cache, &vc5->prog.vs,
 620                                              entry, so);
 621         }
 622
 623         ralloc_free(so->base.ir.nir);
 624         free(so);
 625 }
 626
 627 static void
 628 vc5_fp_state_bind(struct pipe_context *pctx, void *hwcso)
 629 {
 630         struct vc5_context *vc5 = vc5_context(pctx);
 631         vc5->prog.bind_fs = hwcso;
 632         vc5->dirty |= VC5_DIRTY_UNCOMPILED_FS;
 633 }
 634
 635 static void
 636 vc5_vp_state_bind(struct pipe_context *pctx, void *hwcso)
 637 {
 638         struct vc5_context *vc5 = vc5_context(pctx);
 639         vc5->prog.bind_vs = hwcso;
 640         vc5->dirty |= VC5_DIRTY_UNCOMPILED_VS;
 641 }
 642
 643 void
 644 vc5_program_init(struct pipe_context *pctx)
 645 {
 646         struct vc5_context *vc5 = vc5_context(pctx);
 647
 648         pctx->create_vs_state = vc5_shader_state_create;
 649         pctx->delete_vs_state = vc5_shader_state_delete;
 650
 651         pctx->create_fs_state = vc5_shader_state_create;
 652         pctx->delete_fs_state = vc5_shader_state_delete;
 653
 654         pctx->bind_fs_state = vc5_fp_state_bind;
 655         pctx->bind_vs_state = vc5_vp_state_bind;
 656
 657         vc5->fs_cache = _mesa_hash_table_create(pctx, fs_cache_hash,
 658                                                 fs_cache_compare);
 659         vc5->vs_cache = _mesa_hash_table_create(pctx, vs_cache_hash,
 660                                                 vs_cache_compare);
 661 }
 662
 663 void
 664 vc5_program_fini(struct pipe_context *pctx)
 665 {
 666         struct vc5_context *vc5 = vc5_context(pctx);
 667
 668         struct hash_entry *entry;
 669         hash_table_foreach(vc5->fs_cache, entry) {
 670                 struct vc5_compiled_shader *shader = entry->data;
 671                 vc5_bo_unreference(&shader->bo);
 672                 ralloc_free(shader);
 673                 _mesa_hash_table_remove(vc5->fs_cache, entry);
 674         }
 675
 676         hash_table_foreach(vc5->vs_cache, entry) {
 677                 struct vc5_compiled_shader *shader = entry->data;
 678                 vc5_bo_unreference(&shader->bo);
 679                 ralloc_free(shader);
 680                 _mesa_hash_table_remove(vc5->vs_cache, entry);
 681         }
 682 }