v3d: Use driconf to expose non-MSAA texture limits for Xorg.
[mesa.git] / src / gallium / drivers / v3d / v3d_screen.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "util/os_misc.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30 #include "pipe/p_state.h"
31
32 #include "util/u_debug.h"
33 #include "util/u_memory.h"
34 #include "util/u_format.h"
35 #include "util/u_hash_table.h"
36 #include "util/u_screen.h"
37 #include "util/u_transfer_helper.h"
38 #include "util/ralloc.h"
39 #include "util/xmlconfig.h"
40
41 #include <xf86drm.h>
42 #include "v3d_screen.h"
43 #include "v3d_context.h"
44 #include "v3d_resource.h"
45 #include "compiler/v3d_compiler.h"
46 #include "drm-uapi/drm_fourcc.h"
47
48 static const char *
49 v3d_screen_get_name(struct pipe_screen *pscreen)
50 {
51 struct v3d_screen *screen = v3d_screen(pscreen);
52
53 if (!screen->name) {
54 screen->name = ralloc_asprintf(screen,
55 "V3D %d.%d",
56 screen->devinfo.ver / 10,
57 screen->devinfo.ver % 10);
58 }
59
60 return screen->name;
61 }
62
63 static const char *
64 v3d_screen_get_vendor(struct pipe_screen *pscreen)
65 {
66 return "Broadcom";
67 }
68
69 static void
70 v3d_screen_destroy(struct pipe_screen *pscreen)
71 {
72 struct v3d_screen *screen = v3d_screen(pscreen);
73
74 util_hash_table_destroy(screen->bo_handles);
75 v3d_bufmgr_destroy(pscreen);
76 slab_destroy_parent(&screen->transfer_pool);
77 free(screen->ro);
78
79 if (using_v3d_simulator)
80 v3d_simulator_destroy(screen);
81
82 v3d_compiler_free(screen->compiler);
83 u_transfer_helper_destroy(pscreen->transfer_helper);
84
85 close(screen->fd);
86 ralloc_free(pscreen);
87 }
88
89 static bool
90 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
91 {
92 struct drm_v3d_get_param p = {
93 .param = feature,
94 };
95 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
96
97 if (ret != 0)
98 return false;
99
100 return p.value;
101 }
102
103 static int
104 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
105 {
106 struct v3d_screen *screen = v3d_screen(pscreen);
107
108 switch (param) {
109 /* Supported features (boolean caps). */
110 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
111 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
112 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
113 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
114 case PIPE_CAP_NPOT_TEXTURES:
115 case PIPE_CAP_SHAREABLE_SHADERS:
116 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
117 case PIPE_CAP_TEXTURE_MULTISAMPLE:
118 case PIPE_CAP_TEXTURE_SWIZZLE:
119 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
120 case PIPE_CAP_START_INSTANCE:
121 case PIPE_CAP_TGSI_INSTANCEID:
122 case PIPE_CAP_SM3:
123 case PIPE_CAP_TEXTURE_QUERY_LOD:
124 case PIPE_CAP_PRIMITIVE_RESTART:
125 case PIPE_CAP_OCCLUSION_QUERY:
126 case PIPE_CAP_POINT_SPRITE:
127 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
128 case PIPE_CAP_DRAW_INDIRECT:
129 case PIPE_CAP_MULTI_DRAW_INDIRECT:
130 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
131 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
132 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
133 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
134 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
135 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
136 return 1;
137
138 case PIPE_CAP_PACKED_UNIFORMS:
139 /* We can't enable this flag, because it results in load_ubo
140 * intrinsics across a 16b boundary, but v3d's TMU general
141 * memory accesses wrap on 16b boundaries.
142 */
143 return 0;
144
145 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
146 /* XXX perf: we don't want to emit these extra blits for
147 * glReadPixels(), since we still have to do an uncached read
148 * from the GPU of the result after waiting for the TFU blit
149 * to happen. However, disabling this introduces instability
150 * in
151 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
152 * and corruption in chromium's rendering.
153 */
154 return 1;
155
156 case PIPE_CAP_COMPUTE:
157 return screen->has_csd && screen->devinfo.ver >= 41;
158
159 case PIPE_CAP_GENERATE_MIPMAP:
160 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
161
162 case PIPE_CAP_INDEP_BLEND_ENABLE:
163 return screen->devinfo.ver >= 40;
164
165 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
166 return 256;
167
168 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
169 if (screen->devinfo.ver < 40)
170 return 0;
171 return 4;
172
173 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
174 return 4;
175
176 case PIPE_CAP_GLSL_FEATURE_LEVEL:
177 return 330;
178
179 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
180 return 140;
181
182 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
183 return 1;
184 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
185 return 0;
186 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
187 if (screen->devinfo.ver >= 40)
188 return 0;
189 else
190 return 1;
191 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
192 if (screen->devinfo.ver >= 40)
193 return 1;
194 else
195 return 0;
196
197 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
198 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
199 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
200 return 1;
201
202 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
203 return 4;
204
205 case PIPE_CAP_MAX_VARYINGS:
206 return V3D_MAX_FS_INPUTS / 4;
207
208 /* Texturing. */
209 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
210 if (screen->devinfo.ver < 40)
211 return 2048;
212 else if (screen->nonmsaa_texture_size_limit)
213 return 7680;
214 else
215 return 4096;
216 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
217 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
218 if (screen->devinfo.ver < 40)
219 return 12;
220 else
221 return V3D_MAX_MIP_LEVELS;
222 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
223 return 2048;
224
225 /* Render targets. */
226 case PIPE_CAP_MAX_RENDER_TARGETS:
227 return 4;
228
229 case PIPE_CAP_VENDOR_ID:
230 return 0x14E4;
231 case PIPE_CAP_ACCELERATED:
232 return 1;
233 case PIPE_CAP_VIDEO_MEMORY: {
234 uint64_t system_memory;
235
236 if (!os_get_total_physical_memory(&system_memory))
237 return 0;
238
239 return (int)(system_memory >> 20);
240 }
241 case PIPE_CAP_UMA:
242 return 1;
243
244 default:
245 return u_pipe_screen_get_param_defaults(pscreen, param);
246 }
247 }
248
249 static float
250 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
251 {
252 switch (param) {
253 case PIPE_CAPF_MAX_LINE_WIDTH:
254 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
255 return 32;
256
257 case PIPE_CAPF_MAX_POINT_WIDTH:
258 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
259 return 512.0f;
260
261 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
262 return 0.0f;
263 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
264 return 16.0f;
265
266 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
267 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
268 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
269 return 0.0f;
270 default:
271 fprintf(stderr, "unknown paramf %d\n", param);
272 return 0;
273 }
274 }
275
276 static int
277 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
278 enum pipe_shader_cap param)
279 {
280 struct v3d_screen *screen = v3d_screen(pscreen);
281
282 switch (shader) {
283 case PIPE_SHADER_VERTEX:
284 case PIPE_SHADER_FRAGMENT:
285 break;
286 case PIPE_SHADER_COMPUTE:
287 if (!screen->has_csd)
288 return 0;
289 break;
290 default:
291 return 0;
292 }
293
294 /* this is probably not totally correct.. but it's a start: */
295 switch (param) {
296 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
297 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
298 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
299 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
300 return 16384;
301
302 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
303 return UINT_MAX;
304
305 case PIPE_SHADER_CAP_MAX_INPUTS:
306 if (shader == PIPE_SHADER_FRAGMENT)
307 return V3D_MAX_FS_INPUTS / 4;
308 else
309 return V3D_MAX_VS_INPUTS / 4;
310 case PIPE_SHADER_CAP_MAX_OUTPUTS:
311 if (shader == PIPE_SHADER_FRAGMENT)
312 return 4;
313 else
314 return V3D_MAX_FS_INPUTS / 4;
315 case PIPE_SHADER_CAP_MAX_TEMPS:
316 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
317 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
318 /* Note: Limited by the offset size in
319 * v3d_unit_data_create().
320 */
321 return 16 * 1024 * sizeof(float);
322 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
323 return 16;
324 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
325 return 0;
326 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
327 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
328 return 0;
329 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
330 return 1;
331 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
332 return 1;
333 case PIPE_SHADER_CAP_SUBROUTINES:
334 return 0;
335 case PIPE_SHADER_CAP_INTEGERS:
336 return 1;
337 case PIPE_SHADER_CAP_FP16:
338 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
339 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
340 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
341 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
342 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
343 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
344 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
345 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
346 return 0;
347 case PIPE_SHADER_CAP_SCALAR_ISA:
348 return 1;
349 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
350 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
351 return V3D_MAX_TEXTURE_SAMPLERS;
352
353 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
354 if (shader == PIPE_SHADER_VERTEX)
355 return 0;
356
357 return PIPE_MAX_SHADER_BUFFERS;
358
359 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
360 if (screen->devinfo.ver < 41)
361 return 0;
362 else
363 return PIPE_MAX_SHADER_IMAGES;
364
365 case PIPE_SHADER_CAP_PREFERRED_IR:
366 return PIPE_SHADER_IR_NIR;
367 case PIPE_SHADER_CAP_SUPPORTED_IRS:
368 return 1 << PIPE_SHADER_IR_NIR;
369 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
370 return 32;
371 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
372 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
373 return 0;
374 default:
375 fprintf(stderr, "unknown shader param %d\n", param);
376 return 0;
377 }
378 return 0;
379 }
380
381 static int
382 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
383 enum pipe_compute_cap param, void *ret)
384 {
385 struct v3d_screen *screen = v3d_screen(pscreen);
386
387 if (!screen->has_csd)
388 return 0;
389
390 #define RET(x) do { \
391 if (ret) \
392 memcpy(ret, x, sizeof(x)); \
393 return sizeof(x); \
394 } while (0)
395
396 switch (param) {
397 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
398 RET((uint32_t []) { 32 });
399 break;
400
401 case PIPE_COMPUTE_CAP_IR_TARGET:
402 sprintf(ret, "v3d");
403 return strlen(ret);
404
405 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
406 RET((uint64_t []) { 3 });
407
408 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
409 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
410 * 16-bit field for the number of workgroups in each
411 * dimension.
412 */
413 RET(((uint64_t []) { 65535, 65535, 65535 }));
414
415 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
416 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
417 RET(((uint64_t []) { 256, 256, 256 }));
418
419 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
420 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
421 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
422 * limited by WG_SIZE in the CSD.
423 */
424 RET((uint64_t []) { 256 });
425
426 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
427 RET((uint64_t []) { 1024 * 1024 * 1024 });
428
429 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
430 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
431 RET((uint64_t []) { 32768 });
432
433 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
434 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
435 RET((uint64_t []) { 4096 });
436
437 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
438 struct sysinfo si;
439 sysinfo(&si);
440 RET((uint64_t []) { si.totalram });
441 }
442
443 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
444 /* OpenCL only */
445 RET((uint32_t []) { 0 });
446
447 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
448 RET((uint32_t []) { 1 });
449
450 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
451 RET((uint32_t []) { 1 });
452
453 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
454 RET((uint32_t []) { 16 });
455
456 }
457
458 return 0;
459 }
460
461 static boolean
462 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
463 enum pipe_format format,
464 enum pipe_texture_target target,
465 unsigned sample_count,
466 unsigned storage_sample_count,
467 unsigned usage)
468 {
469 struct v3d_screen *screen = v3d_screen(pscreen);
470
471 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
472 return false;
473
474 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
475 return FALSE;
476
477 if (target >= PIPE_MAX_TEXTURE_TYPES) {
478 return FALSE;
479 }
480
481 if (usage & PIPE_BIND_VERTEX_BUFFER) {
482 switch (format) {
483 case PIPE_FORMAT_R32G32B32A32_FLOAT:
484 case PIPE_FORMAT_R32G32B32_FLOAT:
485 case PIPE_FORMAT_R32G32_FLOAT:
486 case PIPE_FORMAT_R32_FLOAT:
487 case PIPE_FORMAT_R32G32B32A32_SNORM:
488 case PIPE_FORMAT_R32G32B32_SNORM:
489 case PIPE_FORMAT_R32G32_SNORM:
490 case PIPE_FORMAT_R32_SNORM:
491 case PIPE_FORMAT_R32G32B32A32_SSCALED:
492 case PIPE_FORMAT_R32G32B32_SSCALED:
493 case PIPE_FORMAT_R32G32_SSCALED:
494 case PIPE_FORMAT_R32_SSCALED:
495 case PIPE_FORMAT_R16G16B16A16_UNORM:
496 case PIPE_FORMAT_R16G16B16_UNORM:
497 case PIPE_FORMAT_R16G16_UNORM:
498 case PIPE_FORMAT_R16_UNORM:
499 case PIPE_FORMAT_R16G16B16A16_SNORM:
500 case PIPE_FORMAT_R16G16B16_SNORM:
501 case PIPE_FORMAT_R16G16_SNORM:
502 case PIPE_FORMAT_R16_SNORM:
503 case PIPE_FORMAT_R16G16B16A16_USCALED:
504 case PIPE_FORMAT_R16G16B16_USCALED:
505 case PIPE_FORMAT_R16G16_USCALED:
506 case PIPE_FORMAT_R16_USCALED:
507 case PIPE_FORMAT_R16G16B16A16_SSCALED:
508 case PIPE_FORMAT_R16G16B16_SSCALED:
509 case PIPE_FORMAT_R16G16_SSCALED:
510 case PIPE_FORMAT_R16_SSCALED:
511 case PIPE_FORMAT_R8G8B8A8_UNORM:
512 case PIPE_FORMAT_R8G8B8_UNORM:
513 case PIPE_FORMAT_R8G8_UNORM:
514 case PIPE_FORMAT_R8_UNORM:
515 case PIPE_FORMAT_R8G8B8A8_SNORM:
516 case PIPE_FORMAT_R8G8B8_SNORM:
517 case PIPE_FORMAT_R8G8_SNORM:
518 case PIPE_FORMAT_R8_SNORM:
519 case PIPE_FORMAT_R8G8B8A8_USCALED:
520 case PIPE_FORMAT_R8G8B8_USCALED:
521 case PIPE_FORMAT_R8G8_USCALED:
522 case PIPE_FORMAT_R8_USCALED:
523 case PIPE_FORMAT_R8G8B8A8_SSCALED:
524 case PIPE_FORMAT_R8G8B8_SSCALED:
525 case PIPE_FORMAT_R8G8_SSCALED:
526 case PIPE_FORMAT_R8_SSCALED:
527 case PIPE_FORMAT_R10G10B10A2_UNORM:
528 case PIPE_FORMAT_B10G10R10A2_UNORM:
529 case PIPE_FORMAT_R10G10B10A2_SNORM:
530 case PIPE_FORMAT_B10G10R10A2_SNORM:
531 case PIPE_FORMAT_R10G10B10A2_USCALED:
532 case PIPE_FORMAT_B10G10R10A2_USCALED:
533 case PIPE_FORMAT_R10G10B10A2_SSCALED:
534 case PIPE_FORMAT_B10G10R10A2_SSCALED:
535 break;
536 default:
537 return FALSE;
538 }
539 }
540
541 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
542 * of FRAMEBUFFER_MAX_SAMPLES
543 */
544 if ((usage & PIPE_BIND_RENDER_TARGET) &&
545 format != PIPE_FORMAT_NONE &&
546 !v3d_rt_format_supported(&screen->devinfo, format)) {
547 return FALSE;
548 }
549
550 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
551 !v3d_tex_format_supported(&screen->devinfo, format)) {
552 return FALSE;
553 }
554
555 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
556 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
557 format == PIPE_FORMAT_X8Z24_UNORM ||
558 format == PIPE_FORMAT_Z16_UNORM ||
559 format == PIPE_FORMAT_Z32_FLOAT ||
560 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
561 return FALSE;
562 }
563
564 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
565 !(format == PIPE_FORMAT_I8_UINT ||
566 format == PIPE_FORMAT_I16_UINT ||
567 format == PIPE_FORMAT_I32_UINT)) {
568 return FALSE;
569 }
570
571 return TRUE;
572 }
573
574 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
575
576 static unsigned handle_hash(void *key)
577 {
578 return PTR_TO_UINT(key);
579 }
580
581 static int handle_compare(void *key1, void *key2)
582 {
583 return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
584 }
585
586 static bool
587 v3d_get_device_info(struct v3d_screen *screen)
588 {
589 struct drm_v3d_get_param ident0 = {
590 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT0,
591 };
592 struct drm_v3d_get_param ident1 = {
593 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT1,
594 };
595 int ret;
596
597 ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident0);
598 if (ret != 0) {
599 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
600 strerror(errno));
601 return false;
602 }
603 ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident1);
604 if (ret != 0) {
605 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
606 strerror(errno));
607 return false;
608 }
609
610 uint32_t major = (ident0.value >> 24) & 0xff;
611 uint32_t minor = (ident1.value >> 0) & 0xf;
612 screen->devinfo.ver = major * 10 + minor;
613
614 screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 8192;
615
616 int nslc = (ident1.value >> 4) & 0xf;
617 int qups = (ident1.value >> 8) & 0xf;
618 screen->devinfo.qpu_count = nslc * qups;
619
620 switch (screen->devinfo.ver) {
621 case 33:
622 case 41:
623 case 42:
624 break;
625 default:
626 fprintf(stderr,
627 "V3D %d.%d not supported by this version of Mesa.\n",
628 screen->devinfo.ver / 10,
629 screen->devinfo.ver % 10);
630 return false;
631 }
632
633 return true;
634 }
635
636 static const void *
637 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
638 enum pipe_shader_ir ir, unsigned shader)
639 {
640 return &v3d_nir_options;
641 }
642
643 static void
644 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
645 enum pipe_format format, int max,
646 uint64_t *modifiers,
647 unsigned int *external_only,
648 int *count)
649 {
650 int i;
651 uint64_t available_modifiers[] = {
652 DRM_FORMAT_MOD_BROADCOM_UIF,
653 DRM_FORMAT_MOD_LINEAR,
654 };
655 int num_modifiers = ARRAY_SIZE(available_modifiers);
656
657 if (!modifiers) {
658 *count = num_modifiers;
659 return;
660 }
661
662 *count = MIN2(max, num_modifiers);
663 for (i = 0; i < *count; i++) {
664 modifiers[i] = available_modifiers[i];
665 if (external_only)
666 external_only[i] = false;
667 }
668 }
669
670 struct pipe_screen *
671 v3d_screen_create(int fd, const struct pipe_screen_config *config,
672 struct renderonly *ro)
673 {
674 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
675 struct pipe_screen *pscreen;
676
677 pscreen = &screen->base;
678
679 pscreen->destroy = v3d_screen_destroy;
680 pscreen->get_param = v3d_screen_get_param;
681 pscreen->get_paramf = v3d_screen_get_paramf;
682 pscreen->get_shader_param = v3d_screen_get_shader_param;
683 pscreen->get_compute_param = v3d_get_compute_param;
684 pscreen->context_create = v3d_context_create;
685 pscreen->is_format_supported = v3d_screen_is_format_supported;
686
687 screen->fd = fd;
688 if (ro) {
689 screen->ro = renderonly_dup(ro);
690 if (!screen->ro) {
691 fprintf(stderr, "Failed to dup renderonly object\n");
692 ralloc_free(screen);
693 return NULL;
694 }
695 }
696 list_inithead(&screen->bo_cache.time_list);
697 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
698 screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
699
700 #if defined(USE_V3D_SIMULATOR)
701 v3d_simulator_init(screen);
702 #endif
703
704 if (!v3d_get_device_info(screen))
705 goto fail;
706
707 /* We have to driCheckOption for the simulator mode to not assertion
708 * fail on not having our XML config.
709 */
710 const char *nonmsaa_name = "v3d_nonmsaa_texture_size_limit";
711 screen->nonmsaa_texture_size_limit =
712 driCheckOption(config->options, nonmsaa_name, DRI_BOOL) &&
713 driQueryOptionb(config->options, nonmsaa_name);
714
715 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
716
717 screen->has_csd = false; /* until the UABI is enabled. */
718
719 v3d_fence_init(screen);
720
721 v3d_process_debug_variable();
722
723 v3d_resource_screen_init(pscreen);
724
725 screen->compiler = v3d_compiler_init(&screen->devinfo);
726
727 pscreen->get_name = v3d_screen_get_name;
728 pscreen->get_vendor = v3d_screen_get_vendor;
729 pscreen->get_device_vendor = v3d_screen_get_vendor;
730 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
731 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
732
733 return pscreen;
734
735 fail:
736 close(fd);
737 ralloc_free(pscreen);
738 return NULL;
739 }