v3d: Use the right size for v3d 4.x TEXTURE_SHADER_STATE BO.
[mesa.git] / src / gallium / drivers / v3d / v3dx_state.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "pipe/p_state.h"
26 #include "util/u_format.h"
27 #include "util/u_framebuffer.h"
28 #include "util/u_inlines.h"
29 #include "util/u_math.h"
30 #include "util/u_memory.h"
31 #include "util/u_half.h"
32 #include "util/u_helpers.h"
33
34 #include "v3d_context.h"
35 #include "v3d_tiling.h"
36 #include "broadcom/common/v3d_macros.h"
37 #include "broadcom/cle/v3dx_pack.h"
38
39 static void *
40 v3d_generic_cso_state_create(const void *src, uint32_t size)
41 {
42 void *dst = calloc(1, size);
43 if (!dst)
44 return NULL;
45 memcpy(dst, src, size);
46 return dst;
47 }
48
49 static void
50 v3d_generic_cso_state_delete(struct pipe_context *pctx, void *hwcso)
51 {
52 free(hwcso);
53 }
54
55 static void
56 v3d_set_blend_color(struct pipe_context *pctx,
57 const struct pipe_blend_color *blend_color)
58 {
59 struct v3d_context *v3d = v3d_context(pctx);
60 v3d->blend_color.f = *blend_color;
61 for (int i = 0; i < 4; i++) {
62 v3d->blend_color.hf[i] =
63 util_float_to_half(blend_color->color[i]);
64 }
65 v3d->dirty |= VC5_DIRTY_BLEND_COLOR;
66 }
67
68 static void
69 v3d_set_stencil_ref(struct pipe_context *pctx,
70 const struct pipe_stencil_ref *stencil_ref)
71 {
72 struct v3d_context *v3d = v3d_context(pctx);
73 v3d->stencil_ref = *stencil_ref;
74 v3d->dirty |= VC5_DIRTY_STENCIL_REF;
75 }
76
77 static void
78 v3d_set_clip_state(struct pipe_context *pctx,
79 const struct pipe_clip_state *clip)
80 {
81 struct v3d_context *v3d = v3d_context(pctx);
82 v3d->clip = *clip;
83 v3d->dirty |= VC5_DIRTY_CLIP;
84 }
85
86 static void
87 v3d_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
88 {
89 struct v3d_context *v3d = v3d_context(pctx);
90 v3d->sample_mask = sample_mask & ((1 << VC5_MAX_SAMPLES) - 1);
91 v3d->dirty |= VC5_DIRTY_SAMPLE_STATE;
92 }
93
94 static uint16_t
95 float_to_187_half(float f)
96 {
97 return fui(f) >> 16;
98 }
99
100 static void *
101 v3d_create_rasterizer_state(struct pipe_context *pctx,
102 const struct pipe_rasterizer_state *cso)
103 {
104 struct v3d_rasterizer_state *so;
105
106 so = CALLOC_STRUCT(v3d_rasterizer_state);
107 if (!so)
108 return NULL;
109
110 so->base = *cso;
111
112 /* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
113 * BCM21553).
114 */
115 so->point_size = MAX2(cso->point_size, .125f);
116
117 if (cso->offset_tri) {
118 so->offset_units = float_to_187_half(cso->offset_units);
119 so->offset_factor = float_to_187_half(cso->offset_scale);
120 }
121
122 return so;
123 }
124
125 /* Blend state is baked into shaders. */
126 static void *
127 v3d_create_blend_state(struct pipe_context *pctx,
128 const struct pipe_blend_state *cso)
129 {
130 return v3d_generic_cso_state_create(cso, sizeof(*cso));
131 }
132
133 static uint32_t
134 translate_stencil_op(enum pipe_stencil_op op)
135 {
136 switch (op) {
137 case PIPE_STENCIL_OP_KEEP: return V3D_STENCIL_OP_KEEP;
138 case PIPE_STENCIL_OP_ZERO: return V3D_STENCIL_OP_ZERO;
139 case PIPE_STENCIL_OP_REPLACE: return V3D_STENCIL_OP_REPLACE;
140 case PIPE_STENCIL_OP_INCR: return V3D_STENCIL_OP_INCR;
141 case PIPE_STENCIL_OP_DECR: return V3D_STENCIL_OP_DECR;
142 case PIPE_STENCIL_OP_INCR_WRAP: return V3D_STENCIL_OP_INCWRAP;
143 case PIPE_STENCIL_OP_DECR_WRAP: return V3D_STENCIL_OP_DECWRAP;
144 case PIPE_STENCIL_OP_INVERT: return V3D_STENCIL_OP_INVERT;
145 }
146 unreachable("bad stencil op");
147 }
148
149 static void *
150 v3d_create_depth_stencil_alpha_state(struct pipe_context *pctx,
151 const struct pipe_depth_stencil_alpha_state *cso)
152 {
153 struct v3d_depth_stencil_alpha_state *so;
154
155 so = CALLOC_STRUCT(v3d_depth_stencil_alpha_state);
156 if (!so)
157 return NULL;
158
159 so->base = *cso;
160
161 if (cso->depth.enabled) {
162 switch (cso->depth.func) {
163 case PIPE_FUNC_LESS:
164 case PIPE_FUNC_LEQUAL:
165 so->ez_state = VC5_EZ_LT_LE;
166 break;
167 case PIPE_FUNC_GREATER:
168 case PIPE_FUNC_GEQUAL:
169 so->ez_state = VC5_EZ_GT_GE;
170 break;
171 case PIPE_FUNC_NEVER:
172 case PIPE_FUNC_EQUAL:
173 so->ez_state = VC5_EZ_UNDECIDED;
174 break;
175 default:
176 so->ez_state = VC5_EZ_DISABLED;
177 break;
178 }
179
180 /* If stencil is enabled and it's not a no-op, then it would
181 * break EZ updates.
182 */
183 if (cso->stencil[0].enabled &&
184 (cso->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP ||
185 cso->stencil[0].func != PIPE_FUNC_ALWAYS ||
186 (cso->stencil[1].enabled &&
187 (cso->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP &&
188 cso->stencil[1].func != PIPE_FUNC_ALWAYS)))) {
189 so->ez_state = VC5_EZ_DISABLED;
190 }
191 }
192
193 const struct pipe_stencil_state *front = &cso->stencil[0];
194 const struct pipe_stencil_state *back = &cso->stencil[1];
195
196 if (front->enabled) {
197 STATIC_ASSERT(sizeof(so->stencil_front) >=
198 cl_packet_length(STENCIL_CONFIG));
199 v3dx_pack(&so->stencil_front, STENCIL_CONFIG, config) {
200 config.front_config = true;
201 /* If !back->enabled, then the front values should be
202 * used for both front and back-facing primitives.
203 */
204 config.back_config = !back->enabled;
205
206 config.stencil_write_mask = front->writemask;
207 config.stencil_test_mask = front->valuemask;
208
209 config.stencil_test_function = front->func;
210 config.stencil_pass_op =
211 translate_stencil_op(front->zpass_op);
212 config.depth_test_fail_op =
213 translate_stencil_op(front->zfail_op);
214 config.stencil_test_fail_op =
215 translate_stencil_op(front->fail_op);
216 }
217 }
218 if (back->enabled) {
219 STATIC_ASSERT(sizeof(so->stencil_back) >=
220 cl_packet_length(STENCIL_CONFIG));
221 v3dx_pack(&so->stencil_back, STENCIL_CONFIG, config) {
222 config.front_config = false;
223 config.back_config = true;
224
225 config.stencil_write_mask = back->writemask;
226 config.stencil_test_mask = back->valuemask;
227
228 config.stencil_test_function = back->func;
229 config.stencil_pass_op =
230 translate_stencil_op(back->zpass_op);
231 config.depth_test_fail_op =
232 translate_stencil_op(back->zfail_op);
233 config.stencil_test_fail_op =
234 translate_stencil_op(back->fail_op);
235 }
236 }
237
238 return so;
239 }
240
241 static void
242 v3d_set_polygon_stipple(struct pipe_context *pctx,
243 const struct pipe_poly_stipple *stipple)
244 {
245 struct v3d_context *v3d = v3d_context(pctx);
246 v3d->stipple = *stipple;
247 v3d->dirty |= VC5_DIRTY_STIPPLE;
248 }
249
250 static void
251 v3d_set_scissor_states(struct pipe_context *pctx,
252 unsigned start_slot,
253 unsigned num_scissors,
254 const struct pipe_scissor_state *scissor)
255 {
256 struct v3d_context *v3d = v3d_context(pctx);
257
258 v3d->scissor = *scissor;
259 v3d->dirty |= VC5_DIRTY_SCISSOR;
260 }
261
262 static void
263 v3d_set_viewport_states(struct pipe_context *pctx,
264 unsigned start_slot,
265 unsigned num_viewports,
266 const struct pipe_viewport_state *viewport)
267 {
268 struct v3d_context *v3d = v3d_context(pctx);
269 v3d->viewport = *viewport;
270 v3d->dirty |= VC5_DIRTY_VIEWPORT;
271 }
272
273 static void
274 v3d_set_vertex_buffers(struct pipe_context *pctx,
275 unsigned start_slot, unsigned count,
276 const struct pipe_vertex_buffer *vb)
277 {
278 struct v3d_context *v3d = v3d_context(pctx);
279 struct v3d_vertexbuf_stateobj *so = &v3d->vertexbuf;
280
281 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb,
282 start_slot, count);
283 so->count = util_last_bit(so->enabled_mask);
284
285 v3d->dirty |= VC5_DIRTY_VTXBUF;
286 }
287
288 static void
289 v3d_blend_state_bind(struct pipe_context *pctx, void *hwcso)
290 {
291 struct v3d_context *v3d = v3d_context(pctx);
292 v3d->blend = hwcso;
293 v3d->dirty |= VC5_DIRTY_BLEND;
294 }
295
296 static void
297 v3d_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
298 {
299 struct v3d_context *v3d = v3d_context(pctx);
300 v3d->rasterizer = hwcso;
301 v3d->dirty |= VC5_DIRTY_RASTERIZER;
302 }
303
304 static void
305 v3d_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
306 {
307 struct v3d_context *v3d = v3d_context(pctx);
308 v3d->zsa = hwcso;
309 v3d->dirty |= VC5_DIRTY_ZSA;
310 }
311
312 static void *
313 v3d_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
314 const struct pipe_vertex_element *elements)
315 {
316 struct v3d_context *v3d = v3d_context(pctx);
317 struct v3d_vertex_stateobj *so = CALLOC_STRUCT(v3d_vertex_stateobj);
318
319 if (!so)
320 return NULL;
321
322 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
323 so->num_elements = num_elements;
324
325 for (int i = 0; i < so->num_elements; i++) {
326 const struct pipe_vertex_element *elem = &elements[i];
327 const struct util_format_description *desc =
328 util_format_description(elem->src_format);
329 uint32_t r_size = desc->channel[0].size;
330
331 const uint32_t size =
332 cl_packet_length(GL_SHADER_STATE_ATTRIBUTE_RECORD);
333
334 v3dx_pack(&so->attrs[i * size],
335 GL_SHADER_STATE_ATTRIBUTE_RECORD, attr) {
336 /* vec_size == 0 means 4 */
337 attr.vec_size = desc->nr_channels & 3;
338 attr.signed_int_type = (desc->channel[0].type ==
339 UTIL_FORMAT_TYPE_SIGNED);
340
341 attr.normalized_int_type = desc->channel[0].normalized;
342 attr.read_as_int_uint = desc->channel[0].pure_integer;
343 attr.instance_divisor = MIN2(elem->instance_divisor,
344 0xffff);
345
346 switch (desc->channel[0].type) {
347 case UTIL_FORMAT_TYPE_FLOAT:
348 if (r_size == 32) {
349 attr.type = ATTRIBUTE_FLOAT;
350 } else {
351 assert(r_size == 16);
352 attr.type = ATTRIBUTE_HALF_FLOAT;
353 }
354 break;
355
356 case UTIL_FORMAT_TYPE_SIGNED:
357 case UTIL_FORMAT_TYPE_UNSIGNED:
358 switch (r_size) {
359 case 32:
360 attr.type = ATTRIBUTE_INT;
361 break;
362 case 16:
363 attr.type = ATTRIBUTE_SHORT;
364 break;
365 case 10:
366 attr.type = ATTRIBUTE_INT2_10_10_10;
367 break;
368 case 8:
369 attr.type = ATTRIBUTE_BYTE;
370 break;
371 default:
372 fprintf(stderr,
373 "format %s unsupported\n",
374 desc->name);
375 attr.type = ATTRIBUTE_BYTE;
376 abort();
377 }
378 break;
379
380 default:
381 fprintf(stderr,
382 "format %s unsupported\n",
383 desc->name);
384 abort();
385 }
386 }
387 }
388
389 /* Set up the default attribute values in case any of the vertex
390 * elements use them.
391 */
392 so->default_attribute_values = v3d_bo_alloc(v3d->screen,
393 VC5_MAX_ATTRIBUTES *
394 4 * sizeof(float),
395 "default attributes");
396 uint32_t *attrs = v3d_bo_map(so->default_attribute_values);
397 for (int i = 0; i < VC5_MAX_ATTRIBUTES; i++) {
398 attrs[i * 4 + 0] = 0;
399 attrs[i * 4 + 1] = 0;
400 attrs[i * 4 + 2] = 0;
401 if (i < so->num_elements &&
402 util_format_is_pure_integer(so->pipe[i].src_format)) {
403 attrs[i * 4 + 3] = 1;
404 } else {
405 attrs[i * 4 + 3] = fui(1.0);
406 }
407 }
408
409 return so;
410 }
411
412 static void
413 v3d_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
414 {
415 struct v3d_context *v3d = v3d_context(pctx);
416 v3d->vtx = hwcso;
417 v3d->dirty |= VC5_DIRTY_VTXSTATE;
418 }
419
420 static void
421 v3d_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
422 const struct pipe_constant_buffer *cb)
423 {
424 struct v3d_context *v3d = v3d_context(pctx);
425 struct v3d_constbuf_stateobj *so = &v3d->constbuf[shader];
426
427 util_copy_constant_buffer(&so->cb[index], cb);
428
429 /* Note that the state tracker can unbind constant buffers by
430 * passing NULL here.
431 */
432 if (unlikely(!cb)) {
433 so->enabled_mask &= ~(1 << index);
434 so->dirty_mask &= ~(1 << index);
435 return;
436 }
437
438 so->enabled_mask |= 1 << index;
439 so->dirty_mask |= 1 << index;
440 v3d->dirty |= VC5_DIRTY_CONSTBUF;
441 }
442
443 static void
444 v3d_set_framebuffer_state(struct pipe_context *pctx,
445 const struct pipe_framebuffer_state *framebuffer)
446 {
447 struct v3d_context *v3d = v3d_context(pctx);
448 struct pipe_framebuffer_state *cso = &v3d->framebuffer;
449
450 v3d->job = NULL;
451
452 util_copy_framebuffer_state(cso, framebuffer);
453
454 v3d->swap_color_rb = 0;
455 v3d->blend_dst_alpha_one = 0;
456 for (int i = 0; i < v3d->framebuffer.nr_cbufs; i++) {
457 struct pipe_surface *cbuf = v3d->framebuffer.cbufs[i];
458 if (!cbuf)
459 continue;
460
461 const struct util_format_description *desc =
462 util_format_description(cbuf->format);
463
464 /* For BGRA8 formats (DRI window system default format), we
465 * need to swap R and B, since the HW's format is RGBA8.
466 */
467 if (desc->swizzle[0] == PIPE_SWIZZLE_Z &&
468 cbuf->format != PIPE_FORMAT_B5G6R5_UNORM) {
469 v3d->swap_color_rb |= 1 << i;
470 }
471
472 if (desc->swizzle[3] == PIPE_SWIZZLE_1)
473 v3d->blend_dst_alpha_one |= 1 << i;
474 }
475
476 v3d->dirty |= VC5_DIRTY_FRAMEBUFFER;
477 }
478
479 static struct v3d_texture_stateobj *
480 v3d_get_stage_tex(struct v3d_context *v3d, enum pipe_shader_type shader)
481 {
482 switch (shader) {
483 case PIPE_SHADER_FRAGMENT:
484 v3d->dirty |= VC5_DIRTY_FRAGTEX;
485 return &v3d->fragtex;
486 break;
487 case PIPE_SHADER_VERTEX:
488 v3d->dirty |= VC5_DIRTY_VERTTEX;
489 return &v3d->verttex;
490 break;
491 default:
492 fprintf(stderr, "Unknown shader target %d\n", shader);
493 abort();
494 }
495 }
496
497 static uint32_t translate_wrap(uint32_t pipe_wrap, bool using_nearest)
498 {
499 switch (pipe_wrap) {
500 case PIPE_TEX_WRAP_REPEAT:
501 return 0;
502 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
503 return 1;
504 case PIPE_TEX_WRAP_MIRROR_REPEAT:
505 return 2;
506 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
507 return 3;
508 case PIPE_TEX_WRAP_CLAMP:
509 return (using_nearest ? 1 : 3);
510 default:
511 unreachable("Unknown wrap mode");
512 }
513 }
514
515
516 static void *
517 v3d_create_sampler_state(struct pipe_context *pctx,
518 const struct pipe_sampler_state *cso)
519 {
520 MAYBE_UNUSED struct v3d_context *v3d = v3d_context(pctx);
521 struct v3d_sampler_state *so = CALLOC_STRUCT(v3d_sampler_state);
522
523 if (!so)
524 return NULL;
525
526 memcpy(so, cso, sizeof(*cso));
527
528 bool either_nearest =
529 (cso->mag_img_filter == PIPE_TEX_MIPFILTER_NEAREST ||
530 cso->min_img_filter == PIPE_TEX_MIPFILTER_NEAREST);
531
532 #if V3D_VERSION >= 40
533 so->bo = v3d_bo_alloc(v3d->screen, cl_packet_length(SAMPLER_STATE),
534 "sampler");
535 void *map = v3d_bo_map(so->bo);
536
537 v3dx_pack(map, SAMPLER_STATE, sampler) {
538 sampler.wrap_i_border = false;
539
540 sampler.wrap_s = translate_wrap(cso->wrap_s, either_nearest);
541 sampler.wrap_t = translate_wrap(cso->wrap_t, either_nearest);
542 sampler.wrap_r = translate_wrap(cso->wrap_r, either_nearest);
543
544 sampler.fixed_bias = cso->lod_bias;
545 sampler.depth_compare_function = cso->compare_func;
546
547 sampler.min_filter_nearest =
548 cso->min_img_filter == PIPE_TEX_FILTER_NEAREST;
549 sampler.mag_filter_nearest =
550 cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST;
551 sampler.mip_filter_nearest =
552 cso->min_mip_filter != PIPE_TEX_MIPFILTER_LINEAR;
553
554 sampler.min_level_of_detail = MIN2(MAX2(0, cso->min_lod),
555 15);
556 sampler.max_level_of_detail = MIN2(cso->max_lod, 15);
557
558 if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) {
559 sampler.min_level_of_detail = 0;
560 sampler.max_level_of_detail = 0;
561 }
562
563 if (cso->max_anisotropy) {
564 sampler.anisotropy_enable = true;
565
566 if (cso->max_anisotropy > 8)
567 sampler.maximum_anisotropy = 3;
568 else if (cso->max_anisotropy > 4)
569 sampler.maximum_anisotropy = 2;
570 else if (cso->max_anisotropy > 2)
571 sampler.maximum_anisotropy = 1;
572 }
573
574 sampler.border_colour_mode = V3D_BORDER_COLOUR_FOLLOWS;
575 /* XXX: The border colour field is in the TMU blending format
576 * (32, f16, or i16), and we need to customize it based on
577 * that.
578 *
579 * XXX: for compat alpha formats, we need the alpha field to
580 * be in the red channel.
581 */
582 sampler.border_colour_red =
583 util_float_to_half(cso->border_color.f[0]);
584 sampler.border_colour_green =
585 util_float_to_half(cso->border_color.f[1]);
586 sampler.border_colour_blue =
587 util_float_to_half(cso->border_color.f[2]);
588 sampler.border_colour_alpha =
589 util_float_to_half(cso->border_color.f[3]);
590 }
591
592 #else /* V3D_VERSION < 40 */
593 v3dx_pack(&so->p0, TEXTURE_UNIFORM_PARAMETER_0_CFG_MODE1, p0) {
594 p0.s_wrap_mode = translate_wrap(cso->wrap_s, either_nearest);
595 p0.t_wrap_mode = translate_wrap(cso->wrap_t, either_nearest);
596 p0.r_wrap_mode = translate_wrap(cso->wrap_r, either_nearest);
597 }
598
599 v3dx_pack(&so->texture_shader_state, TEXTURE_SHADER_STATE, tex) {
600 tex.depth_compare_function = cso->compare_func;
601 tex.fixed_bias = cso->lod_bias;
602 }
603 #endif /* V3D_VERSION < 40 */
604 return so;
605 }
606
607 static void
608 v3d_sampler_states_bind(struct pipe_context *pctx,
609 enum pipe_shader_type shader, unsigned start,
610 unsigned nr, void **hwcso)
611 {
612 struct v3d_context *v3d = v3d_context(pctx);
613 struct v3d_texture_stateobj *stage_tex = v3d_get_stage_tex(v3d, shader);
614
615 assert(start == 0);
616 unsigned i;
617 unsigned new_nr = 0;
618
619 for (i = 0; i < nr; i++) {
620 if (hwcso[i])
621 new_nr = i + 1;
622 stage_tex->samplers[i] = hwcso[i];
623 }
624
625 for (; i < stage_tex->num_samplers; i++) {
626 stage_tex->samplers[i] = NULL;
627 }
628
629 stage_tex->num_samplers = new_nr;
630 }
631
632 static void
633 v3d_sampler_state_delete(struct pipe_context *pctx,
634 void *hwcso)
635 {
636 struct pipe_sampler_state *psampler = hwcso;
637 struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
638
639 v3d_bo_unreference(&sampler->bo);
640 free(psampler);
641 }
642
643 #if V3D_VERSION >= 40
644 static uint32_t
645 translate_swizzle(unsigned char pipe_swizzle)
646 {
647 switch (pipe_swizzle) {
648 case PIPE_SWIZZLE_0:
649 return 0;
650 case PIPE_SWIZZLE_1:
651 return 1;
652 case PIPE_SWIZZLE_X:
653 case PIPE_SWIZZLE_Y:
654 case PIPE_SWIZZLE_Z:
655 case PIPE_SWIZZLE_W:
656 return 2 + pipe_swizzle;
657 default:
658 unreachable("unknown swizzle");
659 }
660 }
661 #endif
662
663 static struct pipe_sampler_view *
664 v3d_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
665 const struct pipe_sampler_view *cso)
666 {
667 struct v3d_context *v3d = v3d_context(pctx);
668 struct v3d_screen *screen = v3d->screen;
669 struct v3d_sampler_view *so = CALLOC_STRUCT(v3d_sampler_view);
670 struct v3d_resource *rsc = v3d_resource(prsc);
671
672 if (!so)
673 return NULL;
674
675 so->base = *cso;
676
677 pipe_reference(NULL, &prsc->reference);
678
679 /* Compute the sampler view's swizzle up front. This will be plugged
680 * into either the sampler (for 16-bit returns) or the shader's
681 * texture key (for 32)
682 */
683 uint8_t view_swizzle[4] = {
684 cso->swizzle_r,
685 cso->swizzle_g,
686 cso->swizzle_b,
687 cso->swizzle_a
688 };
689 const uint8_t *fmt_swizzle =
690 v3d_get_format_swizzle(&screen->devinfo, so->base.format);
691 util_format_compose_swizzles(fmt_swizzle, view_swizzle, so->swizzle);
692
693 so->base.texture = prsc;
694 so->base.reference.count = 1;
695 so->base.context = pctx;
696
697 int msaa_scale = prsc->nr_samples > 1 ? 2 : 1;
698
699 #if V3D_VERSION >= 40
700 so->bo = v3d_bo_alloc(v3d->screen,
701 cl_packet_length(TEXTURE_SHADER_STATE), "sampler");
702 void *map = v3d_bo_map(so->bo);
703
704 v3dx_pack(map, TEXTURE_SHADER_STATE, tex) {
705 #else /* V3D_VERSION < 40 */
706 STATIC_ASSERT(sizeof(so->texture_shader_state) >=
707 cl_packet_length(TEXTURE_SHADER_STATE));
708 v3dx_pack(&so->texture_shader_state, TEXTURE_SHADER_STATE, tex) {
709 #endif
710
711 tex.image_width = prsc->width0 * msaa_scale;
712 tex.image_height = prsc->height0 * msaa_scale;
713
714 #if V3D_VERSION >= 40
715 /* On 4.x, the height of a 1D texture is redefined to be the
716 * upper 14 bits of the width (which is only usable with txf).
717 */
718 if (prsc->target == PIPE_TEXTURE_1D ||
719 prsc->target == PIPE_TEXTURE_1D_ARRAY) {
720 tex.image_height = tex.image_width >> 14;
721 }
722 #endif
723
724 if (prsc->target == PIPE_TEXTURE_3D) {
725 tex.image_depth = prsc->depth0;
726 } else {
727 tex.image_depth = (cso->u.tex.last_layer -
728 cso->u.tex.first_layer) + 1;
729 }
730
731 tex.srgb = util_format_is_srgb(cso->format);
732
733 tex.base_level = cso->u.tex.first_level;
734 #if V3D_VERSION >= 40
735 tex.max_level = cso->u.tex.last_level;
736 /* Note that we don't have a job to reference the texture's sBO
737 * at state create time, so any time this sampler view is used
738 * we need to add the texture to the job.
739 */
740 tex.texture_base_pointer = cl_address(NULL,
741 rsc->bo->offset +
742 rsc->slices[0].offset),
743
744 tex.swizzle_r = translate_swizzle(so->swizzle[0]);
745 tex.swizzle_g = translate_swizzle(so->swizzle[1]);
746 tex.swizzle_b = translate_swizzle(so->swizzle[2]);
747 tex.swizzle_a = translate_swizzle(so->swizzle[3]);
748 #endif
749 tex.array_stride_64_byte_aligned = rsc->cube_map_stride / 64;
750
751 if (prsc->nr_samples > 1 && V3D_VERSION < 40) {
752 /* Using texture views to reinterpret formats on our
753 * MSAA textures won't work, because we don't lay out
754 * the bits in memory as it's expected -- for example,
755 * RGBA8 and RGB10_A2 are compatible in the
756 * ARB_texture_view spec, but in HW we lay them out as
757 * 32bpp RGBA8 and 64bpp RGBA16F. Just assert for now
758 * to catch failures.
759 *
760 * We explicitly allow remapping S8Z24 to RGBA8888 for
761 * v3d_blit.c's stencil blits.
762 */
763 assert((util_format_linear(cso->format) ==
764 util_format_linear(prsc->format)) ||
765 (prsc->format == PIPE_FORMAT_S8_UINT_Z24_UNORM &&
766 cso->format == PIPE_FORMAT_R8G8B8A8_UNORM));
767 uint32_t output_image_format =
768 v3d_get_rt_format(&screen->devinfo, cso->format);
769 uint32_t internal_type;
770 uint32_t internal_bpp;
771 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
772 output_image_format,
773 &internal_type,
774 &internal_bpp);
775
776 switch (internal_type) {
777 case V3D_INTERNAL_TYPE_8:
778 tex.texture_type = TEXTURE_DATA_FORMAT_RGBA8;
779 break;
780 case V3D_INTERNAL_TYPE_16F:
781 tex.texture_type = TEXTURE_DATA_FORMAT_RGBA16F;
782 break;
783 default:
784 unreachable("Bad MSAA texture type");
785 }
786
787 /* sRGB was stored in the tile buffer as linear and
788 * would have been encoded to sRGB on resolved tile
789 * buffer store. Note that this means we would need
790 * shader code if we wanted to read an MSAA sRGB
791 * texture without sRGB decode.
792 */
793 tex.srgb = false;
794 } else {
795 tex.texture_type = v3d_get_tex_format(&screen->devinfo,
796 cso->format);
797 }
798
799 /* Since other platform devices may produce UIF images even
800 * when they're not big enough for V3D to assume they're UIF,
801 * we force images with level 0 as UIF to be always treated
802 * that way.
803 */
804 tex.level_0_is_strictly_uif = (rsc->slices[0].tiling ==
805 VC5_TILING_UIF_XOR ||
806 rsc->slices[0].tiling ==
807 VC5_TILING_UIF_NO_XOR);
808 tex.level_0_xor_enable = (rsc->slices[0].tiling ==
809 VC5_TILING_UIF_XOR);
810
811 if (tex.level_0_is_strictly_uif)
812 tex.level_0_ub_pad = rsc->slices[0].ub_pad;
813
814 #if V3D_VERSION >= 40
815 if (tex.uif_xor_disable ||
816 tex.level_0_is_strictly_uif) {
817 tex.extended = true;
818 }
819 #endif /* V3D_VERSION >= 40 */
820 };
821
822 return &so->base;
823 }
824
825 static void
826 v3d_sampler_view_destroy(struct pipe_context *pctx,
827 struct pipe_sampler_view *psview)
828 {
829 struct v3d_sampler_view *sview = v3d_sampler_view(psview);
830
831 v3d_bo_unreference(&sview->bo);
832 pipe_resource_reference(&psview->texture, NULL);
833 free(psview);
834 }
835
836 static void
837 v3d_set_sampler_views(struct pipe_context *pctx,
838 enum pipe_shader_type shader,
839 unsigned start, unsigned nr,
840 struct pipe_sampler_view **views)
841 {
842 struct v3d_context *v3d = v3d_context(pctx);
843 struct v3d_texture_stateobj *stage_tex = v3d_get_stage_tex(v3d, shader);
844 unsigned i;
845 unsigned new_nr = 0;
846
847 assert(start == 0);
848
849 for (i = 0; i < nr; i++) {
850 if (views[i])
851 new_nr = i + 1;
852 pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
853 }
854
855 for (; i < stage_tex->num_textures; i++) {
856 pipe_sampler_view_reference(&stage_tex->textures[i], NULL);
857 }
858
859 stage_tex->num_textures = new_nr;
860 }
861
862 static struct pipe_stream_output_target *
863 v3d_create_stream_output_target(struct pipe_context *pctx,
864 struct pipe_resource *prsc,
865 unsigned buffer_offset,
866 unsigned buffer_size)
867 {
868 struct pipe_stream_output_target *target;
869
870 target = CALLOC_STRUCT(pipe_stream_output_target);
871 if (!target)
872 return NULL;
873
874 pipe_reference_init(&target->reference, 1);
875 pipe_resource_reference(&target->buffer, prsc);
876
877 target->context = pctx;
878 target->buffer_offset = buffer_offset;
879 target->buffer_size = buffer_size;
880
881 return target;
882 }
883
884 static void
885 v3d_stream_output_target_destroy(struct pipe_context *pctx,
886 struct pipe_stream_output_target *target)
887 {
888 pipe_resource_reference(&target->buffer, NULL);
889 free(target);
890 }
891
892 static void
893 v3d_set_stream_output_targets(struct pipe_context *pctx,
894 unsigned num_targets,
895 struct pipe_stream_output_target **targets,
896 const unsigned *offsets)
897 {
898 struct v3d_context *ctx = v3d_context(pctx);
899 struct v3d_streamout_stateobj *so = &ctx->streamout;
900 unsigned i;
901
902 assert(num_targets <= ARRAY_SIZE(so->targets));
903
904 for (i = 0; i < num_targets; i++)
905 pipe_so_target_reference(&so->targets[i], targets[i]);
906
907 for (; i < so->num_targets; i++)
908 pipe_so_target_reference(&so->targets[i], NULL);
909
910 so->num_targets = num_targets;
911
912 ctx->dirty |= VC5_DIRTY_STREAMOUT;
913 }
914
915 void
916 v3dX(state_init)(struct pipe_context *pctx)
917 {
918 pctx->set_blend_color = v3d_set_blend_color;
919 pctx->set_stencil_ref = v3d_set_stencil_ref;
920 pctx->set_clip_state = v3d_set_clip_state;
921 pctx->set_sample_mask = v3d_set_sample_mask;
922 pctx->set_constant_buffer = v3d_set_constant_buffer;
923 pctx->set_framebuffer_state = v3d_set_framebuffer_state;
924 pctx->set_polygon_stipple = v3d_set_polygon_stipple;
925 pctx->set_scissor_states = v3d_set_scissor_states;
926 pctx->set_viewport_states = v3d_set_viewport_states;
927
928 pctx->set_vertex_buffers = v3d_set_vertex_buffers;
929
930 pctx->create_blend_state = v3d_create_blend_state;
931 pctx->bind_blend_state = v3d_blend_state_bind;
932 pctx->delete_blend_state = v3d_generic_cso_state_delete;
933
934 pctx->create_rasterizer_state = v3d_create_rasterizer_state;
935 pctx->bind_rasterizer_state = v3d_rasterizer_state_bind;
936 pctx->delete_rasterizer_state = v3d_generic_cso_state_delete;
937
938 pctx->create_depth_stencil_alpha_state = v3d_create_depth_stencil_alpha_state;
939 pctx->bind_depth_stencil_alpha_state = v3d_zsa_state_bind;
940 pctx->delete_depth_stencil_alpha_state = v3d_generic_cso_state_delete;
941
942 pctx->create_vertex_elements_state = v3d_vertex_state_create;
943 pctx->delete_vertex_elements_state = v3d_generic_cso_state_delete;
944 pctx->bind_vertex_elements_state = v3d_vertex_state_bind;
945
946 pctx->create_sampler_state = v3d_create_sampler_state;
947 pctx->delete_sampler_state = v3d_sampler_state_delete;
948 pctx->bind_sampler_states = v3d_sampler_states_bind;
949
950 pctx->create_sampler_view = v3d_create_sampler_view;
951 pctx->sampler_view_destroy = v3d_sampler_view_destroy;
952 pctx->set_sampler_views = v3d_set_sampler_views;
953
954 pctx->create_stream_output_target = v3d_create_stream_output_target;
955 pctx->stream_output_target_destroy = v3d_stream_output_target_destroy;
956 pctx->set_stream_output_targets = v3d_set_stream_output_targets;
957 }