src/gallium/drivers/vc4/vc4_nir_lower_txf_ms.c

   1 /*
   2  * Copyright © 2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "vc4_qir.h"
  25 #include "kernel/vc4_packet.h"
  26 #include "compiler/nir/nir_builder.h"
  27
  28 /** @file vc4_nir_lower_txf_ms.c
  29  * Walks the NIR generated by TGSI-to-NIR to lower its nir_texop_txf_ms
  30  * coordinates to do the math necessary and use a plain nir_texop_txf instead.
  31  *
  32  * MSAA textures are laid out as 32x32-aligned blocks of RGBA8888 or Z24S8.
  33  * We can't load them through the normal sampler path because of the lack of
  34  * linear support in the hardware.  So, we treat MSAA textures as a giant UBO
  35  * and do the math in the shader.
  36  */
  37
  38 static nir_ssa_def *
  39 vc4_nir_lower_txf_ms_instr(nir_builder *b, nir_instr *instr, void *data)
  40 {
  41         nir_tex_instr *txf_ms = nir_instr_as_tex(instr);
  42         const struct vc4_compile *c = data;
  43
  44         nir_tex_instr *txf = nir_tex_instr_create(c->s, 1);
  45         txf->op = nir_texop_txf;
  46         txf->texture_index = txf_ms->texture_index;
  47         txf->coord_components = txf_ms->coord_components;
  48         txf->is_shadow = txf_ms->is_shadow;
  49         txf->is_new_style_shadow = txf_ms->is_new_style_shadow;
  50
  51         nir_ssa_def *coord = NULL, *sample_index = NULL;
  52         for (int i = 0; i < txf_ms->num_srcs; i++) {
  53                 assert(txf_ms->src[i].src.is_ssa);
  54
  55                 switch (txf_ms->src[i].src_type) {
  56                 case nir_tex_src_coord:
  57                         coord = txf_ms->src[i].src.ssa;
  58                         break;
  59                 case nir_tex_src_ms_index:
  60                         sample_index = txf_ms->src[i].src.ssa;
  61                         break;
  62                 default:
  63                         unreachable("Unknown txf_ms src\n");
  64                 }
  65         }
  66         assert(coord);
  67         assert(sample_index);
  68
  69         nir_ssa_def *x = nir_channel(b, coord, 0);
  70         nir_ssa_def *y = nir_channel(b, coord, 1);
  71
  72         uint32_t tile_w = 32;
  73         uint32_t tile_h = 32;
  74         uint32_t tile_w_shift = 5;
  75         uint32_t tile_h_shift = 5;
  76         uint32_t tile_size = (tile_h * tile_w *
  77                               VC4_MAX_SAMPLES * sizeof(uint32_t));
  78         unsigned unit = txf_ms->texture_index;
  79         uint32_t w = align(c->key->tex[unit].msaa_width, tile_w);
  80         uint32_t w_tiles = w / tile_w;
  81
  82         nir_ssa_def *x_tile = nir_ushr(b, x, nir_imm_int(b, tile_w_shift));
  83         nir_ssa_def *y_tile = nir_ushr(b, y, nir_imm_int(b, tile_h_shift));
  84         nir_ssa_def *tile_addr = nir_iadd(b,
  85                                           nir_imul(b, x_tile,
  86                                                    nir_imm_int(b, tile_size)),
  87                                           nir_imul(b, y_tile,
  88                                                    nir_imm_int(b, (w_tiles *
  89                                                                    tile_size))));
  90         nir_ssa_def *x_subspan = nir_iand(b, x,
  91                                           nir_imm_int(b, (tile_w - 1) & ~1));
  92         nir_ssa_def *y_subspan = nir_iand(b, y,
  93                                           nir_imm_int(b, (tile_h - 1) & ~1));
  94         nir_ssa_def *subspan_addr = nir_iadd(b,
  95                                              nir_imul(b, x_subspan,
  96                                                       nir_imm_int(b, 2 * VC4_MAX_SAMPLES * sizeof(uint32_t))),
  97                                              nir_imul(b, y_subspan,
  98                                                       nir_imm_int(b,
  99                                                                   tile_w *
 100                                                                   VC4_MAX_SAMPLES *
 101                                                                   sizeof(uint32_t))));
 102
 103         nir_ssa_def *pixel_addr = nir_ior(b,
 104                                           nir_iand(b,
 105                                                    nir_ishl(b, x,
 106                                                             nir_imm_int(b, 2)),
 107                                                    nir_imm_int(b, (1 << 2))),
 108                                           nir_iand(b,
 109                                                    nir_ishl(b, y,
 110                                                             nir_imm_int(b, 3)),
 111                                                    nir_imm_int(b, (1 << 3))));
 112
 113         nir_ssa_def *sample_addr = nir_ishl(b, sample_index, nir_imm_int(b, 4));
 114
 115         nir_ssa_def *addr = nir_iadd(b,
 116                                      nir_ior(b, sample_addr, pixel_addr),
 117                                      nir_iadd(b, subspan_addr, tile_addr));
 118
 119         txf->src[0].src_type = nir_tex_src_coord;
 120         txf->src[0].src = nir_src_for_ssa(nir_vec2(b, addr, nir_imm_int(b, 0)));
 121         nir_ssa_dest_init(&txf->instr, &txf->dest, 4, 32, NULL);
 122         nir_builder_instr_insert(b, &txf->instr);
 123
 124         return &txf->dest.ssa;
 125 }
 126
 127 static bool
 128 vc4_nir_lower_txf_ms_filter(const nir_instr *instr, const void *data)
 129 {
 130         return (instr->type == nir_instr_type_tex &&
 131                 nir_instr_as_tex(instr)->op == nir_texop_txf_ms);
 132 }
 133
 134 void
 135 vc4_nir_lower_txf_ms(nir_shader *s, struct vc4_compile *c)
 136 {
 137         nir_shader_lower_instructions(s,
 138                                       vc4_nir_lower_txf_ms_filter,
 139                                       vc4_nir_lower_txf_ms_instr,
 140                                       c);
 141 }