2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "pipe/p_defines.h"
26 #include "util/u_blit.h"
27 #include "util/u_memory.h"
28 #include "util/u_format.h"
29 #include "util/u_inlines.h"
30 #include "util/u_surface.h"
31 #include "util/u_transfer_helper.h"
32 #include "util/u_upload_mgr.h"
34 #include "drm_fourcc.h"
36 #include "vc4_screen.h"
37 #include "vc4_context.h"
38 #include "vc4_resource.h"
39 #include "vc4_tiling.h"
42 vc4_resource_bo_alloc(struct vc4_resource
*rsc
)
44 struct pipe_resource
*prsc
= &rsc
->base
;
45 struct pipe_screen
*pscreen
= prsc
->screen
;
48 if (vc4_debug
& VC4_DEBUG_SURFACE
) {
49 fprintf(stderr
, "alloc %p: size %d + offset %d -> %d\n",
52 rsc
->slices
[0].offset
,
53 rsc
->slices
[0].offset
+
55 rsc
->cube_map_stride
* (prsc
->array_size
- 1));
58 bo
= vc4_bo_alloc(vc4_screen(pscreen
),
59 rsc
->slices
[0].offset
+
61 rsc
->cube_map_stride
* (prsc
->array_size
- 1),
64 vc4_bo_unreference(&rsc
->bo
);
73 vc4_resource_transfer_unmap(struct pipe_context
*pctx
,
74 struct pipe_transfer
*ptrans
)
76 struct vc4_context
*vc4
= vc4_context(pctx
);
77 struct vc4_transfer
*trans
= vc4_transfer(ptrans
);
80 struct vc4_resource
*rsc
= vc4_resource(ptrans
->resource
);
81 struct vc4_resource_slice
*slice
= &rsc
->slices
[ptrans
->level
];
83 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
) {
84 vc4_store_tiled_image(rsc
->bo
->map
+ slice
->offset
+
85 ptrans
->box
.z
* rsc
->cube_map_stride
,
87 trans
->map
, ptrans
->stride
,
88 slice
->tiling
, rsc
->cpp
,
94 pipe_resource_reference(&ptrans
->resource
, NULL
);
95 slab_free(&vc4
->transfer_pool
, ptrans
);
99 vc4_resource_transfer_map(struct pipe_context
*pctx
,
100 struct pipe_resource
*prsc
,
101 unsigned level
, unsigned usage
,
102 const struct pipe_box
*box
,
103 struct pipe_transfer
**pptrans
)
105 struct vc4_context
*vc4
= vc4_context(pctx
);
106 struct vc4_resource
*rsc
= vc4_resource(prsc
);
107 struct vc4_transfer
*trans
;
108 struct pipe_transfer
*ptrans
;
109 enum pipe_format format
= prsc
->format
;
112 /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
115 if ((usage
& PIPE_TRANSFER_DISCARD_RANGE
) &&
116 !(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) &&
117 !(prsc
->flags
& PIPE_RESOURCE_FLAG_MAP_PERSISTENT
) &&
118 prsc
->last_level
== 0 &&
119 prsc
->width0
== box
->width
&&
120 prsc
->height0
== box
->height
&&
121 prsc
->depth0
== box
->depth
&&
122 prsc
->array_size
== 1 &&
124 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
127 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
128 if (vc4_resource_bo_alloc(rsc
)) {
129 /* If it might be bound as one of our vertex buffers,
130 * make sure we re-emit vertex buffer state.
132 if (prsc
->bind
& PIPE_BIND_VERTEX_BUFFER
)
133 vc4
->dirty
|= VC4_DIRTY_VTXBUF
;
135 /* If we failed to reallocate, flush users so that we
136 * don't violate any syncing requirements.
138 vc4_flush_jobs_reading_resource(vc4
, prsc
);
140 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
141 /* If we're writing and the buffer is being used by the CL, we
142 * have to flush the CL first. If we're only reading, we need
143 * to flush if the CL has written our buffer.
145 if (usage
& PIPE_TRANSFER_WRITE
)
146 vc4_flush_jobs_reading_resource(vc4
, prsc
);
148 vc4_flush_jobs_writing_resource(vc4
, prsc
);
151 if (usage
& PIPE_TRANSFER_WRITE
) {
153 rsc
->initialized_buffers
= ~0;
156 trans
= slab_alloc(&vc4
->transfer_pool
);
160 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
162 /* slab_alloc_st() doesn't zero: */
163 memset(trans
, 0, sizeof(*trans
));
164 ptrans
= &trans
->base
;
166 pipe_resource_reference(&ptrans
->resource
, prsc
);
167 ptrans
->level
= level
;
168 ptrans
->usage
= usage
;
171 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)
172 buf
= vc4_bo_map_unsynchronized(rsc
->bo
);
174 buf
= vc4_bo_map(rsc
->bo
);
176 fprintf(stderr
, "Failed to map bo\n");
182 struct vc4_resource_slice
*slice
= &rsc
->slices
[level
];
184 /* No direct mappings of tiled, since we need to manually
187 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
)
190 if (format
== PIPE_FORMAT_ETC1_RGB8
) {
191 /* ETC1 is arranged as 64-bit blocks, where each block
192 * is 4x4 pixels. Texture tiling operates on the
193 * 64-bit block the way it would an uncompressed
196 assert(!(ptrans
->box
.x
& 3));
197 assert(!(ptrans
->box
.y
& 3));
200 ptrans
->box
.width
= (ptrans
->box
.width
+ 3) >> 2;
201 ptrans
->box
.height
= (ptrans
->box
.height
+ 3) >> 2;
204 ptrans
->stride
= ptrans
->box
.width
* rsc
->cpp
;
205 ptrans
->layer_stride
= ptrans
->stride
* ptrans
->box
.height
;
207 trans
->map
= malloc(ptrans
->layer_stride
* ptrans
->box
.depth
);
209 if (usage
& PIPE_TRANSFER_READ
) {
210 vc4_load_tiled_image(trans
->map
, ptrans
->stride
,
211 buf
+ slice
->offset
+
212 ptrans
->box
.z
* rsc
->cube_map_stride
,
214 slice
->tiling
, rsc
->cpp
,
219 ptrans
->stride
= slice
->stride
;
220 ptrans
->layer_stride
= ptrans
->stride
;
222 return buf
+ slice
->offset
+
223 ptrans
->box
.y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
224 ptrans
->box
.x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
225 ptrans
->box
.z
* rsc
->cube_map_stride
;
230 vc4_resource_transfer_unmap(pctx
, ptrans
);
235 vc4_texture_subdata(struct pipe_context
*pctx
,
236 struct pipe_resource
*prsc
,
239 const struct pipe_box
*box
,
242 unsigned layer_stride
)
244 struct vc4_resource
*rsc
= vc4_resource(prsc
);
245 struct vc4_resource_slice
*slice
= &rsc
->slices
[level
];
247 /* For a direct mapping, we can just take the u_transfer path. */
250 (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
)) {
251 return u_default_texture_subdata(pctx
, prsc
, level
, usage
, box
,
252 data
, stride
, layer_stride
);
255 /* Otherwise, map and store the texture data directly into the tiled
259 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)
260 buf
= vc4_bo_map_unsynchronized(rsc
->bo
);
262 buf
= vc4_bo_map(rsc
->bo
);
264 vc4_store_tiled_image(buf
+ slice
->offset
+
265 box
->z
* rsc
->cube_map_stride
,
267 (void *)data
, stride
,
268 slice
->tiling
, rsc
->cpp
,
273 vc4_resource_destroy(struct pipe_screen
*pscreen
,
274 struct pipe_resource
*prsc
)
276 struct vc4_screen
*screen
= vc4_screen(pscreen
);
277 struct vc4_resource
*rsc
= vc4_resource(prsc
);
278 vc4_bo_unreference(&rsc
->bo
);
281 renderonly_scanout_destroy(rsc
->scanout
, screen
->ro
);
287 vc4_resource_get_handle(struct pipe_screen
*pscreen
,
288 struct pipe_context
*pctx
,
289 struct pipe_resource
*prsc
,
290 struct winsys_handle
*whandle
,
293 struct vc4_screen
*screen
= vc4_screen(pscreen
);
294 struct vc4_resource
*rsc
= vc4_resource(prsc
);
296 whandle
->stride
= rsc
->slices
[0].stride
;
299 /* If we're passing some reference to our BO out to some other part of
300 * the system, then we can't do any optimizations about only us being
301 * the ones seeing it (like BO caching or shadow update avoidance).
303 rsc
->bo
->private = false;
306 whandle
->modifier
= DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
;
308 whandle
->modifier
= DRM_FORMAT_MOD_LINEAR
;
310 switch (whandle
->type
) {
311 case WINSYS_HANDLE_TYPE_SHARED
:
313 /* This could probably be supported, assuming that a
314 * control node was used for pl111.
316 fprintf(stderr
, "flink unsupported with pl111\n");
320 return vc4_bo_flink(rsc
->bo
, &whandle
->handle
);
321 case WINSYS_HANDLE_TYPE_KMS
:
322 if (screen
->ro
&& renderonly_get_handle(rsc
->scanout
, whandle
))
324 whandle
->handle
= rsc
->bo
->handle
;
326 case WINSYS_HANDLE_TYPE_FD
:
327 /* FDs are cross-device, so we can export directly from vc4.
329 whandle
->handle
= vc4_bo_get_dmabuf(rsc
->bo
);
330 return whandle
->handle
!= -1;
337 vc4_setup_slices(struct vc4_resource
*rsc
, const char *caller
)
339 struct pipe_resource
*prsc
= &rsc
->base
;
340 uint32_t width
= prsc
->width0
;
341 uint32_t height
= prsc
->height0
;
342 if (prsc
->format
== PIPE_FORMAT_ETC1_RGB8
) {
343 width
= (width
+ 3) >> 2;
344 height
= (height
+ 3) >> 2;
347 uint32_t pot_width
= util_next_power_of_two(width
);
348 uint32_t pot_height
= util_next_power_of_two(height
);
350 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
351 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
353 for (int i
= prsc
->last_level
; i
>= 0; i
--) {
354 struct vc4_resource_slice
*slice
= &rsc
->slices
[i
];
356 uint32_t level_width
, level_height
;
359 level_height
= height
;
361 level_width
= u_minify(pot_width
, i
);
362 level_height
= u_minify(pot_height
, i
);
366 slice
->tiling
= VC4_TILING_FORMAT_LINEAR
;
367 if (prsc
->nr_samples
> 1) {
368 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
369 level_width
= align(level_width
, 32);
370 level_height
= align(level_height
, 32);
372 level_width
= align(level_width
, utile_w
);
375 if (vc4_size_is_lt(level_width
, level_height
,
377 slice
->tiling
= VC4_TILING_FORMAT_LT
;
378 level_width
= align(level_width
, utile_w
);
379 level_height
= align(level_height
, utile_h
);
381 slice
->tiling
= VC4_TILING_FORMAT_T
;
382 level_width
= align(level_width
,
384 level_height
= align(level_height
,
389 slice
->offset
= offset
;
390 slice
->stride
= (level_width
* rsc
->cpp
*
391 MAX2(prsc
->nr_samples
, 1));
392 slice
->size
= level_height
* slice
->stride
;
394 offset
+= slice
->size
;
396 if (vc4_debug
& VC4_DEBUG_SURFACE
) {
397 static const char tiling_chars
[] = {
398 [VC4_TILING_FORMAT_LINEAR
] = 'R',
399 [VC4_TILING_FORMAT_LT
] = 'L',
400 [VC4_TILING_FORMAT_T
] = 'T'
403 "rsc %s %p (format %s: vc4 %d), %dx%d: "
404 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
406 util_format_short_name(prsc
->format
),
408 prsc
->width0
, prsc
->height0
,
409 i
, tiling_chars
[slice
->tiling
],
410 level_width
, level_height
,
411 slice
->stride
, slice
->offset
);
415 /* The texture base pointer that has to point to level 0 doesn't have
416 * intra-page bits, so we have to align it, and thus shift up all the
419 uint32_t page_align_offset
= (align(rsc
->slices
[0].offset
, 4096) -
420 rsc
->slices
[0].offset
);
421 if (page_align_offset
) {
422 for (int i
= 0; i
<= prsc
->last_level
; i
++)
423 rsc
->slices
[i
].offset
+= page_align_offset
;
426 /* Cube map faces appear as whole miptrees at a page-aligned offset
427 * from the first face's miptree.
429 if (prsc
->target
== PIPE_TEXTURE_CUBE
) {
430 rsc
->cube_map_stride
= align(rsc
->slices
[0].offset
+
431 rsc
->slices
[0].size
, 4096);
435 static struct vc4_resource
*
436 vc4_resource_setup(struct pipe_screen
*pscreen
,
437 const struct pipe_resource
*tmpl
)
439 struct vc4_resource
*rsc
= CALLOC_STRUCT(vc4_resource
);
442 struct pipe_resource
*prsc
= &rsc
->base
;
446 pipe_reference_init(&prsc
->reference
, 1);
447 prsc
->screen
= pscreen
;
449 if (prsc
->nr_samples
<= 1)
450 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
452 rsc
->cpp
= sizeof(uint32_t);
459 static enum vc4_texture_data_type
460 get_resource_texture_format(struct pipe_resource
*prsc
)
462 struct vc4_resource
*rsc
= vc4_resource(prsc
);
463 uint8_t format
= vc4_get_tex_format(prsc
->format
);
466 if (prsc
->nr_samples
> 1) {
469 if (format
== VC4_TEXTURE_TYPE_RGBA8888
)
470 return VC4_TEXTURE_TYPE_RGBA32R
;
480 find_modifier(uint64_t needle
, const uint64_t *haystack
, int count
)
484 for (i
= 0; i
< count
; i
++) {
485 if (haystack
[i
] == needle
)
492 static struct pipe_resource
*
493 vc4_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
494 const struct pipe_resource
*tmpl
,
495 const uint64_t *modifiers
,
498 struct vc4_screen
*screen
= vc4_screen(pscreen
);
499 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
500 struct pipe_resource
*prsc
= &rsc
->base
;
501 bool linear_ok
= find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
502 /* Use a tiled layout if we can, for better 3D performance. */
503 bool should_tile
= true;
505 /* VBOs/PBOs are untiled (and 1 height). */
506 if (tmpl
->target
== PIPE_BUFFER
)
509 /* MSAA buffers are linear. */
510 if (tmpl
->nr_samples
> 1)
513 /* No tiling when we're sharing with another device (pl111). */
514 if (screen
->ro
&& (tmpl
->bind
& PIPE_BIND_SCANOUT
))
517 /* Cursors are always linear, and the user can request linear as well.
519 if (tmpl
->bind
& (PIPE_BIND_LINEAR
| PIPE_BIND_CURSOR
))
522 /* No shared objects with LT format -- the kernel only has T-format
523 * metadata. LT objects are small enough it's not worth the trouble to
524 * give them metadata to tile.
526 if ((tmpl
->bind
& (PIPE_BIND_SHARED
| PIPE_BIND_SCANOUT
)) &&
527 vc4_size_is_lt(prsc
->width0
, prsc
->height0
, rsc
->cpp
))
530 /* If we're sharing or scanning out, we need the ioctl present to
531 * inform the kernel or the other side.
533 if ((tmpl
->bind
& (PIPE_BIND_SHARED
|
534 PIPE_BIND_SCANOUT
)) && !screen
->has_tiling_ioctl
)
537 /* No user-specified modifier; determine our own. */
538 if (count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
) {
540 rsc
->tiled
= should_tile
;
541 } else if (should_tile
&&
542 find_modifier(DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
,
545 } else if (linear_ok
) {
548 fprintf(stderr
, "Unsupported modifier requested\n");
552 if (tmpl
->target
!= PIPE_BUFFER
)
553 rsc
->vc4_format
= get_resource_texture_format(prsc
);
555 vc4_setup_slices(rsc
, "create");
556 if (!vc4_resource_bo_alloc(rsc
))
559 if (screen
->has_tiling_ioctl
) {
562 modifier
= DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
;
564 modifier
= DRM_FORMAT_MOD_LINEAR
;
565 struct drm_vc4_set_tiling set_tiling
= {
566 .handle
= rsc
->bo
->handle
,
567 .modifier
= modifier
,
569 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_SET_TILING
,
575 if (screen
->ro
&& tmpl
->bind
& PIPE_BIND_SCANOUT
) {
577 renderonly_scanout_for_resource(prsc
, screen
->ro
, NULL
);
582 vc4_bo_label(screen
, rsc
->bo
, "%sresource %dx%d@%d/%d",
583 (tmpl
->bind
& PIPE_BIND_SCANOUT
) ? "scanout " : "",
584 tmpl
->width0
, tmpl
->height0
,
585 rsc
->cpp
* 8, prsc
->last_level
);
589 vc4_resource_destroy(pscreen
, prsc
);
593 struct pipe_resource
*
594 vc4_resource_create(struct pipe_screen
*pscreen
,
595 const struct pipe_resource
*tmpl
)
597 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
598 return vc4_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
601 static struct pipe_resource
*
602 vc4_resource_from_handle(struct pipe_screen
*pscreen
,
603 const struct pipe_resource
*tmpl
,
604 struct winsys_handle
*whandle
,
607 struct vc4_screen
*screen
= vc4_screen(pscreen
);
608 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
609 struct pipe_resource
*prsc
= &rsc
->base
;
610 struct vc4_resource_slice
*slice
= &rsc
->slices
[0];
615 switch (whandle
->type
) {
616 case WINSYS_HANDLE_TYPE_SHARED
:
617 rsc
->bo
= vc4_bo_open_name(screen
,
618 whandle
->handle
, whandle
->stride
);
620 case WINSYS_HANDLE_TYPE_FD
:
621 rsc
->bo
= vc4_bo_open_dmabuf(screen
,
622 whandle
->handle
, whandle
->stride
);
626 "Attempt to import unsupported handle type %d\n",
633 struct drm_vc4_get_tiling get_tiling
= {
634 .handle
= rsc
->bo
->handle
,
636 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_GET_TILING
, &get_tiling
);
639 whandle
->modifier
= DRM_FORMAT_MOD_LINEAR
;
640 } else if (whandle
->modifier
== DRM_FORMAT_MOD_INVALID
) {
641 whandle
->modifier
= get_tiling
.modifier
;
642 } else if (whandle
->modifier
!= get_tiling
.modifier
) {
644 "Modifier 0x%llx vs. tiling (0x%llx) mismatch\n",
645 (long long)whandle
->modifier
, get_tiling
.modifier
);
649 switch (whandle
->modifier
) {
650 case DRM_FORMAT_MOD_LINEAR
:
653 case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
:
658 "Attempt to import unsupported modifier 0x%llx\n",
659 (long long)whandle
->modifier
);
663 rsc
->vc4_format
= get_resource_texture_format(prsc
);
664 vc4_setup_slices(rsc
, "import");
666 if (whandle
->offset
!= 0) {
669 "Attempt to import unsupported "
670 "winsys offset %u\n",
675 rsc
->slices
[0].offset
+= whandle
->offset
;
677 if (rsc
->slices
[0].offset
+ rsc
->slices
[0].size
>
679 fprintf(stderr
, "Attempt to import "
680 "with overflowing offset (%d + %d > %d)\n",
689 /* Make sure that renderonly has a handle to our buffer in the
690 * display's fd, so that a later renderonly_get_handle()
691 * returns correct handles or GEM names.
694 renderonly_create_gpu_import_for_resource(prsc
,
701 if (rsc
->tiled
&& whandle
->stride
!= slice
->stride
) {
702 static bool warned
= false;
706 "Attempting to import %dx%d %s with "
707 "unsupported stride %d instead of %d\n",
708 prsc
->width0
, prsc
->height0
,
709 util_format_short_name(prsc
->format
),
714 } else if (!rsc
->tiled
) {
715 slice
->stride
= whandle
->stride
;
721 vc4_resource_destroy(pscreen
, prsc
);
725 static struct pipe_surface
*
726 vc4_create_surface(struct pipe_context
*pctx
,
727 struct pipe_resource
*ptex
,
728 const struct pipe_surface
*surf_tmpl
)
730 struct vc4_surface
*surface
= CALLOC_STRUCT(vc4_surface
);
731 struct vc4_resource
*rsc
= vc4_resource(ptex
);
736 assert(surf_tmpl
->u
.tex
.first_layer
== surf_tmpl
->u
.tex
.last_layer
);
738 struct pipe_surface
*psurf
= &surface
->base
;
739 unsigned level
= surf_tmpl
->u
.tex
.level
;
741 pipe_reference_init(&psurf
->reference
, 1);
742 pipe_resource_reference(&psurf
->texture
, ptex
);
744 psurf
->context
= pctx
;
745 psurf
->format
= surf_tmpl
->format
;
746 psurf
->width
= u_minify(ptex
->width0
, level
);
747 psurf
->height
= u_minify(ptex
->height0
, level
);
748 psurf
->u
.tex
.level
= level
;
749 psurf
->u
.tex
.first_layer
= surf_tmpl
->u
.tex
.first_layer
;
750 psurf
->u
.tex
.last_layer
= surf_tmpl
->u
.tex
.last_layer
;
751 surface
->offset
= (rsc
->slices
[level
].offset
+
752 psurf
->u
.tex
.first_layer
* rsc
->cube_map_stride
);
753 surface
->tiling
= rsc
->slices
[level
].tiling
;
755 return &surface
->base
;
759 vc4_surface_destroy(struct pipe_context
*pctx
, struct pipe_surface
*psurf
)
761 pipe_resource_reference(&psurf
->texture
, NULL
);
766 vc4_dump_surface_non_msaa(struct pipe_surface
*psurf
)
768 struct pipe_resource
*prsc
= psurf
->texture
;
769 struct vc4_resource
*rsc
= vc4_resource(prsc
);
770 uint32_t *map
= vc4_bo_map(rsc
->bo
);
771 uint32_t stride
= rsc
->slices
[0].stride
/ 4;
772 uint32_t width
= psurf
->width
;
773 uint32_t height
= psurf
->height
;
774 uint32_t chunk_w
= width
/ 79;
775 uint32_t chunk_h
= height
/ 40;
776 uint32_t found_colors
[10];
777 uint32_t num_found_colors
= 0;
779 if (rsc
->vc4_format
!= VC4_TEXTURE_TYPE_RGBA32R
) {
780 fprintf(stderr
, "%s: Unsupported format %s\n",
781 __func__
, util_format_short_name(psurf
->format
));
785 for (int by
= 0; by
< height
; by
+= chunk_h
) {
786 for (int bx
= 0; bx
< width
; bx
+= chunk_w
) {
787 int all_found_color
= -1; /* nothing found */
789 for (int y
= by
; y
< MIN2(height
, by
+ chunk_h
); y
++) {
790 for (int x
= bx
; x
< MIN2(width
, bx
+ chunk_w
); x
++) {
791 uint32_t pix
= map
[y
* stride
+ x
];
794 for (i
= 0; i
< num_found_colors
; i
++) {
795 if (pix
== found_colors
[i
])
798 if (i
== num_found_colors
&&
800 ARRAY_SIZE(found_colors
)) {
801 found_colors
[num_found_colors
++] = pix
;
804 if (i
< num_found_colors
) {
805 if (all_found_color
== -1)
807 else if (i
!= all_found_color
)
808 all_found_color
= ARRAY_SIZE(found_colors
);
812 /* If all pixels for this chunk have a consistent
813 * value, then print a character for it. Either a
814 * fixed name (particularly common for piglit tests),
815 * or a runtime-generated number.
817 if (all_found_color
>= 0 &&
818 all_found_color
< ARRAY_SIZE(found_colors
)) {
819 static const struct {
831 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
832 if (named_colors
[i
].val
==
833 found_colors
[all_found_color
]) {
834 fprintf(stderr
, "%s",
839 /* For unnamed colors, print a number and the
840 * numbers will have values printed at the
843 if (i
== ARRAY_SIZE(named_colors
)) {
844 fprintf(stderr
, "%c",
845 '0' + all_found_color
);
848 /* If there's no consistent color, print this.
850 fprintf(stderr
, ".");
853 fprintf(stderr
, "\n");
856 for (int i
= 0; i
< num_found_colors
; i
++) {
857 fprintf(stderr
, "color %d: 0x%08x\n", i
, found_colors
[i
]);
862 vc4_surface_msaa_get_sample(struct pipe_surface
*psurf
,
863 uint32_t x
, uint32_t y
, uint32_t sample
)
865 struct pipe_resource
*prsc
= psurf
->texture
;
866 struct vc4_resource
*rsc
= vc4_resource(prsc
);
867 uint32_t tile_w
= 32, tile_h
= 32;
868 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, 32);
870 uint32_t tile_x
= x
/ tile_w
;
871 uint32_t tile_y
= y
/ tile_h
;
872 uint32_t *tile
= (vc4_bo_map(rsc
->bo
) +
873 VC4_TILE_BUFFER_SIZE
* (tile_y
* tiles_w
+ tile_x
));
874 uint32_t subtile_x
= x
% tile_w
;
875 uint32_t subtile_y
= y
% tile_h
;
877 uint32_t quad_samples
= VC4_MAX_SAMPLES
* 4;
878 uint32_t tile_stride
= quad_samples
* tile_w
/ 2;
880 return *((uint32_t *)tile
+
881 (subtile_y
>> 1) * tile_stride
+
882 (subtile_x
>> 1) * quad_samples
+
883 ((subtile_y
& 1) << 1) +
889 vc4_dump_surface_msaa_char(struct pipe_surface
*psurf
,
890 uint32_t start_x
, uint32_t start_y
,
891 uint32_t w
, uint32_t h
)
893 bool all_same_color
= true;
894 uint32_t all_pix
= 0;
896 for (int y
= start_y
; y
< start_y
+ h
; y
++) {
897 for (int x
= start_x
; x
< start_x
+ w
; x
++) {
898 for (int s
= 0; s
< VC4_MAX_SAMPLES
; s
++) {
899 uint32_t pix
= vc4_surface_msaa_get_sample(psurf
,
902 if (x
== start_x
&& y
== start_y
)
904 else if (all_pix
!= pix
)
905 all_same_color
= false;
909 if (all_same_color
) {
910 static const struct {
922 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
923 if (named_colors
[i
].val
== all_pix
) {
924 fprintf(stderr
, "%s",
929 fprintf(stderr
, "x");
931 fprintf(stderr
, ".");
936 vc4_dump_surface_msaa(struct pipe_surface
*psurf
)
938 uint32_t tile_w
= 32, tile_h
= 32;
939 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, tile_w
);
940 uint32_t tiles_h
= DIV_ROUND_UP(psurf
->height
, tile_h
);
941 uint32_t char_w
= 140, char_h
= 60;
942 uint32_t char_w_per_tile
= char_w
/ tiles_w
- 1;
943 uint32_t char_h_per_tile
= char_h
/ tiles_h
- 1;
945 fprintf(stderr
, "Surface: %dx%d (%dx MSAA)\n",
946 psurf
->width
, psurf
->height
, psurf
->texture
->nr_samples
);
948 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
949 fprintf(stderr
, "-");
950 fprintf(stderr
, "\n");
952 for (int ty
= 0; ty
< psurf
->height
; ty
+= tile_h
) {
953 for (int y
= 0; y
< char_h_per_tile
; y
++) {
955 for (int tx
= 0; tx
< psurf
->width
; tx
+= tile_w
) {
956 for (int x
= 0; x
< char_w_per_tile
; x
++) {
957 uint32_t bx1
= (x
* tile_w
/
959 uint32_t bx2
= ((x
+ 1) * tile_w
/
961 uint32_t by1
= (y
* tile_h
/
963 uint32_t by2
= ((y
+ 1) * tile_h
/
966 vc4_dump_surface_msaa_char(psurf
,
972 fprintf(stderr
, "|");
974 fprintf(stderr
, "\n");
977 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
978 fprintf(stderr
, "-");
979 fprintf(stderr
, "\n");
983 /** Debug routine to dump the contents of an 8888 surface to the console */
985 vc4_dump_surface(struct pipe_surface
*psurf
)
990 if (psurf
->texture
->nr_samples
> 1)
991 vc4_dump_surface_msaa(psurf
);
993 vc4_dump_surface_non_msaa(psurf
);
997 vc4_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*resource
)
999 /* All calls to flush_resource are followed by a flush of the context,
1000 * so there's nothing to do.
1005 vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx
,
1006 struct pipe_sampler_view
*pview
)
1008 struct vc4_sampler_view
*view
= vc4_sampler_view(pview
);
1009 struct vc4_resource
*shadow
= vc4_resource(view
->texture
);
1010 struct vc4_resource
*orig
= vc4_resource(pview
->texture
);
1012 assert(view
->texture
!= pview
->texture
);
1014 if (shadow
->writes
== orig
->writes
&& orig
->bo
->private)
1017 perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
1018 orig
->base
.width0
, orig
->base
.height0
,
1019 pview
->u
.tex
.first_level
,
1020 pview
->u
.tex
.first_level
? "base level" : "raster layout");
1022 for (int i
= 0; i
<= shadow
->base
.last_level
; i
++) {
1023 unsigned width
= u_minify(shadow
->base
.width0
, i
);
1024 unsigned height
= u_minify(shadow
->base
.height0
, i
);
1025 struct pipe_blit_info info
= {
1027 .resource
= &shadow
->base
,
1037 .format
= shadow
->base
.format
,
1040 .resource
= &orig
->base
,
1041 .level
= pview
->u
.tex
.first_level
+ i
,
1050 .format
= orig
->base
.format
,
1054 pctx
->blit(pctx
, &info
);
1057 shadow
->writes
= orig
->writes
;
1061 * Converts a 4-byte index buffer to 2 bytes.
1063 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
1064 * include 4-byte index support, and we have to shrink it down.
1066 * There's no fallback support for when indices end up being larger than 2^16,
1067 * though it will at least assertion fail. Also, if the original index data
1068 * was in user memory, it would be nice to not have uploaded it to a VBO
1069 * before translating.
1071 struct pipe_resource
*
1072 vc4_get_shadow_index_buffer(struct pipe_context
*pctx
,
1073 const struct pipe_draw_info
*info
,
1076 uint32_t *shadow_offset
)
1078 struct vc4_context
*vc4
= vc4_context(pctx
);
1079 struct vc4_resource
*orig
= vc4_resource(info
->index
.resource
);
1080 perf_debug("Fallback conversion for %d uint indices\n", count
);
1083 struct pipe_resource
*shadow_rsc
= NULL
;
1084 u_upload_alloc(vc4
->uploader
, 0, count
* 2, 4,
1085 shadow_offset
, &shadow_rsc
, &data
);
1086 uint16_t *dst
= data
;
1088 struct pipe_transfer
*src_transfer
= NULL
;
1089 const uint32_t *src
;
1090 if (info
->has_user_indices
) {
1091 src
= info
->index
.user
;
1093 src
= pipe_buffer_map_range(pctx
, &orig
->base
,
1096 PIPE_TRANSFER_READ
, &src_transfer
);
1099 for (int i
= 0; i
< count
; i
++) {
1100 uint32_t src_index
= src
[i
];
1101 assert(src_index
<= 0xffff);
1106 pctx
->transfer_unmap(pctx
, src_transfer
);
1111 static const struct u_transfer_vtbl transfer_vtbl
= {
1112 .resource_create
= vc4_resource_create
,
1113 .resource_destroy
= vc4_resource_destroy
,
1114 .transfer_map
= vc4_resource_transfer_map
,
1115 .transfer_unmap
= vc4_resource_transfer_unmap
,
1116 .transfer_flush_region
= u_default_transfer_flush_region
,
1120 vc4_resource_screen_init(struct pipe_screen
*pscreen
)
1122 struct vc4_screen
*screen
= vc4_screen(pscreen
);
1124 pscreen
->resource_create
= vc4_resource_create
;
1125 pscreen
->resource_create_with_modifiers
=
1126 vc4_resource_create_with_modifiers
;
1127 pscreen
->resource_from_handle
= vc4_resource_from_handle
;
1128 pscreen
->resource_destroy
= u_resource_destroy_vtbl
;
1129 pscreen
->resource_get_handle
= vc4_resource_get_handle
;
1130 pscreen
->resource_destroy
= vc4_resource_destroy
;
1131 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1132 false, false, true);
1134 /* Test if the kernel has GET_TILING; it will return -EINVAL if the
1135 * ioctl does not exist, but -ENOENT if we pass an impossible handle.
1136 * 0 cannot be a valid GEM object, so use that.
1138 struct drm_vc4_get_tiling get_tiling
= {
1141 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_GET_TILING
, &get_tiling
);
1142 if (ret
== -1 && errno
== ENOENT
)
1143 screen
->has_tiling_ioctl
= true;
1147 vc4_resource_context_init(struct pipe_context
*pctx
)
1149 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1150 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1151 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1152 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1153 pctx
->texture_subdata
= vc4_texture_subdata
;
1154 pctx
->create_surface
= vc4_create_surface
;
1155 pctx
->surface_destroy
= vc4_surface_destroy
;
1156 pctx
->resource_copy_region
= util_resource_copy_region
;
1157 pctx
->blit
= vc4_blit
;
1158 pctx
->flush_resource
= vc4_flush_resource
;