src/gallium/drivers/vc4/vc4_screen.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_debug.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/ralloc.h"
  34
  35 #include <xf86drm.h>
  36 #include "vc4_drm.h"
  37 #include "vc4_screen.h"
  38 #include "vc4_context.h"
  39 #include "vc4_resource.h"
  40
  41 static const struct debug_named_value debug_options[] = {
  42         { "cl",       VC4_DEBUG_CL,
  43           "Dump command list during creation" },
  44         { "qpu",      VC4_DEBUG_QPU,
  45           "Dump generated QPU instructions" },
  46         { "qir",      VC4_DEBUG_QIR,
  47           "Dump QPU IR during program compile" },
  48         { "nir",      VC4_DEBUG_NIR,
  49           "Dump NIR during program compile" },
  50         { "tgsi",     VC4_DEBUG_TGSI,
  51           "Dump TGSI during program compile" },
  52         { "shaderdb", VC4_DEBUG_SHADERDB,
  53           "Dump program compile information for shader-db analysis" },
  54         { "perf",     VC4_DEBUG_PERF,
  55           "Print during performance-related events" },
  56         { "norast",   VC4_DEBUG_NORAST,
  57           "Skip actual hardware execution of commands" },
  58         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
  59           "Flush after each draw call" },
  60         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
  61           "Wait for finish after each flush" },
  62 #if USE_VC4_SIMULATOR
  63         { "dump", VC4_DEBUG_DUMP,
  64           "Write a GPU command stream trace file" },
  65 #endif
  66         { NULL }
  67 };
  68
  69 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
  70 uint32_t vc4_debug;
  71
  72 static const char *
  73 vc4_screen_get_name(struct pipe_screen *pscreen)
  74 {
  75         struct vc4_screen *screen = vc4_screen(pscreen);
  76
  77         if (!screen->name) {
  78                 screen->name = ralloc_asprintf(screen,
  79                                                "VC4 V3D %d.%d",
  80                                                screen->v3d_ver / 10,
  81                                                screen->v3d_ver % 10);
  82         }
  83
  84         return screen->name;
  85 }
  86
  87 static const char *
  88 vc4_screen_get_vendor(struct pipe_screen *pscreen)
  89 {
  90         return "Broadcom";
  91 }
  92
  93 static void
  94 vc4_screen_destroy(struct pipe_screen *pscreen)
  95 {
  96         struct vc4_screen *screen = vc4_screen(pscreen);
  97
  98         vc4_bufmgr_destroy(pscreen);
  99         close(screen->fd);
 100         ralloc_free(pscreen);
 101 }
 102
 103 static int
 104 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 105 {
 106         switch (param) {
 107                 /* Supported features (boolean caps). */
 108         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 109         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 110         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 111         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 112         case PIPE_CAP_NPOT_TEXTURES:
 113         case PIPE_CAP_SHAREABLE_SHADERS:
 114         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 115         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 116         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 117         case PIPE_CAP_TWO_SIDED_STENCIL:
 118         case PIPE_CAP_USER_INDEX_BUFFERS:
 119         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 120         case PIPE_CAP_TEXTURE_SWIZZLE:
 121                 return 1;
 122
 123                 /* lying for GL 2.0 */
 124         case PIPE_CAP_OCCLUSION_QUERY:
 125         case PIPE_CAP_POINT_SPRITE:
 126                 return 1;
 127
 128         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 129                 return 256;
 130
 131         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 132                 return 120;
 133
 134         case PIPE_CAP_MAX_VIEWPORTS:
 135                 return 1;
 136
 137         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 138         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 139                 return 1;
 140
 141         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 142                 return 1;
 143
 144                 /* Unsupported features. */
 145         case PIPE_CAP_ANISOTROPIC_FILTER:
 146         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 147         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 148         case PIPE_CAP_CUBE_MAP_ARRAY:
 149         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 150         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 151         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 152         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 153         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 154         case PIPE_CAP_TGSI_INSTANCEID:
 155         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 156         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 157         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 158         case PIPE_CAP_COMPUTE:
 159         case PIPE_CAP_START_INSTANCE:
 160         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 161         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 162         case PIPE_CAP_TGSI_TEXCOORD:
 163         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 164         case PIPE_CAP_CONDITIONAL_RENDER:
 165         case PIPE_CAP_PRIMITIVE_RESTART:
 166         case PIPE_CAP_TEXTURE_BARRIER:
 167         case PIPE_CAP_SM3:
 168         case PIPE_CAP_INDEP_BLEND_ENABLE:
 169         case PIPE_CAP_INDEP_BLEND_FUNC:
 170         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 171         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 172         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 173         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 174         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 175         case PIPE_CAP_USER_VERTEX_BUFFERS:
 176         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 177         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 178         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 179         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 180         case PIPE_CAP_TEXTURE_GATHER_SM5:
 181         case PIPE_CAP_FAKE_SW_MSAA:
 182         case PIPE_CAP_TEXTURE_QUERY_LOD:
 183         case PIPE_CAP_SAMPLE_SHADING:
 184         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 185         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 186         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 187         case PIPE_CAP_MAX_TEXEL_OFFSET:
 188         case PIPE_CAP_MAX_VERTEX_STREAMS:
 189         case PIPE_CAP_DRAW_INDIRECT:
 190         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 191         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 192         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 193         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 194         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 195         case PIPE_CAP_CLIP_HALFZ:
 196         case PIPE_CAP_VERTEXID_NOBASE:
 197         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 198         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 199         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 200         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 201         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 202         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 203         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 204         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 205         case PIPE_CAP_TGSI_TXQS:
 206         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 207         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 208         case PIPE_CAP_CLEAR_TEXTURE:
 209         case PIPE_CAP_DRAW_PARAMETERS:
 210         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 211         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 212         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 213         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 214         case PIPE_CAP_INVALIDATE_BUFFER:
 215         case PIPE_CAP_GENERATE_MIPMAP:
 216         case PIPE_CAP_STRING_MARKER:
 217         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 218         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 219         case PIPE_CAP_QUERY_MEMORY_INFO:
 220         case PIPE_CAP_PCI_GROUP:
 221         case PIPE_CAP_PCI_BUS:
 222         case PIPE_CAP_PCI_DEVICE:
 223         case PIPE_CAP_PCI_FUNCTION:
 224         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 225         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 226         case PIPE_CAP_CULL_DISTANCE:
 227         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 228         case PIPE_CAP_TGSI_VOTE:
 229         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 230         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 231         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 232                 return 0;
 233
 234                 /* Stream output. */
 235         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 236         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 237         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 238         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 239                 return 0;
 240
 241                 /* Geometry shader output, unsupported. */
 242         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 243         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 244                 return 0;
 245
 246                 /* Texturing. */
 247         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 248         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 249                 return VC4_MAX_MIP_LEVELS;
 250         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 251                 /* Note: Not supported in hardware, just faking it. */
 252                 return 5;
 253         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 254                 return 0;
 255
 256                 /* Render targets. */
 257         case PIPE_CAP_MAX_RENDER_TARGETS:
 258                 return 1;
 259
 260                 /* Queries. */
 261         case PIPE_CAP_QUERY_TIME_ELAPSED:
 262         case PIPE_CAP_QUERY_TIMESTAMP:
 263                 return 0;
 264
 265         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 266         case PIPE_CAP_MIN_TEXEL_OFFSET:
 267                 return 0;
 268
 269         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 270                 return 2048;
 271
 272         case PIPE_CAP_ENDIANNESS:
 273                 return PIPE_ENDIAN_LITTLE;
 274
 275         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 276                 return 64;
 277
 278         case PIPE_CAP_VENDOR_ID:
 279                 return 0x14E4;
 280         case PIPE_CAP_DEVICE_ID:
 281                 return 0xFFFFFFFF;
 282         case PIPE_CAP_ACCELERATED:
 283                 return 1;
 284         case PIPE_CAP_VIDEO_MEMORY: {
 285                 uint64_t system_memory;
 286
 287                 if (!os_get_total_physical_memory(&system_memory))
 288                         return 0;
 289
 290                 return (int)(system_memory >> 20);
 291         }
 292         case PIPE_CAP_UMA:
 293                 return 1;
 294
 295         default:
 296                 fprintf(stderr, "unknown param %d\n", param);
 297                 return 0;
 298         }
 299 }
 300
 301 static float
 302 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 303 {
 304         switch (param) {
 305         case PIPE_CAPF_MAX_LINE_WIDTH:
 306         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 307                 return 32;
 308
 309         case PIPE_CAPF_MAX_POINT_WIDTH:
 310         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 311                 return 512.0f;
 312
 313         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 314                 return 0.0f;
 315         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 316                 return 0.0f;
 317         case PIPE_CAPF_GUARD_BAND_LEFT:
 318         case PIPE_CAPF_GUARD_BAND_TOP:
 319         case PIPE_CAPF_GUARD_BAND_RIGHT:
 320         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 321                 return 0.0f;
 322         default:
 323                 fprintf(stderr, "unknown paramf %d\n", param);
 324                 return 0;
 325         }
 326 }
 327
 328 static int
 329 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 330                            enum pipe_shader_cap param)
 331 {
 332         if (shader != PIPE_SHADER_VERTEX &&
 333             shader != PIPE_SHADER_FRAGMENT) {
 334                 return 0;
 335         }
 336
 337         /* this is probably not totally correct.. but it's a start: */
 338         switch (param) {
 339         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 340         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 341         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 342         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 343                 return 16384;
 344
 345         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 346                 return vc4_screen(pscreen)->has_control_flow;
 347
 348         case PIPE_SHADER_CAP_MAX_INPUTS:
 349                 if (shader == PIPE_SHADER_FRAGMENT)
 350                         return 8;
 351                 else
 352                         return 16;
 353         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 354                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 355         case PIPE_SHADER_CAP_MAX_TEMPS:
 356                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 357         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 358                 return 16 * 1024 * sizeof(float);
 359         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 360                 return 1;
 361         case PIPE_SHADER_CAP_MAX_PREDS:
 362                 return 0; /* nothing uses this */
 363         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 364                 return 0;
 365         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 366         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 367         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 368                 return 0;
 369         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 370                 return 1;
 371         case PIPE_SHADER_CAP_SUBROUTINES:
 372                 return 0;
 373         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 374                 return 0;
 375         case PIPE_SHADER_CAP_INTEGERS:
 376                 return 1;
 377         case PIPE_SHADER_CAP_DOUBLES:
 378         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 379         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 380         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 381         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 382                 return 0;
 383         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 384         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 385                 return VC4_MAX_TEXTURE_SAMPLERS;
 386         case PIPE_SHADER_CAP_PREFERRED_IR:
 387                 return PIPE_SHADER_IR_TGSI;
 388         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 389                 return 0;
 390         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 391                 return 32;
 392         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 393         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 394                 return 0;
 395         default:
 396                 fprintf(stderr, "unknown shader param %d\n", param);
 397                 return 0;
 398         }
 399         return 0;
 400 }
 401
 402 static boolean
 403 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
 404                                enum pipe_format format,
 405                                enum pipe_texture_target target,
 406                                unsigned sample_count,
 407                                unsigned usage)
 408 {
 409         unsigned retval = 0;
 410
 411         if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
 412                 return FALSE;
 413
 414         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 415             !util_format_is_supported(format, usage)) {
 416                 return FALSE;
 417         }
 418
 419         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 420                 switch (format) {
 421                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 422                 case PIPE_FORMAT_R32G32B32_FLOAT:
 423                 case PIPE_FORMAT_R32G32_FLOAT:
 424                 case PIPE_FORMAT_R32_FLOAT:
 425                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 426                 case PIPE_FORMAT_R32G32B32_SNORM:
 427                 case PIPE_FORMAT_R32G32_SNORM:
 428                 case PIPE_FORMAT_R32_SNORM:
 429                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 430                 case PIPE_FORMAT_R32G32B32_SSCALED:
 431                 case PIPE_FORMAT_R32G32_SSCALED:
 432                 case PIPE_FORMAT_R32_SSCALED:
 433                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 434                 case PIPE_FORMAT_R16G16B16_UNORM:
 435                 case PIPE_FORMAT_R16G16_UNORM:
 436                 case PIPE_FORMAT_R16_UNORM:
 437                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 438                 case PIPE_FORMAT_R16G16B16_SNORM:
 439                 case PIPE_FORMAT_R16G16_SNORM:
 440                 case PIPE_FORMAT_R16_SNORM:
 441                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 442                 case PIPE_FORMAT_R16G16B16_USCALED:
 443                 case PIPE_FORMAT_R16G16_USCALED:
 444                 case PIPE_FORMAT_R16_USCALED:
 445                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 446                 case PIPE_FORMAT_R16G16B16_SSCALED:
 447                 case PIPE_FORMAT_R16G16_SSCALED:
 448                 case PIPE_FORMAT_R16_SSCALED:
 449                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 450                 case PIPE_FORMAT_R8G8B8_UNORM:
 451                 case PIPE_FORMAT_R8G8_UNORM:
 452                 case PIPE_FORMAT_R8_UNORM:
 453                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 454                 case PIPE_FORMAT_R8G8B8_SNORM:
 455                 case PIPE_FORMAT_R8G8_SNORM:
 456                 case PIPE_FORMAT_R8_SNORM:
 457                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 458                 case PIPE_FORMAT_R8G8B8_USCALED:
 459                 case PIPE_FORMAT_R8G8_USCALED:
 460                 case PIPE_FORMAT_R8_USCALED:
 461                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 462                 case PIPE_FORMAT_R8G8B8_SSCALED:
 463                 case PIPE_FORMAT_R8G8_SSCALED:
 464                 case PIPE_FORMAT_R8_SSCALED:
 465                         retval |= PIPE_BIND_VERTEX_BUFFER;
 466                         break;
 467                 default:
 468                         break;
 469                 }
 470         }
 471
 472         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 473             vc4_rt_format_supported(format)) {
 474                 retval |= PIPE_BIND_RENDER_TARGET;
 475         }
 476
 477         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 478             vc4_tex_format_supported(format)) {
 479                 retval |= PIPE_BIND_SAMPLER_VIEW;
 480         }
 481
 482         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 483             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 484              format == PIPE_FORMAT_X8Z24_UNORM)) {
 485                 retval |= PIPE_BIND_DEPTH_STENCIL;
 486         }
 487
 488         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 489             (format == PIPE_FORMAT_I8_UINT ||
 490              format == PIPE_FORMAT_I16_UINT)) {
 491                 retval |= PIPE_BIND_INDEX_BUFFER;
 492         }
 493
 494         if (usage & PIPE_BIND_TRANSFER_READ)
 495                 retval |= PIPE_BIND_TRANSFER_READ;
 496         if (usage & PIPE_BIND_TRANSFER_WRITE)
 497                 retval |= PIPE_BIND_TRANSFER_WRITE;
 498
 499 #if 0
 500         if (retval != usage) {
 501                 fprintf(stderr,
 502                         "not supported: format=%s, target=%d, sample_count=%d, "
 503                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
 504                         target, sample_count, usage, retval);
 505         }
 506 #endif
 507
 508         return retval == usage;
 509 }
 510
 511 static bool
 512 vc4_supports_branches(struct vc4_screen *screen)
 513 {
 514 #if USE_VC4_SIMULATOR
 515         return true;
 516 #endif
 517
 518         struct drm_vc4_get_param p = {
 519                 .param = DRM_VC4_PARAM_SUPPORTS_BRANCHES,
 520         };
 521         int ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &p);
 522
 523         if (ret != 0)
 524                 return false;
 525
 526         return p.value;
 527 }
 528
 529 static bool
 530 vc4_get_chip_info(struct vc4_screen *screen)
 531 {
 532 #if USE_VC4_SIMULATOR
 533         screen->v3d_ver = 21;
 534         return true;
 535 #endif
 536
 537         struct drm_vc4_get_param ident0 = {
 538                 .param = DRM_VC4_PARAM_V3D_IDENT0,
 539         };
 540         struct drm_vc4_get_param ident1 = {
 541                 .param = DRM_VC4_PARAM_V3D_IDENT1,
 542         };
 543         int ret;
 544
 545         ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident0);
 546         if (ret != 0) {
 547                 if (errno == EINVAL) {
 548                         /* Backwards compatibility with 2835 kernels which
 549                          * only do V3D 2.1.
 550                          */
 551                         screen->v3d_ver = 21;
 552                         return true;
 553                 } else {
 554                         fprintf(stderr, "Couldn't get V3D IDENT0: %s\n",
 555                                 strerror(errno));
 556                         return false;
 557                 }
 558         }
 559         ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident1);
 560         if (ret != 0) {
 561                 fprintf(stderr, "Couldn't get V3D IDENT1: %s\n",
 562                         strerror(errno));
 563                 return false;
 564         }
 565
 566         uint32_t major = (ident0.value >> 24) & 0xff;
 567         uint32_t minor = (ident1.value >> 0) & 0xf;
 568         screen->v3d_ver = major * 10 + minor;
 569
 570         if (screen->v3d_ver != 21) {
 571                 fprintf(stderr,
 572                         "V3D %d.%d not supported by this version of Mesa.\n",
 573                         screen->v3d_ver / 10,
 574                         screen->v3d_ver % 10);
 575                 return false;
 576         }
 577
 578         return true;
 579 }
 580
 581 struct pipe_screen *
 582 vc4_screen_create(int fd)
 583 {
 584         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
 585         struct pipe_screen *pscreen;
 586
 587         pscreen = &screen->base;
 588
 589         pscreen->destroy = vc4_screen_destroy;
 590         pscreen->get_param = vc4_screen_get_param;
 591         pscreen->get_paramf = vc4_screen_get_paramf;
 592         pscreen->get_shader_param = vc4_screen_get_shader_param;
 593         pscreen->context_create = vc4_context_create;
 594         pscreen->is_format_supported = vc4_screen_is_format_supported;
 595
 596         screen->fd = fd;
 597         list_inithead(&screen->bo_cache.time_list);
 598
 599         if (vc4_supports_branches(screen))
 600                 screen->has_control_flow = true;
 601
 602         if (!vc4_get_chip_info(screen))
 603                 goto fail;
 604
 605         vc4_fence_init(screen);
 606
 607         vc4_debug = debug_get_option_vc4_debug();
 608         if (vc4_debug & VC4_DEBUG_SHADERDB)
 609                 vc4_debug |= VC4_DEBUG_NORAST;
 610
 611 #if USE_VC4_SIMULATOR
 612         vc4_simulator_init(screen);
 613 #endif
 614
 615         vc4_resource_screen_init(pscreen);
 616
 617         pscreen->get_name = vc4_screen_get_name;
 618         pscreen->get_vendor = vc4_screen_get_vendor;
 619         pscreen->get_device_vendor = vc4_screen_get_vendor;
 620
 621         return pscreen;
 622
 623 fail:
 624         close(fd);
 625         ralloc_free(pscreen);
 626         return NULL;
 627 }
 628
 629 boolean
 630 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
 631                          struct vc4_bo *bo,
 632                          unsigned stride,
 633                          struct winsys_handle *whandle)
 634 {
 635         whandle->stride = stride;
 636
 637         /* If we're passing some reference to our BO out to some other part of
 638          * the system, then we can't do any optimizations about only us being
 639          * the ones seeing it (like BO caching or shadow update avoidance).
 640          */
 641         bo->private = false;
 642
 643         switch (whandle->type) {
 644         case DRM_API_HANDLE_TYPE_SHARED:
 645                 return vc4_bo_flink(bo, &whandle->handle);
 646         case DRM_API_HANDLE_TYPE_KMS:
 647                 whandle->handle = bo->handle;
 648                 return TRUE;
 649         case DRM_API_HANDLE_TYPE_FD:
 650                 whandle->handle = vc4_bo_get_dmabuf(bo);
 651                 return whandle->handle != -1;
 652         }
 653
 654         return FALSE;
 655 }
 656
 657 struct vc4_bo *
 658 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
 659                           struct winsys_handle *whandle)
 660 {
 661         struct vc4_screen *screen = vc4_screen(pscreen);
 662
 663         if (whandle->offset != 0) {
 664                 fprintf(stderr,
 665                         "Attempt to import unsupported winsys offset %u\n",
 666                         whandle->offset);
 667                 return NULL;
 668         }
 669
 670         switch (whandle->type) {
 671         case DRM_API_HANDLE_TYPE_SHARED:
 672                 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
 673         case DRM_API_HANDLE_TYPE_FD:
 674                 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
 675         default:
 676                 fprintf(stderr,
 677                         "Attempt to import unsupported handle type %d\n",
 678                         whandle->type);
 679                 return NULL;
 680         }
 681 }