vc4: Convert to consuming NIR.
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40 { "cl", VC4_DEBUG_CL,
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "nir", VC4_DEBUG_NIR,
47 "Dump NIR during program compile" },
48 { "tgsi", VC4_DEBUG_TGSI,
49 "Dump TGSI during program compile" },
50 { "shaderdb", VC4_DEBUG_SHADERDB,
51 "Dump program compile information for shader-db analysis" },
52 { "perf", VC4_DEBUG_PERF,
53 "Print during performance-related events" },
54 { "norast", VC4_DEBUG_NORAST,
55 "Skip actual hardware execution of commands" },
56 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57 "Flush after each draw call" },
58 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59 "Wait for finish after each flush" },
60 { NULL }
61 };
62
63 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
64 uint32_t vc4_debug;
65
66 static const char *
67 vc4_screen_get_name(struct pipe_screen *pscreen)
68 {
69 return "VC4";
70 }
71
72 static const char *
73 vc4_screen_get_vendor(struct pipe_screen *pscreen)
74 {
75 return "Broadcom";
76 }
77
78 static void
79 vc4_screen_destroy(struct pipe_screen *pscreen)
80 {
81 vc4_bufmgr_destroy(pscreen);
82 ralloc_free(pscreen);
83 }
84
85 static int
86 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
87 {
88 switch (param) {
89 /* Supported features (boolean caps). */
90 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
91 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
92 case PIPE_CAP_NPOT_TEXTURES:
93 case PIPE_CAP_USER_CONSTANT_BUFFERS:
94 case PIPE_CAP_TEXTURE_SHADOW_MAP:
95 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
96 case PIPE_CAP_TWO_SIDED_STENCIL:
97 return 1;
98
99 /* lying for GL 2.0 */
100 case PIPE_CAP_OCCLUSION_QUERY:
101 case PIPE_CAP_POINT_SPRITE:
102 return 1;
103
104 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
105 return 256;
106
107 case PIPE_CAP_GLSL_FEATURE_LEVEL:
108 return 120;
109
110 case PIPE_CAP_MAX_VIEWPORTS:
111 return 1;
112
113 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
114 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
115 return 1;
116
117 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
118 return 1;
119
120 /* Unsupported features. */
121 case PIPE_CAP_ANISOTROPIC_FILTER:
122 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
123 case PIPE_CAP_CUBE_MAP_ARRAY:
124 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
125 case PIPE_CAP_TEXTURE_SWIZZLE:
126 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
127 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
128 case PIPE_CAP_SEAMLESS_CUBE_MAP:
129 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
130 case PIPE_CAP_TGSI_INSTANCEID:
131 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
132 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
133 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
134 case PIPE_CAP_COMPUTE:
135 case PIPE_CAP_START_INSTANCE:
136 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
137 case PIPE_CAP_SHADER_STENCIL_EXPORT:
138 case PIPE_CAP_TGSI_TEXCOORD:
139 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
140 case PIPE_CAP_CONDITIONAL_RENDER:
141 case PIPE_CAP_PRIMITIVE_RESTART:
142 case PIPE_CAP_TEXTURE_MULTISAMPLE:
143 case PIPE_CAP_TEXTURE_BARRIER:
144 case PIPE_CAP_SM3:
145 case PIPE_CAP_INDEP_BLEND_ENABLE:
146 case PIPE_CAP_INDEP_BLEND_FUNC:
147 case PIPE_CAP_DEPTH_CLIP_DISABLE:
148 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
149 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
150 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
151 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
152 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
153 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
154 case PIPE_CAP_USER_VERTEX_BUFFERS:
155 case PIPE_CAP_USER_INDEX_BUFFERS:
156 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
157 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
158 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
160 case PIPE_CAP_TEXTURE_GATHER_SM5:
161 case PIPE_CAP_FAKE_SW_MSAA:
162 case PIPE_CAP_TEXTURE_QUERY_LOD:
163 case PIPE_CAP_SAMPLE_SHADING:
164 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
165 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
166 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
167 case PIPE_CAP_MAX_TEXEL_OFFSET:
168 case PIPE_CAP_MAX_VERTEX_STREAMS:
169 case PIPE_CAP_DRAW_INDIRECT:
170 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
171 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
172 case PIPE_CAP_SAMPLER_VIEW_TARGET:
173 case PIPE_CAP_CLIP_HALFZ:
174 case PIPE_CAP_VERTEXID_NOBASE:
175 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
176 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
177 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
178 return 0;
179
180 /* Stream output. */
181 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
182 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
183 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
184 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
185 return 0;
186
187 /* Geometry shader output, unsupported. */
188 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
189 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
190 return 0;
191
192 /* Texturing. */
193 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
194 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
195 return VC4_MAX_MIP_LEVELS;
196 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
197 /* Note: Not supported in hardware, just faking it. */
198 return 5;
199 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
200 return 0;
201
202 /* Render targets. */
203 case PIPE_CAP_MAX_RENDER_TARGETS:
204 return 1;
205
206 /* Queries. */
207 case PIPE_CAP_QUERY_TIME_ELAPSED:
208 case PIPE_CAP_QUERY_TIMESTAMP:
209 return 0;
210
211 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
212 case PIPE_CAP_MIN_TEXEL_OFFSET:
213 return 0;
214
215 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
216 return 2048;
217
218 case PIPE_CAP_ENDIANNESS:
219 return PIPE_ENDIAN_LITTLE;
220
221 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
222 return 64;
223
224 case PIPE_CAP_VENDOR_ID:
225 return 0x14E4;
226 case PIPE_CAP_DEVICE_ID:
227 return 0xFFFFFFFF;
228 case PIPE_CAP_ACCELERATED:
229 return 1;
230 case PIPE_CAP_VIDEO_MEMORY: {
231 uint64_t system_memory;
232
233 if (!os_get_total_physical_memory(&system_memory))
234 return 0;
235
236 return (int)(system_memory >> 20);
237 }
238 case PIPE_CAP_UMA:
239 return 1;
240
241 default:
242 fprintf(stderr, "unknown param %d\n", param);
243 return 0;
244 }
245 }
246
247 static float
248 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
249 {
250 switch (param) {
251 case PIPE_CAPF_MAX_LINE_WIDTH:
252 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
253 return 32;
254
255 case PIPE_CAPF_MAX_POINT_WIDTH:
256 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
257 return 512.0f;
258
259 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
260 return 0.0f;
261 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
262 return 0.0f;
263 case PIPE_CAPF_GUARD_BAND_LEFT:
264 case PIPE_CAPF_GUARD_BAND_TOP:
265 case PIPE_CAPF_GUARD_BAND_RIGHT:
266 case PIPE_CAPF_GUARD_BAND_BOTTOM:
267 return 0.0f;
268 default:
269 fprintf(stderr, "unknown paramf %d\n", param);
270 return 0;
271 }
272 }
273
274 static int
275 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
276 enum pipe_shader_cap param)
277 {
278 if (shader != PIPE_SHADER_VERTEX &&
279 shader != PIPE_SHADER_FRAGMENT) {
280 return 0;
281 }
282
283 /* this is probably not totally correct.. but it's a start: */
284 switch (param) {
285 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
286 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
287 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
288 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
289 return 16384;
290 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
291 return 0;
292 case PIPE_SHADER_CAP_MAX_INPUTS:
293 if (shader == PIPE_SHADER_FRAGMENT)
294 return 8;
295 else
296 return 16;
297 case PIPE_SHADER_CAP_MAX_OUTPUTS:
298 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
299 case PIPE_SHADER_CAP_MAX_TEMPS:
300 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
301 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
302 return 16 * 1024 * sizeof(float);
303 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
304 return 1;
305 case PIPE_SHADER_CAP_MAX_PREDS:
306 return 0; /* nothing uses this */
307 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
308 return 0;
309 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
310 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
311 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
312 return 0;
313 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
314 return 1;
315 case PIPE_SHADER_CAP_SUBROUTINES:
316 return 0;
317 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
318 return 0;
319 case PIPE_SHADER_CAP_INTEGERS:
320 return 1;
321 case PIPE_SHADER_CAP_DOUBLES:
322 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
323 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
324 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
325 return 0;
326 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
327 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
328 return VC4_MAX_TEXTURE_SAMPLERS;
329 case PIPE_SHADER_CAP_PREFERRED_IR:
330 return PIPE_SHADER_IR_TGSI;
331 default:
332 fprintf(stderr, "unknown shader param %d\n", param);
333 return 0;
334 }
335 return 0;
336 }
337
338 static boolean
339 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
340 enum pipe_format format,
341 enum pipe_texture_target target,
342 unsigned sample_count,
343 unsigned usage)
344 {
345 unsigned retval = 0;
346
347 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
348 (sample_count > 1) ||
349 !util_format_is_supported(format, usage)) {
350 return FALSE;
351 }
352
353 if (usage & PIPE_BIND_VERTEX_BUFFER) {
354 switch (format) {
355 case PIPE_FORMAT_R32G32B32A32_FLOAT:
356 case PIPE_FORMAT_R32G32B32_FLOAT:
357 case PIPE_FORMAT_R32G32_FLOAT:
358 case PIPE_FORMAT_R32_FLOAT:
359 case PIPE_FORMAT_R32G32B32A32_SNORM:
360 case PIPE_FORMAT_R32G32B32_SNORM:
361 case PIPE_FORMAT_R32G32_SNORM:
362 case PIPE_FORMAT_R32_SNORM:
363 case PIPE_FORMAT_R32G32B32A32_SSCALED:
364 case PIPE_FORMAT_R32G32B32_SSCALED:
365 case PIPE_FORMAT_R32G32_SSCALED:
366 case PIPE_FORMAT_R32_SSCALED:
367 case PIPE_FORMAT_R16G16B16A16_UNORM:
368 case PIPE_FORMAT_R16G16B16_UNORM:
369 case PIPE_FORMAT_R16G16_UNORM:
370 case PIPE_FORMAT_R16_UNORM:
371 case PIPE_FORMAT_R16G16B16A16_SNORM:
372 case PIPE_FORMAT_R16G16B16_SNORM:
373 case PIPE_FORMAT_R16G16_SNORM:
374 case PIPE_FORMAT_R16_SNORM:
375 case PIPE_FORMAT_R16G16B16A16_USCALED:
376 case PIPE_FORMAT_R16G16B16_USCALED:
377 case PIPE_FORMAT_R16G16_USCALED:
378 case PIPE_FORMAT_R16_USCALED:
379 case PIPE_FORMAT_R16G16B16A16_SSCALED:
380 case PIPE_FORMAT_R16G16B16_SSCALED:
381 case PIPE_FORMAT_R16G16_SSCALED:
382 case PIPE_FORMAT_R16_SSCALED:
383 case PIPE_FORMAT_R8G8B8A8_UNORM:
384 case PIPE_FORMAT_R8G8B8_UNORM:
385 case PIPE_FORMAT_R8G8_UNORM:
386 case PIPE_FORMAT_R8_UNORM:
387 case PIPE_FORMAT_R8G8B8A8_SNORM:
388 case PIPE_FORMAT_R8G8B8_SNORM:
389 case PIPE_FORMAT_R8G8_SNORM:
390 case PIPE_FORMAT_R8_SNORM:
391 case PIPE_FORMAT_R8G8B8A8_USCALED:
392 case PIPE_FORMAT_R8G8B8_USCALED:
393 case PIPE_FORMAT_R8G8_USCALED:
394 case PIPE_FORMAT_R8_USCALED:
395 case PIPE_FORMAT_R8G8B8A8_SSCALED:
396 case PIPE_FORMAT_R8G8B8_SSCALED:
397 case PIPE_FORMAT_R8G8_SSCALED:
398 case PIPE_FORMAT_R8_SSCALED:
399 retval |= PIPE_BIND_VERTEX_BUFFER;
400 break;
401 default:
402 break;
403 }
404 }
405
406 if ((usage & PIPE_BIND_RENDER_TARGET) &&
407 vc4_rt_format_supported(format)) {
408 retval |= PIPE_BIND_RENDER_TARGET;
409 }
410
411 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
412 (vc4_tex_format_supported(format))) {
413 retval |= PIPE_BIND_SAMPLER_VIEW;
414 }
415
416 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
417 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
418 format == PIPE_FORMAT_X8Z24_UNORM)) {
419 retval |= PIPE_BIND_DEPTH_STENCIL;
420 }
421
422 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
423 (format == PIPE_FORMAT_I8_UINT ||
424 format == PIPE_FORMAT_I16_UINT)) {
425 retval |= PIPE_BIND_INDEX_BUFFER;
426 }
427
428 if (usage & PIPE_BIND_TRANSFER_READ)
429 retval |= PIPE_BIND_TRANSFER_READ;
430 if (usage & PIPE_BIND_TRANSFER_WRITE)
431 retval |= PIPE_BIND_TRANSFER_WRITE;
432
433 #if 0
434 if (retval != usage) {
435 fprintf(stderr,
436 "not supported: format=%s, target=%d, sample_count=%d, "
437 "usage=0x%x, retval=0x%x\n", util_format_name(format),
438 target, sample_count, usage, retval);
439 }
440 #endif
441
442 return retval == usage;
443 }
444
445 struct pipe_screen *
446 vc4_screen_create(int fd)
447 {
448 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
449 struct pipe_screen *pscreen;
450
451 pscreen = &screen->base;
452
453 pscreen->destroy = vc4_screen_destroy;
454 pscreen->get_param = vc4_screen_get_param;
455 pscreen->get_paramf = vc4_screen_get_paramf;
456 pscreen->get_shader_param = vc4_screen_get_shader_param;
457 pscreen->context_create = vc4_context_create;
458 pscreen->is_format_supported = vc4_screen_is_format_supported;
459
460 screen->fd = fd;
461 make_empty_list(&screen->bo_cache.time_list);
462
463 vc4_fence_init(screen);
464
465 vc4_debug = debug_get_option_vc4_debug();
466 if (vc4_debug & VC4_DEBUG_SHADERDB)
467 vc4_debug |= VC4_DEBUG_NORAST;
468
469 #if USE_VC4_SIMULATOR
470 vc4_simulator_init(screen);
471 #endif
472
473 vc4_resource_screen_init(pscreen);
474
475 pscreen->get_name = vc4_screen_get_name;
476 pscreen->get_vendor = vc4_screen_get_vendor;
477 pscreen->get_device_vendor = vc4_screen_get_vendor;
478
479 return pscreen;
480 }
481
482 boolean
483 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
484 struct vc4_bo *bo,
485 unsigned stride,
486 struct winsys_handle *whandle)
487 {
488 whandle->stride = stride;
489
490 switch (whandle->type) {
491 case DRM_API_HANDLE_TYPE_SHARED:
492 return vc4_bo_flink(bo, &whandle->handle);
493 case DRM_API_HANDLE_TYPE_KMS:
494 whandle->handle = bo->handle;
495 return TRUE;
496 case DRM_API_HANDLE_TYPE_FD:
497 whandle->handle = vc4_bo_get_dmabuf(bo);
498 return whandle->handle != -1;
499 }
500
501 return FALSE;
502 }
503
504 struct vc4_bo *
505 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
506 struct winsys_handle *whandle)
507 {
508 struct vc4_screen *screen = vc4_screen(pscreen);
509
510 switch (whandle->type) {
511 case DRM_API_HANDLE_TYPE_SHARED:
512 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
513 case DRM_API_HANDLE_TYPE_FD:
514 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
515 default:
516 fprintf(stderr,
517 "Attempt to import unsupported handle type %d\n",
518 whandle->type);
519 return NULL;
520 }
521 }