vc4: Add support for ARL and indirect register access on TGSI_FILE_CONSTANT.
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33
34 #include "vc4_screen.h"
35 #include "vc4_context.h"
36 #include "vc4_resource.h"
37
38 static const struct debug_named_value debug_options[] = {
39 { "cl", VC4_DEBUG_CL,
40 "Dump command list during creation" },
41 { "qpu", VC4_DEBUG_QPU,
42 "Dump generated QPU instructions" },
43 { "qir", VC4_DEBUG_QIR,
44 "Dump QPU IR during program compile" },
45 { "tgsi", VC4_DEBUG_TGSI,
46 "Dump TGSI during program compile" },
47 { "shaderdb", VC4_DEBUG_SHADERDB,
48 "Dump program compile information for shader-db analysis" },
49 { "perf", VC4_DEBUG_PERF,
50 "Print during performance-related events" },
51 { "norast", VC4_DEBUG_NORAST,
52 "Skip actual hardware execution of commands" },
53 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
54 "Flush after each draw call" },
55 { NULL }
56 };
57
58 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
59 uint32_t vc4_debug;
60
61 static const char *
62 vc4_screen_get_name(struct pipe_screen *pscreen)
63 {
64 return "VC4";
65 }
66
67 static const char *
68 vc4_screen_get_vendor(struct pipe_screen *pscreen)
69 {
70 return "Broadcom";
71 }
72
73 static void
74 vc4_screen_destroy(struct pipe_screen *pscreen)
75 {
76 free(pscreen);
77 }
78
79 static int
80 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
81 {
82 switch (param) {
83 /* Supported features (boolean caps). */
84 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
85 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
86 case PIPE_CAP_NPOT_TEXTURES:
87 case PIPE_CAP_USER_CONSTANT_BUFFERS:
88 case PIPE_CAP_TEXTURE_SHADOW_MAP:
89 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
90 case PIPE_CAP_TWO_SIDED_STENCIL:
91 return 1;
92
93 /* lying for GL 2.0 */
94 case PIPE_CAP_OCCLUSION_QUERY:
95 case PIPE_CAP_POINT_SPRITE:
96 return 1;
97
98 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
99 return 256;
100
101 case PIPE_CAP_GLSL_FEATURE_LEVEL:
102 return 120;
103
104 case PIPE_CAP_MAX_VIEWPORTS:
105 return 1;
106
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
109 return 1;
110
111 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
112 return 1;
113
114 /* Unsupported features. */
115 case PIPE_CAP_ANISOTROPIC_FILTER:
116 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
117 case PIPE_CAP_CUBE_MAP_ARRAY:
118 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
119 case PIPE_CAP_TEXTURE_SWIZZLE:
120 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
121 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
122 case PIPE_CAP_SEAMLESS_CUBE_MAP:
123 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
124 case PIPE_CAP_TGSI_INSTANCEID:
125 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
126 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
127 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
128 case PIPE_CAP_COMPUTE:
129 case PIPE_CAP_START_INSTANCE:
130 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
131 case PIPE_CAP_SHADER_STENCIL_EXPORT:
132 case PIPE_CAP_TGSI_TEXCOORD:
133 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
134 case PIPE_CAP_CONDITIONAL_RENDER:
135 case PIPE_CAP_PRIMITIVE_RESTART:
136 case PIPE_CAP_TEXTURE_MULTISAMPLE:
137 case PIPE_CAP_TEXTURE_BARRIER:
138 case PIPE_CAP_SM3:
139 case PIPE_CAP_INDEP_BLEND_ENABLE:
140 case PIPE_CAP_INDEP_BLEND_FUNC:
141 case PIPE_CAP_DEPTH_CLIP_DISABLE:
142 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
143 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
144 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
145 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
146 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
147 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
148 case PIPE_CAP_USER_VERTEX_BUFFERS:
149 case PIPE_CAP_USER_INDEX_BUFFERS:
150 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
151 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
152 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
153 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
154 case PIPE_CAP_TEXTURE_GATHER_SM5:
155 case PIPE_CAP_FAKE_SW_MSAA:
156 case PIPE_CAP_TEXTURE_QUERY_LOD:
157 case PIPE_CAP_SAMPLE_SHADING:
158 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
161 case PIPE_CAP_MAX_TEXEL_OFFSET:
162 case PIPE_CAP_MAX_VERTEX_STREAMS:
163 case PIPE_CAP_DRAW_INDIRECT:
164 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
165 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
166 case PIPE_CAP_SAMPLER_VIEW_TARGET:
167 case PIPE_CAP_CLIP_HALFZ:
168 return 0;
169
170 /* Stream output. */
171 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
172 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
173 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
174 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
175 return 0;
176
177 /* Geometry shader output, unsupported. */
178 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
179 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
180 return 0;
181
182 /* Texturing. */
183 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
184 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
185 return VC4_MAX_MIP_LEVELS;
186 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
187 /* Note: Not supported in hardware, just faking it. */
188 return 5;
189 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
190 return 0;
191
192 /* Render targets. */
193 case PIPE_CAP_MAX_RENDER_TARGETS:
194 return 1;
195
196 /* Queries. */
197 case PIPE_CAP_QUERY_TIME_ELAPSED:
198 case PIPE_CAP_QUERY_TIMESTAMP:
199 return 0;
200
201 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
202 case PIPE_CAP_MIN_TEXEL_OFFSET:
203 return 0;
204
205 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
206 return 2048;
207
208 case PIPE_CAP_ENDIANNESS:
209 return PIPE_ENDIAN_LITTLE;
210
211 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
212 return 64;
213
214 case PIPE_CAP_VENDOR_ID:
215 return 0x14E4;
216 case PIPE_CAP_DEVICE_ID:
217 return 0xFFFFFFFF;
218 case PIPE_CAP_ACCELERATED:
219 return 1;
220 case PIPE_CAP_VIDEO_MEMORY: {
221 uint64_t system_memory;
222
223 if (!os_get_total_physical_memory(&system_memory))
224 return 0;
225
226 return (int)(system_memory >> 20);
227 }
228 case PIPE_CAP_UMA:
229 return 1;
230
231 default:
232 fprintf(stderr, "unknown param %d\n", param);
233 return 0;
234 }
235 }
236
237 static float
238 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
239 {
240 switch (param) {
241 case PIPE_CAPF_MAX_LINE_WIDTH:
242 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
243 return 32;
244
245 case PIPE_CAPF_MAX_POINT_WIDTH:
246 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
247 return 512.0f;
248
249 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
250 return 0.0f;
251 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
252 return 0.0f;
253 case PIPE_CAPF_GUARD_BAND_LEFT:
254 case PIPE_CAPF_GUARD_BAND_TOP:
255 case PIPE_CAPF_GUARD_BAND_RIGHT:
256 case PIPE_CAPF_GUARD_BAND_BOTTOM:
257 return 0.0f;
258 default:
259 fprintf(stderr, "unknown paramf %d\n", param);
260 return 0;
261 }
262 }
263
264 static int
265 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
266 enum pipe_shader_cap param)
267 {
268 if (shader != PIPE_SHADER_VERTEX &&
269 shader != PIPE_SHADER_FRAGMENT) {
270 return 0;
271 }
272
273 /* this is probably not totally correct.. but it's a start: */
274 switch (param) {
275 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
276 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
277 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
278 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
279 return 16384;
280 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
281 return 0;
282 case PIPE_SHADER_CAP_MAX_INPUTS:
283 if (shader == PIPE_SHADER_FRAGMENT)
284 return 8;
285 else
286 return 16;
287 case PIPE_SHADER_CAP_MAX_OUTPUTS:
288 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
289 case PIPE_SHADER_CAP_MAX_TEMPS:
290 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
291 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
292 return 16 * 1024 * sizeof(float);
293 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
294 return 1;
295 case PIPE_SHADER_CAP_MAX_PREDS:
296 return 0; /* nothing uses this */
297 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
298 return 0;
299 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
300 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
301 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
302 return 0;
303 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
304 return 1;
305 case PIPE_SHADER_CAP_SUBROUTINES:
306 return 0;
307 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
308 return 0;
309 case PIPE_SHADER_CAP_INTEGERS:
310 return 1;
311 case PIPE_SHADER_CAP_DOUBLES:
312 return 0;
313 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
314 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
315 return VC4_MAX_TEXTURE_SAMPLERS;
316 case PIPE_SHADER_CAP_PREFERRED_IR:
317 return PIPE_SHADER_IR_TGSI;
318 default:
319 fprintf(stderr, "unknown shader param %d\n", param);
320 return 0;
321 }
322 return 0;
323 }
324
325 static boolean
326 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
327 enum pipe_format format,
328 enum pipe_texture_target target,
329 unsigned sample_count,
330 unsigned usage)
331 {
332 unsigned retval = 0;
333
334 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
335 (sample_count > 1) ||
336 !util_format_is_supported(format, usage)) {
337 return FALSE;
338 }
339
340 if (usage & PIPE_BIND_VERTEX_BUFFER) {
341 switch (format) {
342 case PIPE_FORMAT_R32G32B32A32_FLOAT:
343 case PIPE_FORMAT_R32G32B32_FLOAT:
344 case PIPE_FORMAT_R32G32_FLOAT:
345 case PIPE_FORMAT_R32_FLOAT:
346 case PIPE_FORMAT_R8G8B8A8_UNORM:
347 case PIPE_FORMAT_R8G8B8_UNORM:
348 case PIPE_FORMAT_R8G8_UNORM:
349 case PIPE_FORMAT_R8_UNORM:
350 case PIPE_FORMAT_R8G8B8A8_SNORM:
351 case PIPE_FORMAT_R8G8B8_SNORM:
352 case PIPE_FORMAT_R8G8_SNORM:
353 case PIPE_FORMAT_R8_SNORM:
354 retval |= PIPE_BIND_VERTEX_BUFFER;
355 break;
356 default:
357 break;
358 }
359 }
360
361 if ((usage & PIPE_BIND_RENDER_TARGET) &&
362 vc4_rt_format_supported(format)) {
363 retval |= PIPE_BIND_RENDER_TARGET;
364 }
365
366 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
367 (vc4_tex_format_supported(format))) {
368 retval |= PIPE_BIND_SAMPLER_VIEW;
369 }
370
371 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
372 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
373 format == PIPE_FORMAT_X8Z24_UNORM)) {
374 retval |= PIPE_BIND_DEPTH_STENCIL;
375 }
376
377 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
378 (format == PIPE_FORMAT_I8_UINT ||
379 format == PIPE_FORMAT_I16_UINT)) {
380 retval |= PIPE_BIND_INDEX_BUFFER;
381 }
382
383 if (usage & PIPE_BIND_TRANSFER_READ)
384 retval |= PIPE_BIND_TRANSFER_READ;
385 if (usage & PIPE_BIND_TRANSFER_WRITE)
386 retval |= PIPE_BIND_TRANSFER_WRITE;
387
388 #if 0
389 if (retval != usage) {
390 fprintf(stderr,
391 "not supported: format=%s, target=%d, sample_count=%d, "
392 "usage=0x%x, retval=0x%x\n", util_format_name(format),
393 target, sample_count, usage, retval);
394 }
395 #endif
396
397 return retval == usage;
398 }
399
400 struct pipe_screen *
401 vc4_screen_create(int fd)
402 {
403 struct vc4_screen *screen = CALLOC_STRUCT(vc4_screen);
404 struct pipe_screen *pscreen;
405
406 pscreen = &screen->base;
407
408 pscreen->destroy = vc4_screen_destroy;
409 pscreen->get_param = vc4_screen_get_param;
410 pscreen->get_paramf = vc4_screen_get_paramf;
411 pscreen->get_shader_param = vc4_screen_get_shader_param;
412 pscreen->context_create = vc4_context_create;
413 pscreen->is_format_supported = vc4_screen_is_format_supported;
414
415 screen->fd = fd;
416
417 vc4_debug = debug_get_option_vc4_debug();
418 if (vc4_debug & VC4_DEBUG_SHADERDB)
419 vc4_debug |= VC4_DEBUG_NORAST;
420
421 #if USE_VC4_SIMULATOR
422 vc4_simulator_init(screen);
423 #endif
424
425 vc4_resource_screen_init(pscreen);
426
427 pscreen->get_name = vc4_screen_get_name;
428 pscreen->get_vendor = vc4_screen_get_vendor;
429
430 return pscreen;
431 }
432
433 boolean
434 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
435 struct vc4_bo *bo,
436 unsigned stride,
437 struct winsys_handle *whandle)
438 {
439 whandle->stride = stride;
440
441 switch (whandle->type) {
442 case DRM_API_HANDLE_TYPE_SHARED:
443 return vc4_bo_flink(bo, &whandle->handle);
444 case DRM_API_HANDLE_TYPE_KMS:
445 whandle->handle = bo->handle;
446 return TRUE;
447 }
448
449 return FALSE;
450 }
451
452 struct vc4_bo *
453 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
454 struct winsys_handle *whandle,
455 unsigned *out_stride)
456 {
457 struct vc4_screen *screen = vc4_screen(pscreen);
458 struct vc4_bo *bo;
459
460 if (whandle->type != DRM_API_HANDLE_TYPE_SHARED) {
461 fprintf(stderr,
462 "Attempt to import unsupported handle type %d\n",
463 whandle->type);
464 return NULL;
465 }
466
467 bo = vc4_bo_open_name(screen, whandle->handle, whandle->stride);
468 if (!bo) {
469 fprintf(stderr, "Open name %d failed\n", whandle->handle);
470 return NULL;
471 }
472
473 *out_stride = whandle->stride;
474
475 return bo;
476 }