src/gallium/drivers/vc5/vc5_screen.c

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_debug.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/u_hash_table.h"
  34 #include "util/ralloc.h"
  35
  36 #include <xf86drm.h>
  37 #include "vc5_drm.h"
  38 #include "vc5_screen.h"
  39 #include "vc5_context.h"
  40 #include "vc5_resource.h"
  41 #include "compiler/v3d_compiler.h"
  42
  43 static const char *
  44 vc5_screen_get_name(struct pipe_screen *pscreen)
  45 {
  46         struct vc5_screen *screen = vc5_screen(pscreen);
  47
  48         if (!screen->name) {
  49                 screen->name = ralloc_asprintf(screen,
  50                                                "VC5 V3D %d.%d",
  51                                                screen->devinfo.ver / 10,
  52                                                screen->devinfo.ver % 10);
  53         }
  54
  55         return screen->name;
  56 }
  57
  58 static const char *
  59 vc5_screen_get_vendor(struct pipe_screen *pscreen)
  60 {
  61         return "Broadcom";
  62 }
  63
  64 static void
  65 vc5_screen_destroy(struct pipe_screen *pscreen)
  66 {
  67         struct vc5_screen *screen = vc5_screen(pscreen);
  68
  69         util_hash_table_destroy(screen->bo_handles);
  70         vc5_bufmgr_destroy(pscreen);
  71         slab_destroy_parent(&screen->transfer_pool);
  72
  73         if (using_vc5_simulator)
  74                 vc5_simulator_destroy(screen);
  75
  76         v3d_compiler_free(screen->compiler);
  77
  78         close(screen->fd);
  79         ralloc_free(pscreen);
  80 }
  81
  82 static int
  83 vc5_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  84 {
  85         switch (param) {
  86                 /* Supported features (boolean caps). */
  87         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
  88         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
  89         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
  90         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_SHAREABLE_SHADERS:
  93         case PIPE_CAP_USER_CONSTANT_BUFFERS:
  94         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  95         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  96         case PIPE_CAP_TWO_SIDED_STENCIL:
  97         case PIPE_CAP_TEXTURE_MULTISAMPLE:
  98         case PIPE_CAP_TEXTURE_SWIZZLE:
  99         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 100         case PIPE_CAP_START_INSTANCE:
 101         case PIPE_CAP_TGSI_INSTANCEID:
 102         case PIPE_CAP_SM3:
 103         case PIPE_CAP_INDEP_BLEND_ENABLE: /* XXX */
 104         case PIPE_CAP_TEXTURE_QUERY_LOD:
 105         case PIPE_CAP_PRIMITIVE_RESTART:
 106         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 107         case PIPE_CAP_OCCLUSION_QUERY:
 108         case PIPE_CAP_POINT_SPRITE:
 109         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 110         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 111         case PIPE_CAP_COMPUTE:
 112         case PIPE_CAP_DRAW_INDIRECT:
 113         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 114         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 115                 return 1;
 116
 117         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 118                 return 256;
 119
 120         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 121                 return 4;
 122
 123         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 124                 return 400;
 125
 126         case PIPE_CAP_MAX_VIEWPORTS:
 127                 return 1;
 128
 129         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 130         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 131                 return 1;
 132         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 133         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 134                 return 0;
 135
 136         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 137         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 138                 return 1;
 139
 140
 141                 /* Stream output. */
 142         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 143                 return 4;
 144         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 145         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 146                 return 64;
 147
 148         case PIPE_CAP_MIN_TEXEL_OFFSET:
 149         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 150                 return -8;
 151         case PIPE_CAP_MAX_TEXEL_OFFSET:
 152         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 153                 return 7;
 154
 155                 /* Unsupported features. */
 156         case PIPE_CAP_ANISOTROPIC_FILTER:
 157         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 158         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 159         case PIPE_CAP_CUBE_MAP_ARRAY:
 160         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 161         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 162         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 163         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 164         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 165         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 166         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 167         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 168         case PIPE_CAP_TGSI_TEXCOORD:
 169         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 170         case PIPE_CAP_CONDITIONAL_RENDER:
 171         case PIPE_CAP_TEXTURE_BARRIER:
 172         case PIPE_CAP_INDEP_BLEND_FUNC:
 173         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 174         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 175         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 176         case PIPE_CAP_USER_VERTEX_BUFFERS:
 177         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 178         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 179         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 180         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 181         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 182         case PIPE_CAP_TEXTURE_GATHER_SM5:
 183         case PIPE_CAP_FAKE_SW_MSAA:
 184         case PIPE_CAP_SAMPLE_SHADING:
 185         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 186         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 187         case PIPE_CAP_MAX_VERTEX_STREAMS:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 189         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 190         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 191         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 192         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 193         case PIPE_CAP_CLIP_HALFZ:
 194         case PIPE_CAP_VERTEXID_NOBASE:
 195         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 196         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 197         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 198         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 199         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 200         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 201         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 202         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 203         case PIPE_CAP_TGSI_TXQS:
 204         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 205         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 206         case PIPE_CAP_CLEAR_TEXTURE:
 207         case PIPE_CAP_DRAW_PARAMETERS:
 208         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 209         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 210         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 211         case PIPE_CAP_INVALIDATE_BUFFER:
 212         case PIPE_CAP_GENERATE_MIPMAP:
 213         case PIPE_CAP_STRING_MARKER:
 214         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 215         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 216         case PIPE_CAP_QUERY_MEMORY_INFO:
 217         case PIPE_CAP_PCI_GROUP:
 218         case PIPE_CAP_PCI_BUS:
 219         case PIPE_CAP_PCI_DEVICE:
 220         case PIPE_CAP_PCI_FUNCTION:
 221         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 222         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 223         case PIPE_CAP_CULL_DISTANCE:
 224         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 225         case PIPE_CAP_TGSI_VOTE:
 226         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 227         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 228         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 229         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 230         case PIPE_CAP_TGSI_FS_FBFETCH:
 231         case PIPE_CAP_INT64:
 232         case PIPE_CAP_INT64_DIVMOD:
 233         case PIPE_CAP_DOUBLES:
 234         case PIPE_CAP_BINDLESS_TEXTURE:
 235         case PIPE_CAP_POST_DEPTH_COVERAGE:
 236         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 237         case PIPE_CAP_TGSI_BALLOT:
 238         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 239         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 240         case PIPE_CAP_TGSI_CLOCK:
 241         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 242         case PIPE_CAP_NATIVE_FENCE_FD:
 243         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 244         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 245         case PIPE_CAP_QUERY_SO_OVERFLOW:
 246         case PIPE_CAP_MEMOBJ:
 247         case PIPE_CAP_LOAD_CONSTBUF:
 248         case PIPE_CAP_TILE_RASTER_ORDER:
 249         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 250         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 251         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 252                 return 0;
 253
 254                 /* Geometry shader output, unsupported. */
 255         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 256         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 257                 return 0;
 258
 259                 /* Texturing. */
 260         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 261         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 262                 return VC5_MAX_MIP_LEVELS;
 263         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 264                 return 256;
 265         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 266                 return 2048;
 267
 268                 /* Render targets. */
 269         case PIPE_CAP_MAX_RENDER_TARGETS:
 270                 return 4;
 271
 272                 /* Queries. */
 273         case PIPE_CAP_QUERY_TIME_ELAPSED:
 274         case PIPE_CAP_QUERY_TIMESTAMP:
 275                 return 0;
 276
 277         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 278                 return 2048;
 279
 280         case PIPE_CAP_ENDIANNESS:
 281                 return PIPE_ENDIAN_LITTLE;
 282
 283         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 284                 return 64;
 285
 286         case PIPE_CAP_VENDOR_ID:
 287                 return 0x14E4;
 288         case PIPE_CAP_DEVICE_ID:
 289                 return 0xFFFFFFFF;
 290         case PIPE_CAP_ACCELERATED:
 291                 return 1;
 292         case PIPE_CAP_VIDEO_MEMORY: {
 293                 uint64_t system_memory;
 294
 295                 if (!os_get_total_physical_memory(&system_memory))
 296                         return 0;
 297
 298                 return (int)(system_memory >> 20);
 299         }
 300         case PIPE_CAP_UMA:
 301                 return 1;
 302
 303         default:
 304                 fprintf(stderr, "unknown param %d\n", param);
 305                 return 0;
 306         }
 307 }
 308
 309 static float
 310 vc5_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 311 {
 312         switch (param) {
 313         case PIPE_CAPF_MAX_LINE_WIDTH:
 314         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 315                 return 32;
 316
 317         case PIPE_CAPF_MAX_POINT_WIDTH:
 318         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 319                 return 512.0f;
 320
 321         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 322                 return 0.0f;
 323         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 324                 return 16.0f;
 325         case PIPE_CAPF_GUARD_BAND_LEFT:
 326         case PIPE_CAPF_GUARD_BAND_TOP:
 327         case PIPE_CAPF_GUARD_BAND_RIGHT:
 328         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 329                 return 0.0f;
 330         default:
 331                 fprintf(stderr, "unknown paramf %d\n", param);
 332                 return 0;
 333         }
 334 }
 335
 336 static int
 337 vc5_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 338                            enum pipe_shader_cap param)
 339 {
 340         if (shader != PIPE_SHADER_VERTEX &&
 341             shader != PIPE_SHADER_FRAGMENT) {
 342                 return 0;
 343         }
 344
 345         /* this is probably not totally correct.. but it's a start: */
 346         switch (param) {
 347         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 348         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 349         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 350         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 351                 return 16384;
 352
 353         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 354                 return UINT_MAX;
 355
 356         case PIPE_SHADER_CAP_MAX_INPUTS:
 357                 if (shader == PIPE_SHADER_FRAGMENT)
 358                         return VC5_MAX_FS_INPUTS / 4;
 359                 else
 360                         return 16;
 361         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 362                 if (shader == PIPE_SHADER_FRAGMENT)
 363                         return 4;
 364                 else
 365                         return VC5_MAX_FS_INPUTS / 4;
 366         case PIPE_SHADER_CAP_MAX_TEMPS:
 367                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 368         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 369                 return 16 * 1024 * sizeof(float);
 370         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 371                 return 16;
 372         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 373                 return 0;
 374         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 375         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 376         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 377                 return 0;
 378         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 379                 return 1;
 380         case PIPE_SHADER_CAP_SUBROUTINES:
 381                 return 0;
 382         case PIPE_SHADER_CAP_INTEGERS:
 383                 return 1;
 384         case PIPE_SHADER_CAP_FP16:
 385         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 386         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 387         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 388         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 389         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 390         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 391         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 392         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 393                 return 0;
 394         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 395         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 396         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 397         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 398                 return VC5_MAX_TEXTURE_SAMPLERS;
 399         case PIPE_SHADER_CAP_PREFERRED_IR:
 400                 return PIPE_SHADER_IR_NIR;
 401         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 402                 return 0;
 403         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 404                 return 32;
 405         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 406         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 407                 return 0;
 408         default:
 409                 fprintf(stderr, "unknown shader param %d\n", param);
 410                 return 0;
 411         }
 412         return 0;
 413 }
 414
 415 static boolean
 416 vc5_screen_is_format_supported(struct pipe_screen *pscreen,
 417                                enum pipe_format format,
 418                                enum pipe_texture_target target,
 419                                unsigned sample_count,
 420                                unsigned usage)
 421 {
 422         unsigned retval = 0;
 423
 424         if (sample_count > 1 && sample_count != VC5_MAX_SAMPLES)
 425                 return FALSE;
 426
 427         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 428             !util_format_is_supported(format, usage)) {
 429                 return FALSE;
 430         }
 431
 432         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 433                 switch (format) {
 434                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 435                 case PIPE_FORMAT_R32G32B32_FLOAT:
 436                 case PIPE_FORMAT_R32G32_FLOAT:
 437                 case PIPE_FORMAT_R32_FLOAT:
 438                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 439                 case PIPE_FORMAT_R32G32B32_SNORM:
 440                 case PIPE_FORMAT_R32G32_SNORM:
 441                 case PIPE_FORMAT_R32_SNORM:
 442                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 443                 case PIPE_FORMAT_R32G32B32_SSCALED:
 444                 case PIPE_FORMAT_R32G32_SSCALED:
 445                 case PIPE_FORMAT_R32_SSCALED:
 446                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 447                 case PIPE_FORMAT_R16G16B16_UNORM:
 448                 case PIPE_FORMAT_R16G16_UNORM:
 449                 case PIPE_FORMAT_R16_UNORM:
 450                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 451                 case PIPE_FORMAT_R16G16B16_SNORM:
 452                 case PIPE_FORMAT_R16G16_SNORM:
 453                 case PIPE_FORMAT_R16_SNORM:
 454                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 455                 case PIPE_FORMAT_R16G16B16_USCALED:
 456                 case PIPE_FORMAT_R16G16_USCALED:
 457                 case PIPE_FORMAT_R16_USCALED:
 458                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 459                 case PIPE_FORMAT_R16G16B16_SSCALED:
 460                 case PIPE_FORMAT_R16G16_SSCALED:
 461                 case PIPE_FORMAT_R16_SSCALED:
 462                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 463                 case PIPE_FORMAT_R8G8B8_UNORM:
 464                 case PIPE_FORMAT_R8G8_UNORM:
 465                 case PIPE_FORMAT_R8_UNORM:
 466                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 467                 case PIPE_FORMAT_R8G8B8_SNORM:
 468                 case PIPE_FORMAT_R8G8_SNORM:
 469                 case PIPE_FORMAT_R8_SNORM:
 470                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 471                 case PIPE_FORMAT_R8G8B8_USCALED:
 472                 case PIPE_FORMAT_R8G8_USCALED:
 473                 case PIPE_FORMAT_R8_USCALED:
 474                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 475                 case PIPE_FORMAT_R8G8B8_SSCALED:
 476                 case PIPE_FORMAT_R8G8_SSCALED:
 477                 case PIPE_FORMAT_R8_SSCALED:
 478                         retval |= PIPE_BIND_VERTEX_BUFFER;
 479                         break;
 480                 default:
 481                         break;
 482                 }
 483         }
 484
 485         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 486             vc5_rt_format_supported(format)) {
 487                 retval |= PIPE_BIND_RENDER_TARGET;
 488         }
 489
 490         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 491             vc5_tex_format_supported(format)) {
 492                 retval |= PIPE_BIND_SAMPLER_VIEW;
 493         }
 494
 495         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 496             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 497              format == PIPE_FORMAT_X8Z24_UNORM ||
 498              format == PIPE_FORMAT_Z16_UNORM ||
 499              format == PIPE_FORMAT_Z32_FLOAT ||
 500              format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
 501                 retval |= PIPE_BIND_DEPTH_STENCIL;
 502         }
 503
 504         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 505             (format == PIPE_FORMAT_I8_UINT ||
 506              format == PIPE_FORMAT_I16_UINT ||
 507              format == PIPE_FORMAT_I32_UINT)) {
 508                 retval |= PIPE_BIND_INDEX_BUFFER;
 509         }
 510
 511 #if 0
 512         if (retval != usage) {
 513                 fprintf(stderr,
 514                         "not supported: format=%s, target=%d, sample_count=%d, "
 515                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
 516                         target, sample_count, usage, retval);
 517         }
 518 #endif
 519
 520         return retval == usage;
 521 }
 522
 523 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 524
 525 static unsigned handle_hash(void *key)
 526 {
 527     return PTR_TO_UINT(key);
 528 }
 529
 530 static int handle_compare(void *key1, void *key2)
 531 {
 532     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 533 }
 534
 535 static bool
 536 vc5_get_device_info(struct vc5_screen *screen)
 537 {
 538         struct drm_vc5_get_param ident0 = {
 539                 .param = DRM_VC5_PARAM_V3D_CORE0_IDENT0,
 540         };
 541         struct drm_vc5_get_param ident1 = {
 542                 .param = DRM_VC5_PARAM_V3D_CORE0_IDENT1,
 543         };
 544         int ret;
 545
 546         ret = vc5_ioctl(screen->fd, DRM_IOCTL_VC5_GET_PARAM, &ident0);
 547         if (ret != 0) {
 548                 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
 549                         strerror(errno));
 550                 return false;
 551         }
 552         ret = vc5_ioctl(screen->fd, DRM_IOCTL_VC5_GET_PARAM, &ident1);
 553         if (ret != 0) {
 554                 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
 555                         strerror(errno));
 556                 return false;
 557         }
 558
 559         uint32_t major = (ident0.value >> 24) & 0xff;
 560         uint32_t minor = (ident1.value >> 0) & 0xf;
 561         screen->devinfo.ver = major * 10 + minor;
 562
 563         if (screen->devinfo.ver != 33 && screen->devinfo.ver != 41) {
 564                 fprintf(stderr,
 565                         "V3D %d.%d not supported by this version of Mesa.\n",
 566                         screen->devinfo.ver / 10,
 567                         screen->devinfo.ver % 10);
 568                 return false;
 569         }
 570
 571         return true;
 572 }
 573
 574 static const void *
 575 vc5_screen_get_compiler_options(struct pipe_screen *pscreen,
 576                                 enum pipe_shader_ir ir, unsigned shader)
 577 {
 578         return &v3d_nir_options;
 579 }
 580
 581 struct pipe_screen *
 582 vc5_screen_create(int fd)
 583 {
 584         struct vc5_screen *screen = rzalloc(NULL, struct vc5_screen);
 585         struct pipe_screen *pscreen;
 586
 587         pscreen = &screen->base;
 588
 589         pscreen->destroy = vc5_screen_destroy;
 590         pscreen->get_param = vc5_screen_get_param;
 591         pscreen->get_paramf = vc5_screen_get_paramf;
 592         pscreen->get_shader_param = vc5_screen_get_shader_param;
 593         pscreen->context_create = vc5_context_create;
 594         pscreen->is_format_supported = vc5_screen_is_format_supported;
 595
 596         screen->fd = fd;
 597         list_inithead(&screen->bo_cache.time_list);
 598         (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
 599         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 600
 601 #if defined(USE_VC5_SIMULATOR)
 602         vc5_simulator_init(screen);
 603 #endif
 604
 605         if (!vc5_get_device_info(screen))
 606                 goto fail;
 607
 608         slab_create_parent(&screen->transfer_pool, sizeof(struct vc5_transfer), 16);
 609
 610         vc5_fence_init(screen);
 611
 612         v3d_process_debug_variable();
 613
 614         vc5_resource_screen_init(pscreen);
 615
 616         screen->compiler = v3d_compiler_init(&screen->devinfo);
 617
 618         pscreen->get_name = vc5_screen_get_name;
 619         pscreen->get_vendor = vc5_screen_get_vendor;
 620         pscreen->get_device_vendor = vc5_screen_get_vendor;
 621         pscreen->get_compiler_options = vc5_screen_get_compiler_options;
 622
 623         return pscreen;
 624
 625 fail:
 626         close(fd);
 627         ralloc_free(pscreen);
 628         return NULL;
 629 }