gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/os_time.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30
31 #include "tgsi/tgsi_exec.h"
32
33 #include "virgl_screen.h"
34 #include "virgl_resource.h"
35 #include "virgl_public.h"
36 #include "virgl_context.h"
37
38 #define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
39 #define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
40 #define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */
41
42 static const char *
43 virgl_get_vendor(struct pipe_screen *screen)
44 {
45 return "Red Hat";
46 }
47
48
49 static const char *
50 virgl_get_name(struct pipe_screen *screen)
51 {
52 return "virgl";
53 }
54
55 static int
56 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
57 {
58 struct virgl_screen *vscreen = virgl_screen(screen);
59 switch (param) {
60 case PIPE_CAP_NPOT_TEXTURES:
61 return 1;
62 case PIPE_CAP_SM3:
63 return 1;
64 case PIPE_CAP_ANISOTROPIC_FILTER:
65 return 1;
66 case PIPE_CAP_POINT_SPRITE:
67 return 1;
68 case PIPE_CAP_MAX_RENDER_TARGETS:
69 return vscreen->caps.caps.v1.max_render_targets;
70 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
71 return vscreen->caps.caps.v1.max_dual_source_render_targets;
72 case PIPE_CAP_OCCLUSION_QUERY:
73 return vscreen->caps.caps.v1.bset.occlusion_query;
74 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
75 return vscreen->caps.caps.v1.bset.mirror_clamp;
76 case PIPE_CAP_TEXTURE_SWIZZLE:
77 return 1;
78 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
79 return SP_MAX_TEXTURE_2D_LEVELS;
80 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
81 return SP_MAX_TEXTURE_3D_LEVELS;
82 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
83 return SP_MAX_TEXTURE_CUBE_LEVELS;
84 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
85 return 1;
86 case PIPE_CAP_INDEP_BLEND_ENABLE:
87 return vscreen->caps.caps.v1.bset.indep_blend_enable;
88 case PIPE_CAP_INDEP_BLEND_FUNC:
89 return vscreen->caps.caps.v1.bset.indep_blend_func;
90 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
91 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
92 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
93 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
94 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
95 case PIPE_CAP_DEPTH_CLIP_DISABLE:
96 return vscreen->caps.caps.v1.bset.depth_clip_disable;
97 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
98 return vscreen->caps.caps.v1.max_streamout_buffers;
99 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
100 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
101 return 16*4;
102 case PIPE_CAP_PRIMITIVE_RESTART:
103 return vscreen->caps.caps.v1.bset.primitive_restart;
104 case PIPE_CAP_SHADER_STENCIL_EXPORT:
105 return vscreen->caps.caps.v1.bset.shader_stencil_export;
106 case PIPE_CAP_TGSI_INSTANCEID:
107 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
108 return 1;
109 case PIPE_CAP_SEAMLESS_CUBE_MAP:
110 return vscreen->caps.caps.v1.bset.seamless_cube_map;
111 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
112 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
113 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
114 return vscreen->caps.caps.v1.max_texture_array_layers;
115 case PIPE_CAP_MIN_TEXEL_OFFSET:
116 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
117 return -8;
118 case PIPE_CAP_MAX_TEXEL_OFFSET:
119 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
120 return 7;
121 case PIPE_CAP_CONDITIONAL_RENDER:
122 return vscreen->caps.caps.v1.bset.conditional_render;
123 case PIPE_CAP_TEXTURE_BARRIER:
124 return 0;
125 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
126 return 1;
127 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
128 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
129 return vscreen->caps.caps.v1.bset.color_clamping;
130 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
131 return 1;
132 case PIPE_CAP_GLSL_FEATURE_LEVEL:
133 return vscreen->caps.caps.v1.glsl_level;
134 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
135 return 0;
136 case PIPE_CAP_COMPUTE:
137 return 0;
138 case PIPE_CAP_USER_VERTEX_BUFFERS:
139 return 0;
140 case PIPE_CAP_USER_CONSTANT_BUFFERS:
141 return 1;
142 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
143 return 16;
144 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
145 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
146 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
147 case PIPE_CAP_START_INSTANCE:
148 return vscreen->caps.caps.v1.bset.start_instance;
149 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
150 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
151 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
152 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
153 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
154 return 0;
155 case PIPE_CAP_QUERY_TIMESTAMP:
156 return 1;
157 case PIPE_CAP_QUERY_TIME_ELAPSED:
158 return 0;
159 case PIPE_CAP_TGSI_TEXCOORD:
160 return 0;
161 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
162 return VIRGL_MAP_BUFFER_ALIGNMENT;
163 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
164 return vscreen->caps.caps.v1.max_tbo_size > 0;
165 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
166 return 0;
167 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
168 return 0;
169 case PIPE_CAP_CUBE_MAP_ARRAY:
170 return vscreen->caps.caps.v1.bset.cube_map_array;
171 case PIPE_CAP_TEXTURE_MULTISAMPLE:
172 return vscreen->caps.caps.v1.bset.texture_multisample;
173 case PIPE_CAP_MAX_VIEWPORTS:
174 return vscreen->caps.caps.v1.max_viewports;
175 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
176 return vscreen->caps.caps.v1.max_tbo_size;
177 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
178 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
179 case PIPE_CAP_ENDIANNESS:
180 return 0;
181 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
182 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
183 return 1;
184 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
185 return 0;
186 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
187 return 256;
188 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
189 return 16384;
190 case PIPE_CAP_TEXTURE_QUERY_LOD:
191 return vscreen->caps.caps.v1.bset.texture_query_lod;
192 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
193 return vscreen->caps.caps.v1.max_texture_gather_components;
194 case PIPE_CAP_TEXTURE_GATHER_SM5:
195 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
196 case PIPE_CAP_SAMPLE_SHADING:
197 case PIPE_CAP_FAKE_SW_MSAA:
198 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
199 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
200 case PIPE_CAP_MAX_VERTEX_STREAMS:
201 case PIPE_CAP_DRAW_INDIRECT:
202 case PIPE_CAP_MULTI_DRAW_INDIRECT:
203 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
204 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
205 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
206 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
207 case PIPE_CAP_SAMPLER_VIEW_TARGET:
208 case PIPE_CAP_CLIP_HALFZ:
209 case PIPE_CAP_VERTEXID_NOBASE:
210 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
211 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
212 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
213 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
214 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
215 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
216 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
217 case PIPE_CAP_DEPTH_BOUNDS_TEST:
218 case PIPE_CAP_TGSI_TXQS:
219 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
220 case PIPE_CAP_SHAREABLE_SHADERS:
221 case PIPE_CAP_CLEAR_TEXTURE:
222 case PIPE_CAP_DRAW_PARAMETERS:
223 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
224 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
225 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
226 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
227 case PIPE_CAP_INVALIDATE_BUFFER:
228 case PIPE_CAP_GENERATE_MIPMAP:
229 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
230 case PIPE_CAP_QUERY_BUFFER_OBJECT:
231 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
232 case PIPE_CAP_STRING_MARKER:
233 case PIPE_CAP_QUERY_MEMORY_INFO:
234 case PIPE_CAP_PCI_GROUP:
235 case PIPE_CAP_PCI_BUS:
236 case PIPE_CAP_PCI_DEVICE:
237 case PIPE_CAP_PCI_FUNCTION:
238 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
239 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
240 case PIPE_CAP_CULL_DISTANCE:
241 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
242 case PIPE_CAP_TGSI_VOTE:
243 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
244 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
245 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
246 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
247 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
248 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
249 case PIPE_CAP_TGSI_FS_FBFETCH:
250 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
251 case PIPE_CAP_INT64:
252 case PIPE_CAP_INT64_DIVMOD:
253 case PIPE_CAP_TGSI_TEX_TXF_LZ:
254 case PIPE_CAP_TGSI_CLOCK:
255 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
256 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
257 case PIPE_CAP_TGSI_BALLOT:
258 case PIPE_CAP_DOUBLES:
259 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
260 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
261 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
262 case PIPE_CAP_POST_DEPTH_COVERAGE:
263 case PIPE_CAP_BINDLESS_TEXTURE:
264 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
265 case PIPE_CAP_QUERY_SO_OVERFLOW:
266 case PIPE_CAP_MEMOBJ:
267 case PIPE_CAP_LOAD_CONSTBUF:
268 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
269 case PIPE_CAP_TILE_RASTER_ORDER:
270 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
271 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
272 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
273 return 0;
274 case PIPE_CAP_VENDOR_ID:
275 return 0x1af4;
276 case PIPE_CAP_DEVICE_ID:
277 return 0x1010;
278 case PIPE_CAP_ACCELERATED:
279 return 1;
280 case PIPE_CAP_UMA:
281 case PIPE_CAP_VIDEO_MEMORY:
282 return 0;
283 case PIPE_CAP_NATIVE_FENCE_FD:
284 return 0;
285 }
286 /* should only get here on unhandled cases */
287 debug_printf("Unexpected PIPE_CAP %d query\n", param);
288 return 0;
289 }
290
291 static int
292 virgl_get_shader_param(struct pipe_screen *screen,
293 enum pipe_shader_type shader,
294 enum pipe_shader_cap param)
295 {
296 struct virgl_screen *vscreen = virgl_screen(screen);
297 switch(shader)
298 {
299 case PIPE_SHADER_FRAGMENT:
300 case PIPE_SHADER_VERTEX:
301 case PIPE_SHADER_GEOMETRY:
302 switch (param) {
303 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
304 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
305 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
306 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
307 return INT_MAX;
308 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
309 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
310 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
311 return 1;
312 case PIPE_SHADER_CAP_MAX_INPUTS:
313 if (vscreen->caps.caps.v1.glsl_level < 150)
314 return 16;
315 return (shader == PIPE_SHADER_VERTEX ||
316 shader == PIPE_SHADER_GEOMETRY) ? 16 : 32;
317 case PIPE_SHADER_CAP_MAX_OUTPUTS:
318 return 32;
319 // case PIPE_SHADER_CAP_MAX_CONSTS:
320 // return 4096;
321 case PIPE_SHADER_CAP_MAX_TEMPS:
322 return 256;
323 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
324 return vscreen->caps.caps.v1.max_uniform_blocks;
325 // case PIPE_SHADER_CAP_MAX_ADDRS:
326 // return 1;
327 case PIPE_SHADER_CAP_SUBROUTINES:
328 return 1;
329 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
330 return 16;
331 case PIPE_SHADER_CAP_INTEGERS:
332 return vscreen->caps.caps.v1.glsl_level >= 130;
333 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
334 return 32;
335 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
336 return 4096 * sizeof(float[4]);
337 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
338 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
339 case PIPE_SHADER_CAP_INT64_ATOMICS:
340 case PIPE_SHADER_CAP_FP16:
341 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
342 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
343 default:
344 return 0;
345 }
346 default:
347 return 0;
348 }
349 }
350
351 static float
352 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
353 {
354 switch (param) {
355 case PIPE_CAPF_MAX_LINE_WIDTH:
356 /* fall-through */
357 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
358 return 255.0; /* arbitrary */
359 case PIPE_CAPF_MAX_POINT_WIDTH:
360 /* fall-through */
361 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
362 return 255.0; /* arbitrary */
363 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
364 return 16.0;
365 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
366 return 16.0; /* arbitrary */
367 case PIPE_CAPF_GUARD_BAND_LEFT:
368 case PIPE_CAPF_GUARD_BAND_TOP:
369 case PIPE_CAPF_GUARD_BAND_RIGHT:
370 case PIPE_CAPF_GUARD_BAND_BOTTOM:
371 return 0.0;
372 }
373 /* should only get here on unhandled cases */
374 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
375 return 0.0;
376 }
377
378 static boolean
379 virgl_is_vertex_format_supported(struct pipe_screen *screen,
380 enum pipe_format format)
381 {
382 struct virgl_screen *vscreen = virgl_screen(screen);
383 const struct util_format_description *format_desc;
384 int i;
385
386 format_desc = util_format_description(format);
387 if (!format_desc)
388 return FALSE;
389
390 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
391 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
392 int big = vformat / 32;
393 int small = vformat % 32;
394 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
395 return FALSE;
396 return TRUE;
397 }
398
399 /* Find the first non-VOID channel. */
400 for (i = 0; i < 4; i++) {
401 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
402 break;
403 }
404 }
405
406 if (i == 4)
407 return FALSE;
408
409 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
410 return FALSE;
411
412 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
413 return FALSE;
414 return TRUE;
415 }
416
417 /**
418 * Query format support for creating a texture, drawing surface, etc.
419 * \param format the format to test
420 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
421 */
422 static boolean
423 virgl_is_format_supported( struct pipe_screen *screen,
424 enum pipe_format format,
425 enum pipe_texture_target target,
426 unsigned sample_count,
427 unsigned bind)
428 {
429 struct virgl_screen *vscreen = virgl_screen(screen);
430 const struct util_format_description *format_desc;
431 int i;
432
433 assert(target == PIPE_BUFFER ||
434 target == PIPE_TEXTURE_1D ||
435 target == PIPE_TEXTURE_1D_ARRAY ||
436 target == PIPE_TEXTURE_2D ||
437 target == PIPE_TEXTURE_2D_ARRAY ||
438 target == PIPE_TEXTURE_RECT ||
439 target == PIPE_TEXTURE_3D ||
440 target == PIPE_TEXTURE_CUBE ||
441 target == PIPE_TEXTURE_CUBE_ARRAY);
442
443 format_desc = util_format_description(format);
444 if (!format_desc)
445 return FALSE;
446
447 if (util_format_is_intensity(format))
448 return FALSE;
449
450 if (sample_count > 1) {
451 if (!vscreen->caps.caps.v1.bset.texture_multisample)
452 return FALSE;
453 if (sample_count > vscreen->caps.caps.v1.max_samples)
454 return FALSE;
455 }
456
457 if (bind & PIPE_BIND_VERTEX_BUFFER) {
458 return virgl_is_vertex_format_supported(screen, format);
459 }
460
461 if (bind & PIPE_BIND_RENDER_TARGET) {
462 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
463 return FALSE;
464
465 /*
466 * Although possible, it is unnatural to render into compressed or YUV
467 * surfaces. So disable these here to avoid going into weird paths
468 * inside the state trackers.
469 */
470 if (format_desc->block.width != 1 ||
471 format_desc->block.height != 1)
472 return FALSE;
473
474 {
475 int big = format / 32;
476 int small = format % 32;
477 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
478 return FALSE;
479 }
480 }
481
482 if (bind & PIPE_BIND_DEPTH_STENCIL) {
483 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
484 return FALSE;
485 }
486
487 /*
488 * All other operations (sampling, transfer, etc).
489 */
490
491 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
492 goto out_lookup;
493 }
494 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
495 goto out_lookup;
496 }
497 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
498 goto out_lookup;
499 }
500
501 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
502 goto out_lookup;
503 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
504 goto out_lookup;
505 }
506
507 /* Find the first non-VOID channel. */
508 for (i = 0; i < 4; i++) {
509 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
510 break;
511 }
512 }
513
514 if (i == 4)
515 return FALSE;
516
517 /* no L4A4 */
518 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
519 return FALSE;
520
521 out_lookup:
522 {
523 int big = format / 32;
524 int small = format % 32;
525 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
526 return FALSE;
527 }
528 /*
529 * Everything else should be supported by u_format.
530 */
531 return TRUE;
532 }
533
534 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
535 struct pipe_resource *res,
536 unsigned level, unsigned layer,
537 void *winsys_drawable_handle, struct pipe_box *sub_box)
538 {
539 struct virgl_screen *vscreen = virgl_screen(screen);
540 struct virgl_winsys *vws = vscreen->vws;
541 struct virgl_resource *vres = virgl_resource(res);
542
543 if (vws->flush_frontbuffer)
544 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
545 sub_box);
546 }
547
548 static void virgl_fence_reference(struct pipe_screen *screen,
549 struct pipe_fence_handle **ptr,
550 struct pipe_fence_handle *fence)
551 {
552 struct virgl_screen *vscreen = virgl_screen(screen);
553 struct virgl_winsys *vws = vscreen->vws;
554
555 vws->fence_reference(vws, ptr, fence);
556 }
557
558 static boolean virgl_fence_finish(struct pipe_screen *screen,
559 struct pipe_context *ctx,
560 struct pipe_fence_handle *fence,
561 uint64_t timeout)
562 {
563 struct virgl_screen *vscreen = virgl_screen(screen);
564 struct virgl_winsys *vws = vscreen->vws;
565
566 return vws->fence_wait(vws, fence, timeout);
567 }
568
569 static uint64_t
570 virgl_get_timestamp(struct pipe_screen *_screen)
571 {
572 return os_time_get_nano();
573 }
574
575 static void
576 virgl_destroy_screen(struct pipe_screen *screen)
577 {
578 struct virgl_screen *vscreen = virgl_screen(screen);
579 struct virgl_winsys *vws = vscreen->vws;
580
581 slab_destroy_parent(&vscreen->texture_transfer_pool);
582
583 if (vws)
584 vws->destroy(vws);
585 FREE(vscreen);
586 }
587
588 struct pipe_screen *
589 virgl_create_screen(struct virgl_winsys *vws)
590 {
591 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
592
593 if (!screen)
594 return NULL;
595
596 screen->vws = vws;
597 screen->base.get_name = virgl_get_name;
598 screen->base.get_vendor = virgl_get_vendor;
599 screen->base.get_param = virgl_get_param;
600 screen->base.get_shader_param = virgl_get_shader_param;
601 screen->base.get_paramf = virgl_get_paramf;
602 screen->base.is_format_supported = virgl_is_format_supported;
603 screen->base.destroy = virgl_destroy_screen;
604 screen->base.context_create = virgl_context_create;
605 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
606 screen->base.get_timestamp = virgl_get_timestamp;
607 screen->base.fence_reference = virgl_fence_reference;
608 //screen->base.fence_signalled = virgl_fence_signalled;
609 screen->base.fence_finish = virgl_fence_finish;
610
611 virgl_init_screen_resource_functions(&screen->base);
612
613 vws->get_caps(vws, &screen->caps);
614
615 screen->refcnt = 1;
616
617 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
618
619 return &screen->base;
620 }