gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/os_time.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30
31 #include "tgsi/tgsi_exec.h"
32
33 #include "virgl_screen.h"
34 #include "virgl_resource.h"
35 #include "virgl_public.h"
36 #include "virgl_context.h"
37
38 #define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
39 #define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
40 #define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */
41
42 static const char *
43 virgl_get_vendor(struct pipe_screen *screen)
44 {
45 return "Red Hat";
46 }
47
48
49 static const char *
50 virgl_get_name(struct pipe_screen *screen)
51 {
52 return "virgl";
53 }
54
55 static int
56 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
57 {
58 struct virgl_screen *vscreen = virgl_screen(screen);
59 switch (param) {
60 case PIPE_CAP_NPOT_TEXTURES:
61 return 1;
62 case PIPE_CAP_SM3:
63 return 1;
64 case PIPE_CAP_ANISOTROPIC_FILTER:
65 return 1;
66 case PIPE_CAP_POINT_SPRITE:
67 return 1;
68 case PIPE_CAP_MAX_RENDER_TARGETS:
69 return vscreen->caps.caps.v1.max_render_targets;
70 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
71 return vscreen->caps.caps.v1.max_dual_source_render_targets;
72 case PIPE_CAP_OCCLUSION_QUERY:
73 return vscreen->caps.caps.v1.bset.occlusion_query;
74 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
75 return vscreen->caps.caps.v1.bset.mirror_clamp;
76 case PIPE_CAP_TEXTURE_SWIZZLE:
77 return 1;
78 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
79 return SP_MAX_TEXTURE_2D_LEVELS;
80 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
81 return SP_MAX_TEXTURE_3D_LEVELS;
82 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
83 return SP_MAX_TEXTURE_CUBE_LEVELS;
84 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
85 return 1;
86 case PIPE_CAP_INDEP_BLEND_ENABLE:
87 return vscreen->caps.caps.v1.bset.indep_blend_enable;
88 case PIPE_CAP_INDEP_BLEND_FUNC:
89 return vscreen->caps.caps.v1.bset.indep_blend_func;
90 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
91 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
92 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
93 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
94 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
95 case PIPE_CAP_DEPTH_CLIP_DISABLE:
96 return vscreen->caps.caps.v1.bset.depth_clip_disable;
97 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
98 return vscreen->caps.caps.v1.max_streamout_buffers;
99 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
100 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
101 return 16*4;
102 case PIPE_CAP_PRIMITIVE_RESTART:
103 return vscreen->caps.caps.v1.bset.primitive_restart;
104 case PIPE_CAP_SHADER_STENCIL_EXPORT:
105 return vscreen->caps.caps.v1.bset.shader_stencil_export;
106 case PIPE_CAP_TGSI_INSTANCEID:
107 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
108 return 1;
109 case PIPE_CAP_SEAMLESS_CUBE_MAP:
110 return vscreen->caps.caps.v1.bset.seamless_cube_map;
111 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
112 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
113 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
114 return vscreen->caps.caps.v1.max_texture_array_layers;
115 case PIPE_CAP_MIN_TEXEL_OFFSET:
116 return vscreen->caps.caps.v2.min_texel_offset;
117 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
118 return vscreen->caps.caps.v2.min_texture_gather_offset;
119 case PIPE_CAP_MAX_TEXEL_OFFSET:
120 return vscreen->caps.caps.v2.max_texel_offset;
121 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
122 return vscreen->caps.caps.v2.max_texture_gather_offset;
123 case PIPE_CAP_CONDITIONAL_RENDER:
124 return vscreen->caps.caps.v1.bset.conditional_render;
125 case PIPE_CAP_TEXTURE_BARRIER:
126 return 0;
127 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
128 return 1;
129 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
130 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
131 return vscreen->caps.caps.v1.bset.color_clamping;
132 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
133 return 1;
134 case PIPE_CAP_GLSL_FEATURE_LEVEL:
135 return vscreen->caps.caps.v1.glsl_level;
136 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
137 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
138 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
139 return 0;
140 case PIPE_CAP_COMPUTE:
141 return 0;
142 case PIPE_CAP_USER_VERTEX_BUFFERS:
143 return 0;
144 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
145 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
146 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
147 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
148 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
149 case PIPE_CAP_START_INSTANCE:
150 return vscreen->caps.caps.v1.bset.start_instance;
151 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
152 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
153 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
154 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
155 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
156 return 0;
157 case PIPE_CAP_QUERY_TIMESTAMP:
158 return 1;
159 case PIPE_CAP_QUERY_TIME_ELAPSED:
160 return 0;
161 case PIPE_CAP_TGSI_TEXCOORD:
162 return 0;
163 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
164 return VIRGL_MAP_BUFFER_ALIGNMENT;
165 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
166 return vscreen->caps.caps.v1.max_tbo_size > 0;
167 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
168 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
169 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
170 return 0;
171 case PIPE_CAP_CUBE_MAP_ARRAY:
172 return vscreen->caps.caps.v1.bset.cube_map_array;
173 case PIPE_CAP_TEXTURE_MULTISAMPLE:
174 return vscreen->caps.caps.v1.bset.texture_multisample;
175 case PIPE_CAP_MAX_VIEWPORTS:
176 return vscreen->caps.caps.v1.max_viewports;
177 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178 return vscreen->caps.caps.v1.max_tbo_size;
179 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
180 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
181 case PIPE_CAP_ENDIANNESS:
182 return 0;
183 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
184 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
185 return 1;
186 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
187 return 0;
188 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
189 return vscreen->caps.caps.v2.max_geom_output_vertices;
190 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
191 return vscreen->caps.caps.v2.max_geom_total_output_components;
192 case PIPE_CAP_TEXTURE_QUERY_LOD:
193 return vscreen->caps.caps.v1.bset.texture_query_lod;
194 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
195 return vscreen->caps.caps.v1.max_texture_gather_components;
196 case PIPE_CAP_DRAW_INDIRECT:
197 return vscreen->caps.caps.v1.bset.has_indirect_draw;
198 case PIPE_CAP_SAMPLE_SHADING:
199 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
200 return vscreen->caps.caps.v1.bset.has_sample_shading;
201 case PIPE_CAP_CULL_DISTANCE:
202 return vscreen->caps.caps.v1.bset.has_cull;
203 case PIPE_CAP_MAX_VERTEX_STREAMS:
204 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
205 case PIPE_CAP_TEXTURE_GATHER_SM5:
206 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
207 case PIPE_CAP_FAKE_SW_MSAA:
208 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
209 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
210 case PIPE_CAP_MULTI_DRAW_INDIRECT:
211 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
212 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
213 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
214 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
215 case PIPE_CAP_SAMPLER_VIEW_TARGET:
216 case PIPE_CAP_CLIP_HALFZ:
217 case PIPE_CAP_VERTEXID_NOBASE:
218 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
219 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
220 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
221 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
222 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
223 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
224 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
225 case PIPE_CAP_DEPTH_BOUNDS_TEST:
226 case PIPE_CAP_TGSI_TXQS:
227 case PIPE_CAP_SHAREABLE_SHADERS:
228 case PIPE_CAP_CLEAR_TEXTURE:
229 case PIPE_CAP_DRAW_PARAMETERS:
230 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
231 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
232 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
233 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
234 case PIPE_CAP_INVALIDATE_BUFFER:
235 case PIPE_CAP_GENERATE_MIPMAP:
236 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
237 case PIPE_CAP_QUERY_BUFFER_OBJECT:
238 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
239 case PIPE_CAP_STRING_MARKER:
240 case PIPE_CAP_QUERY_MEMORY_INFO:
241 case PIPE_CAP_PCI_GROUP:
242 case PIPE_CAP_PCI_BUS:
243 case PIPE_CAP_PCI_DEVICE:
244 case PIPE_CAP_PCI_FUNCTION:
245 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
246 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
247 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
248 case PIPE_CAP_TGSI_VOTE:
249 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
250 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
251 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
252 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
253 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
254 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
255 case PIPE_CAP_TGSI_FS_FBFETCH:
256 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
257 case PIPE_CAP_INT64:
258 case PIPE_CAP_INT64_DIVMOD:
259 case PIPE_CAP_TGSI_TEX_TXF_LZ:
260 case PIPE_CAP_TGSI_CLOCK:
261 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
262 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
263 case PIPE_CAP_TGSI_BALLOT:
264 case PIPE_CAP_DOUBLES:
265 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
266 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
267 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
268 case PIPE_CAP_POST_DEPTH_COVERAGE:
269 case PIPE_CAP_BINDLESS_TEXTURE:
270 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
271 case PIPE_CAP_QUERY_SO_OVERFLOW:
272 case PIPE_CAP_MEMOBJ:
273 case PIPE_CAP_LOAD_CONSTBUF:
274 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
275 case PIPE_CAP_TILE_RASTER_ORDER:
276 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
277 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
278 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
279 case PIPE_CAP_FENCE_SIGNAL:
280 case PIPE_CAP_CONSTBUF0_FLAGS:
281 case PIPE_CAP_PACKED_UNIFORMS:
282 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
283 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
284 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
285 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
286 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
287 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
288 return 0;
289 case PIPE_CAP_VENDOR_ID:
290 return 0x1af4;
291 case PIPE_CAP_DEVICE_ID:
292 return 0x1010;
293 case PIPE_CAP_ACCELERATED:
294 return 1;
295 case PIPE_CAP_UMA:
296 case PIPE_CAP_VIDEO_MEMORY:
297 return 0;
298 case PIPE_CAP_NATIVE_FENCE_FD:
299 return 0;
300 }
301 /* should only get here on unhandled cases */
302 debug_printf("Unexpected PIPE_CAP %d query\n", param);
303 return 0;
304 }
305
306 static int
307 virgl_get_shader_param(struct pipe_screen *screen,
308 enum pipe_shader_type shader,
309 enum pipe_shader_cap param)
310 {
311 struct virgl_screen *vscreen = virgl_screen(screen);
312 switch(shader)
313 {
314 case PIPE_SHADER_FRAGMENT:
315 case PIPE_SHADER_VERTEX:
316 case PIPE_SHADER_GEOMETRY:
317 switch (param) {
318 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
319 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
320 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
321 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
322 return INT_MAX;
323 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
324 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
325 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
326 return 1;
327 case PIPE_SHADER_CAP_MAX_INPUTS:
328 if (vscreen->caps.caps.v1.glsl_level < 150)
329 return vscreen->caps.caps.v2.max_vertex_attribs;
330 return (shader == PIPE_SHADER_VERTEX ||
331 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
332 case PIPE_SHADER_CAP_MAX_OUTPUTS:
333 if (shader == PIPE_SHADER_FRAGMENT)
334 return vscreen->caps.caps.v1.max_render_targets;
335 return vscreen->caps.caps.v2.max_vertex_outputs;
336 // case PIPE_SHADER_CAP_MAX_CONSTS:
337 // return 4096;
338 case PIPE_SHADER_CAP_MAX_TEMPS:
339 return 256;
340 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
341 return vscreen->caps.caps.v1.max_uniform_blocks;
342 // case PIPE_SHADER_CAP_MAX_ADDRS:
343 // return 1;
344 case PIPE_SHADER_CAP_SUBROUTINES:
345 return 1;
346 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
347 return 16;
348 case PIPE_SHADER_CAP_INTEGERS:
349 return vscreen->caps.caps.v1.glsl_level >= 130;
350 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
351 return 32;
352 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
353 return 4096 * sizeof(float[4]);
354 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
355 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
356 case PIPE_SHADER_CAP_INT64_ATOMICS:
357 case PIPE_SHADER_CAP_FP16:
358 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
359 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
360 default:
361 return 0;
362 }
363 default:
364 return 0;
365 }
366 }
367
368 static float
369 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
370 {
371 struct virgl_screen *vscreen = virgl_screen(screen);
372 switch (param) {
373 case PIPE_CAPF_MAX_LINE_WIDTH:
374 return vscreen->caps.caps.v2.max_aliased_line_width;
375 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
376 return vscreen->caps.caps.v2.max_smooth_line_width;
377 case PIPE_CAPF_MAX_POINT_WIDTH:
378 return vscreen->caps.caps.v2.max_aliased_point_size;
379 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
380 return vscreen->caps.caps.v2.max_smooth_point_size;
381 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
382 return 16.0;
383 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
384 return vscreen->caps.caps.v2.max_texture_lod_bias;
385 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
386 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
387 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
388 return 0.0f;
389 }
390 /* should only get here on unhandled cases */
391 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
392 return 0.0;
393 }
394
395 static boolean
396 virgl_is_vertex_format_supported(struct pipe_screen *screen,
397 enum pipe_format format)
398 {
399 struct virgl_screen *vscreen = virgl_screen(screen);
400 const struct util_format_description *format_desc;
401 int i;
402
403 format_desc = util_format_description(format);
404 if (!format_desc)
405 return FALSE;
406
407 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
408 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
409 int big = vformat / 32;
410 int small = vformat % 32;
411 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
412 return FALSE;
413 return TRUE;
414 }
415
416 /* Find the first non-VOID channel. */
417 for (i = 0; i < 4; i++) {
418 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
419 break;
420 }
421 }
422
423 if (i == 4)
424 return FALSE;
425
426 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
427 return FALSE;
428
429 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
430 return FALSE;
431 return TRUE;
432 }
433
434 /**
435 * Query format support for creating a texture, drawing surface, etc.
436 * \param format the format to test
437 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
438 */
439 static boolean
440 virgl_is_format_supported( struct pipe_screen *screen,
441 enum pipe_format format,
442 enum pipe_texture_target target,
443 unsigned sample_count,
444 unsigned bind)
445 {
446 struct virgl_screen *vscreen = virgl_screen(screen);
447 const struct util_format_description *format_desc;
448 int i;
449
450 assert(target == PIPE_BUFFER ||
451 target == PIPE_TEXTURE_1D ||
452 target == PIPE_TEXTURE_1D_ARRAY ||
453 target == PIPE_TEXTURE_2D ||
454 target == PIPE_TEXTURE_2D_ARRAY ||
455 target == PIPE_TEXTURE_RECT ||
456 target == PIPE_TEXTURE_3D ||
457 target == PIPE_TEXTURE_CUBE ||
458 target == PIPE_TEXTURE_CUBE_ARRAY);
459
460 format_desc = util_format_description(format);
461 if (!format_desc)
462 return FALSE;
463
464 if (util_format_is_intensity(format))
465 return FALSE;
466
467 if (sample_count > 1) {
468 if (!vscreen->caps.caps.v1.bset.texture_multisample)
469 return FALSE;
470 if (sample_count > vscreen->caps.caps.v1.max_samples)
471 return FALSE;
472 }
473
474 if (bind & PIPE_BIND_VERTEX_BUFFER) {
475 return virgl_is_vertex_format_supported(screen, format);
476 }
477
478 if (bind & PIPE_BIND_RENDER_TARGET) {
479 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
480 return FALSE;
481
482 /*
483 * Although possible, it is unnatural to render into compressed or YUV
484 * surfaces. So disable these here to avoid going into weird paths
485 * inside the state trackers.
486 */
487 if (format_desc->block.width != 1 ||
488 format_desc->block.height != 1)
489 return FALSE;
490
491 {
492 int big = format / 32;
493 int small = format % 32;
494 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
495 return FALSE;
496 }
497 }
498
499 if (bind & PIPE_BIND_DEPTH_STENCIL) {
500 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
501 return FALSE;
502 }
503
504 /*
505 * All other operations (sampling, transfer, etc).
506 */
507
508 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
509 goto out_lookup;
510 }
511 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
512 goto out_lookup;
513 }
514 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
515 goto out_lookup;
516 }
517
518 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
519 goto out_lookup;
520 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
521 goto out_lookup;
522 }
523
524 /* Find the first non-VOID channel. */
525 for (i = 0; i < 4; i++) {
526 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
527 break;
528 }
529 }
530
531 if (i == 4)
532 return FALSE;
533
534 /* no L4A4 */
535 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
536 return FALSE;
537
538 out_lookup:
539 {
540 int big = format / 32;
541 int small = format % 32;
542 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
543 return FALSE;
544 }
545 /*
546 * Everything else should be supported by u_format.
547 */
548 return TRUE;
549 }
550
551 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
552 struct pipe_resource *res,
553 unsigned level, unsigned layer,
554 void *winsys_drawable_handle, struct pipe_box *sub_box)
555 {
556 struct virgl_screen *vscreen = virgl_screen(screen);
557 struct virgl_winsys *vws = vscreen->vws;
558 struct virgl_resource *vres = virgl_resource(res);
559
560 if (vws->flush_frontbuffer)
561 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
562 sub_box);
563 }
564
565 static void virgl_fence_reference(struct pipe_screen *screen,
566 struct pipe_fence_handle **ptr,
567 struct pipe_fence_handle *fence)
568 {
569 struct virgl_screen *vscreen = virgl_screen(screen);
570 struct virgl_winsys *vws = vscreen->vws;
571
572 vws->fence_reference(vws, ptr, fence);
573 }
574
575 static boolean virgl_fence_finish(struct pipe_screen *screen,
576 struct pipe_context *ctx,
577 struct pipe_fence_handle *fence,
578 uint64_t timeout)
579 {
580 struct virgl_screen *vscreen = virgl_screen(screen);
581 struct virgl_winsys *vws = vscreen->vws;
582
583 return vws->fence_wait(vws, fence, timeout);
584 }
585
586 static uint64_t
587 virgl_get_timestamp(struct pipe_screen *_screen)
588 {
589 return os_time_get_nano();
590 }
591
592 static void
593 virgl_destroy_screen(struct pipe_screen *screen)
594 {
595 struct virgl_screen *vscreen = virgl_screen(screen);
596 struct virgl_winsys *vws = vscreen->vws;
597
598 slab_destroy_parent(&vscreen->texture_transfer_pool);
599
600 if (vws)
601 vws->destroy(vws);
602 FREE(vscreen);
603 }
604
605 struct pipe_screen *
606 virgl_create_screen(struct virgl_winsys *vws)
607 {
608 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
609
610 if (!screen)
611 return NULL;
612
613 screen->vws = vws;
614 screen->base.get_name = virgl_get_name;
615 screen->base.get_vendor = virgl_get_vendor;
616 screen->base.get_param = virgl_get_param;
617 screen->base.get_shader_param = virgl_get_shader_param;
618 screen->base.get_paramf = virgl_get_paramf;
619 screen->base.is_format_supported = virgl_is_format_supported;
620 screen->base.destroy = virgl_destroy_screen;
621 screen->base.context_create = virgl_context_create;
622 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
623 screen->base.get_timestamp = virgl_get_timestamp;
624 screen->base.fence_reference = virgl_fence_reference;
625 //screen->base.fence_signalled = virgl_fence_signalled;
626 screen->base.fence_finish = virgl_fence_finish;
627
628 virgl_init_screen_resource_functions(&screen->base);
629
630 vws->get_caps(vws, &screen->caps);
631
632 screen->refcnt = 1;
633
634 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
635
636 return &screen->base;
637 }