virgl: add ARB_conditional_render_inverted support
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/os_time.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30
31 #include "tgsi/tgsi_exec.h"
32
33 #include "virgl_screen.h"
34 #include "virgl_resource.h"
35 #include "virgl_public.h"
36 #include "virgl_context.h"
37
38 #define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
39 #define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
40 #define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */
41
42 static const char *
43 virgl_get_vendor(struct pipe_screen *screen)
44 {
45 return "Red Hat";
46 }
47
48
49 static const char *
50 virgl_get_name(struct pipe_screen *screen)
51 {
52 return "virgl";
53 }
54
55 static int
56 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
57 {
58 struct virgl_screen *vscreen = virgl_screen(screen);
59 switch (param) {
60 case PIPE_CAP_NPOT_TEXTURES:
61 return 1;
62 case PIPE_CAP_SM3:
63 return 1;
64 case PIPE_CAP_ANISOTROPIC_FILTER:
65 return 1;
66 case PIPE_CAP_POINT_SPRITE:
67 return 1;
68 case PIPE_CAP_MAX_RENDER_TARGETS:
69 return vscreen->caps.caps.v1.max_render_targets;
70 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
71 return vscreen->caps.caps.v1.max_dual_source_render_targets;
72 case PIPE_CAP_OCCLUSION_QUERY:
73 return vscreen->caps.caps.v1.bset.occlusion_query;
74 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
75 return vscreen->caps.caps.v1.bset.mirror_clamp;
76 case PIPE_CAP_TEXTURE_SWIZZLE:
77 return 1;
78 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
79 return SP_MAX_TEXTURE_2D_LEVELS;
80 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
81 return SP_MAX_TEXTURE_3D_LEVELS;
82 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
83 return SP_MAX_TEXTURE_CUBE_LEVELS;
84 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
85 return 1;
86 case PIPE_CAP_INDEP_BLEND_ENABLE:
87 return vscreen->caps.caps.v1.bset.indep_blend_enable;
88 case PIPE_CAP_INDEP_BLEND_FUNC:
89 return vscreen->caps.caps.v1.bset.indep_blend_func;
90 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
91 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
92 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
93 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
94 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
95 case PIPE_CAP_DEPTH_CLIP_DISABLE:
96 return vscreen->caps.caps.v1.bset.depth_clip_disable;
97 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
98 return vscreen->caps.caps.v1.max_streamout_buffers;
99 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
100 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
101 return 16*4;
102 case PIPE_CAP_PRIMITIVE_RESTART:
103 return vscreen->caps.caps.v1.bset.primitive_restart;
104 case PIPE_CAP_SHADER_STENCIL_EXPORT:
105 return vscreen->caps.caps.v1.bset.shader_stencil_export;
106 case PIPE_CAP_TGSI_INSTANCEID:
107 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
108 return 1;
109 case PIPE_CAP_SEAMLESS_CUBE_MAP:
110 return vscreen->caps.caps.v1.bset.seamless_cube_map;
111 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
112 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
113 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
114 return vscreen->caps.caps.v1.max_texture_array_layers;
115 case PIPE_CAP_MIN_TEXEL_OFFSET:
116 return vscreen->caps.caps.v2.min_texel_offset;
117 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
118 return vscreen->caps.caps.v2.min_texture_gather_offset;
119 case PIPE_CAP_MAX_TEXEL_OFFSET:
120 return vscreen->caps.caps.v2.max_texel_offset;
121 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
122 return vscreen->caps.caps.v2.max_texture_gather_offset;
123 case PIPE_CAP_CONDITIONAL_RENDER:
124 return vscreen->caps.caps.v1.bset.conditional_render;
125 case PIPE_CAP_TEXTURE_BARRIER:
126 return 0;
127 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
128 return 1;
129 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
130 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
131 return vscreen->caps.caps.v1.bset.color_clamping;
132 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
133 return 1;
134 case PIPE_CAP_GLSL_FEATURE_LEVEL:
135 return vscreen->caps.caps.v1.glsl_level;
136 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
137 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
138 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
139 return 0;
140 case PIPE_CAP_COMPUTE:
141 return 0;
142 case PIPE_CAP_USER_VERTEX_BUFFERS:
143 return 0;
144 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
145 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
146 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
147 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
148 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
149 case PIPE_CAP_START_INSTANCE:
150 return vscreen->caps.caps.v1.bset.start_instance;
151 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
152 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
153 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
154 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
155 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
156 return 0;
157 case PIPE_CAP_QUERY_TIMESTAMP:
158 return 1;
159 case PIPE_CAP_QUERY_TIME_ELAPSED:
160 return 0;
161 case PIPE_CAP_TGSI_TEXCOORD:
162 return 0;
163 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
164 return VIRGL_MAP_BUFFER_ALIGNMENT;
165 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
166 return vscreen->caps.caps.v1.max_tbo_size > 0;
167 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
168 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
169 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
170 return 0;
171 case PIPE_CAP_CUBE_MAP_ARRAY:
172 return vscreen->caps.caps.v1.bset.cube_map_array;
173 case PIPE_CAP_TEXTURE_MULTISAMPLE:
174 return vscreen->caps.caps.v1.bset.texture_multisample;
175 case PIPE_CAP_MAX_VIEWPORTS:
176 return vscreen->caps.caps.v1.max_viewports;
177 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178 return vscreen->caps.caps.v1.max_tbo_size;
179 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
180 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
181 case PIPE_CAP_ENDIANNESS:
182 return 0;
183 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
184 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
185 return 1;
186 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
187 return 0;
188 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
189 return vscreen->caps.caps.v2.max_geom_output_vertices;
190 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
191 return vscreen->caps.caps.v2.max_geom_total_output_components;
192 case PIPE_CAP_TEXTURE_QUERY_LOD:
193 return vscreen->caps.caps.v1.bset.texture_query_lod;
194 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
195 return vscreen->caps.caps.v1.max_texture_gather_components;
196 case PIPE_CAP_DRAW_INDIRECT:
197 return vscreen->caps.caps.v1.bset.has_indirect_draw;
198 case PIPE_CAP_SAMPLE_SHADING:
199 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
200 return vscreen->caps.caps.v1.bset.has_sample_shading;
201 case PIPE_CAP_CULL_DISTANCE:
202 return vscreen->caps.caps.v1.bset.has_cull;
203 case PIPE_CAP_MAX_VERTEX_STREAMS:
204 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
205 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
206 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
207 case PIPE_CAP_TEXTURE_GATHER_SM5:
208 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
209 case PIPE_CAP_FAKE_SW_MSAA:
210 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
211 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
212 case PIPE_CAP_MULTI_DRAW_INDIRECT:
213 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
214 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
215 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
216 case PIPE_CAP_SAMPLER_VIEW_TARGET:
217 case PIPE_CAP_CLIP_HALFZ:
218 case PIPE_CAP_VERTEXID_NOBASE:
219 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
220 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
221 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
222 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
223 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
224 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
225 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
226 case PIPE_CAP_DEPTH_BOUNDS_TEST:
227 case PIPE_CAP_TGSI_TXQS:
228 case PIPE_CAP_SHAREABLE_SHADERS:
229 case PIPE_CAP_CLEAR_TEXTURE:
230 case PIPE_CAP_DRAW_PARAMETERS:
231 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
232 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
233 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
234 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
235 case PIPE_CAP_INVALIDATE_BUFFER:
236 case PIPE_CAP_GENERATE_MIPMAP:
237 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
238 case PIPE_CAP_QUERY_BUFFER_OBJECT:
239 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
240 case PIPE_CAP_STRING_MARKER:
241 case PIPE_CAP_QUERY_MEMORY_INFO:
242 case PIPE_CAP_PCI_GROUP:
243 case PIPE_CAP_PCI_BUS:
244 case PIPE_CAP_PCI_DEVICE:
245 case PIPE_CAP_PCI_FUNCTION:
246 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
247 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
248 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
249 case PIPE_CAP_TGSI_VOTE:
250 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
251 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
252 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
253 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
254 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
255 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
256 case PIPE_CAP_TGSI_FS_FBFETCH:
257 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
258 case PIPE_CAP_INT64:
259 case PIPE_CAP_INT64_DIVMOD:
260 case PIPE_CAP_TGSI_TEX_TXF_LZ:
261 case PIPE_CAP_TGSI_CLOCK:
262 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
263 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
264 case PIPE_CAP_TGSI_BALLOT:
265 case PIPE_CAP_DOUBLES:
266 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
267 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
268 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
269 case PIPE_CAP_POST_DEPTH_COVERAGE:
270 case PIPE_CAP_BINDLESS_TEXTURE:
271 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
272 case PIPE_CAP_QUERY_SO_OVERFLOW:
273 case PIPE_CAP_MEMOBJ:
274 case PIPE_CAP_LOAD_CONSTBUF:
275 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
276 case PIPE_CAP_TILE_RASTER_ORDER:
277 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
278 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
279 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
280 case PIPE_CAP_FENCE_SIGNAL:
281 case PIPE_CAP_CONSTBUF0_FLAGS:
282 case PIPE_CAP_PACKED_UNIFORMS:
283 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
284 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
285 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
286 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
287 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
288 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
289 return 0;
290 case PIPE_CAP_VENDOR_ID:
291 return 0x1af4;
292 case PIPE_CAP_DEVICE_ID:
293 return 0x1010;
294 case PIPE_CAP_ACCELERATED:
295 return 1;
296 case PIPE_CAP_UMA:
297 case PIPE_CAP_VIDEO_MEMORY:
298 return 0;
299 case PIPE_CAP_NATIVE_FENCE_FD:
300 return 0;
301 }
302 /* should only get here on unhandled cases */
303 debug_printf("Unexpected PIPE_CAP %d query\n", param);
304 return 0;
305 }
306
307 static int
308 virgl_get_shader_param(struct pipe_screen *screen,
309 enum pipe_shader_type shader,
310 enum pipe_shader_cap param)
311 {
312 struct virgl_screen *vscreen = virgl_screen(screen);
313 switch(shader)
314 {
315 case PIPE_SHADER_FRAGMENT:
316 case PIPE_SHADER_VERTEX:
317 case PIPE_SHADER_GEOMETRY:
318 switch (param) {
319 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
320 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
321 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
322 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
323 return INT_MAX;
324 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
325 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
326 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
327 return 1;
328 case PIPE_SHADER_CAP_MAX_INPUTS:
329 if (vscreen->caps.caps.v1.glsl_level < 150)
330 return vscreen->caps.caps.v2.max_vertex_attribs;
331 return (shader == PIPE_SHADER_VERTEX ||
332 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
333 case PIPE_SHADER_CAP_MAX_OUTPUTS:
334 if (shader == PIPE_SHADER_FRAGMENT)
335 return vscreen->caps.caps.v1.max_render_targets;
336 return vscreen->caps.caps.v2.max_vertex_outputs;
337 // case PIPE_SHADER_CAP_MAX_CONSTS:
338 // return 4096;
339 case PIPE_SHADER_CAP_MAX_TEMPS:
340 return 256;
341 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
342 return vscreen->caps.caps.v1.max_uniform_blocks;
343 // case PIPE_SHADER_CAP_MAX_ADDRS:
344 // return 1;
345 case PIPE_SHADER_CAP_SUBROUTINES:
346 return 1;
347 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
348 return 16;
349 case PIPE_SHADER_CAP_INTEGERS:
350 return vscreen->caps.caps.v1.glsl_level >= 130;
351 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
352 return 32;
353 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
354 return 4096 * sizeof(float[4]);
355 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
356 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
357 case PIPE_SHADER_CAP_INT64_ATOMICS:
358 case PIPE_SHADER_CAP_FP16:
359 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
360 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
361 default:
362 return 0;
363 }
364 default:
365 return 0;
366 }
367 }
368
369 static float
370 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
371 {
372 struct virgl_screen *vscreen = virgl_screen(screen);
373 switch (param) {
374 case PIPE_CAPF_MAX_LINE_WIDTH:
375 return vscreen->caps.caps.v2.max_aliased_line_width;
376 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
377 return vscreen->caps.caps.v2.max_smooth_line_width;
378 case PIPE_CAPF_MAX_POINT_WIDTH:
379 return vscreen->caps.caps.v2.max_aliased_point_size;
380 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
381 return vscreen->caps.caps.v2.max_smooth_point_size;
382 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
383 return 16.0;
384 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
385 return vscreen->caps.caps.v2.max_texture_lod_bias;
386 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
387 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
388 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
389 return 0.0f;
390 }
391 /* should only get here on unhandled cases */
392 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
393 return 0.0;
394 }
395
396 static boolean
397 virgl_is_vertex_format_supported(struct pipe_screen *screen,
398 enum pipe_format format)
399 {
400 struct virgl_screen *vscreen = virgl_screen(screen);
401 const struct util_format_description *format_desc;
402 int i;
403
404 format_desc = util_format_description(format);
405 if (!format_desc)
406 return FALSE;
407
408 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
409 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
410 int big = vformat / 32;
411 int small = vformat % 32;
412 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
413 return FALSE;
414 return TRUE;
415 }
416
417 /* Find the first non-VOID channel. */
418 for (i = 0; i < 4; i++) {
419 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
420 break;
421 }
422 }
423
424 if (i == 4)
425 return FALSE;
426
427 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
428 return FALSE;
429
430 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
431 return FALSE;
432 return TRUE;
433 }
434
435 /**
436 * Query format support for creating a texture, drawing surface, etc.
437 * \param format the format to test
438 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
439 */
440 static boolean
441 virgl_is_format_supported( struct pipe_screen *screen,
442 enum pipe_format format,
443 enum pipe_texture_target target,
444 unsigned sample_count,
445 unsigned bind)
446 {
447 struct virgl_screen *vscreen = virgl_screen(screen);
448 const struct util_format_description *format_desc;
449 int i;
450
451 assert(target == PIPE_BUFFER ||
452 target == PIPE_TEXTURE_1D ||
453 target == PIPE_TEXTURE_1D_ARRAY ||
454 target == PIPE_TEXTURE_2D ||
455 target == PIPE_TEXTURE_2D_ARRAY ||
456 target == PIPE_TEXTURE_RECT ||
457 target == PIPE_TEXTURE_3D ||
458 target == PIPE_TEXTURE_CUBE ||
459 target == PIPE_TEXTURE_CUBE_ARRAY);
460
461 format_desc = util_format_description(format);
462 if (!format_desc)
463 return FALSE;
464
465 if (util_format_is_intensity(format))
466 return FALSE;
467
468 if (sample_count > 1) {
469 if (!vscreen->caps.caps.v1.bset.texture_multisample)
470 return FALSE;
471 if (sample_count > vscreen->caps.caps.v1.max_samples)
472 return FALSE;
473 }
474
475 if (bind & PIPE_BIND_VERTEX_BUFFER) {
476 return virgl_is_vertex_format_supported(screen, format);
477 }
478
479 if (bind & PIPE_BIND_RENDER_TARGET) {
480 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
481 return FALSE;
482
483 /*
484 * Although possible, it is unnatural to render into compressed or YUV
485 * surfaces. So disable these here to avoid going into weird paths
486 * inside the state trackers.
487 */
488 if (format_desc->block.width != 1 ||
489 format_desc->block.height != 1)
490 return FALSE;
491
492 {
493 int big = format / 32;
494 int small = format % 32;
495 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
496 return FALSE;
497 }
498 }
499
500 if (bind & PIPE_BIND_DEPTH_STENCIL) {
501 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
502 return FALSE;
503 }
504
505 /*
506 * All other operations (sampling, transfer, etc).
507 */
508
509 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
510 goto out_lookup;
511 }
512 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
513 goto out_lookup;
514 }
515 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
516 goto out_lookup;
517 }
518
519 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
520 goto out_lookup;
521 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
522 goto out_lookup;
523 }
524
525 /* Find the first non-VOID channel. */
526 for (i = 0; i < 4; i++) {
527 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
528 break;
529 }
530 }
531
532 if (i == 4)
533 return FALSE;
534
535 /* no L4A4 */
536 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
537 return FALSE;
538
539 out_lookup:
540 {
541 int big = format / 32;
542 int small = format % 32;
543 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
544 return FALSE;
545 }
546 /*
547 * Everything else should be supported by u_format.
548 */
549 return TRUE;
550 }
551
552 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
553 struct pipe_resource *res,
554 unsigned level, unsigned layer,
555 void *winsys_drawable_handle, struct pipe_box *sub_box)
556 {
557 struct virgl_screen *vscreen = virgl_screen(screen);
558 struct virgl_winsys *vws = vscreen->vws;
559 struct virgl_resource *vres = virgl_resource(res);
560
561 if (vws->flush_frontbuffer)
562 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
563 sub_box);
564 }
565
566 static void virgl_fence_reference(struct pipe_screen *screen,
567 struct pipe_fence_handle **ptr,
568 struct pipe_fence_handle *fence)
569 {
570 struct virgl_screen *vscreen = virgl_screen(screen);
571 struct virgl_winsys *vws = vscreen->vws;
572
573 vws->fence_reference(vws, ptr, fence);
574 }
575
576 static boolean virgl_fence_finish(struct pipe_screen *screen,
577 struct pipe_context *ctx,
578 struct pipe_fence_handle *fence,
579 uint64_t timeout)
580 {
581 struct virgl_screen *vscreen = virgl_screen(screen);
582 struct virgl_winsys *vws = vscreen->vws;
583
584 return vws->fence_wait(vws, fence, timeout);
585 }
586
587 static uint64_t
588 virgl_get_timestamp(struct pipe_screen *_screen)
589 {
590 return os_time_get_nano();
591 }
592
593 static void
594 virgl_destroy_screen(struct pipe_screen *screen)
595 {
596 struct virgl_screen *vscreen = virgl_screen(screen);
597 struct virgl_winsys *vws = vscreen->vws;
598
599 slab_destroy_parent(&vscreen->texture_transfer_pool);
600
601 if (vws)
602 vws->destroy(vws);
603 FREE(vscreen);
604 }
605
606 struct pipe_screen *
607 virgl_create_screen(struct virgl_winsys *vws)
608 {
609 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
610
611 if (!screen)
612 return NULL;
613
614 screen->vws = vws;
615 screen->base.get_name = virgl_get_name;
616 screen->base.get_vendor = virgl_get_vendor;
617 screen->base.get_param = virgl_get_param;
618 screen->base.get_shader_param = virgl_get_shader_param;
619 screen->base.get_paramf = virgl_get_paramf;
620 screen->base.is_format_supported = virgl_is_format_supported;
621 screen->base.destroy = virgl_destroy_screen;
622 screen->base.context_create = virgl_context_create;
623 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
624 screen->base.get_timestamp = virgl_get_timestamp;
625 screen->base.fence_reference = virgl_fence_reference;
626 //screen->base.fence_signalled = virgl_fence_signalled;
627 screen->base.fence_finish = virgl_fence_finish;
628
629 virgl_init_screen_resource_functions(&screen->base);
630
631 vws->get_caps(vws, &screen->caps);
632
633 screen->refcnt = 1;
634
635 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
636
637 return &screen->base;
638 }