gallium: Add a helper for implementing PIPE_CAP_* default values.
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_screen.h"
27 #include "util/u_video.h"
28 #include "util/u_math.h"
29 #include "util/os_time.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32
33 #include "tgsi/tgsi_exec.h"
34
35 #include "virgl_screen.h"
36 #include "virgl_resource.h"
37 #include "virgl_public.h"
38 #include "virgl_context.h"
39
40 int virgl_debug = 0;
41 static const struct debug_named_value debug_options[] = {
42 { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
43 { "tgsi", VIRGL_DEBUG_TGSI, NULL },
44 DEBUG_NAMED_VALUE_END
45 };
46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
47
48 static const char *
49 virgl_get_vendor(struct pipe_screen *screen)
50 {
51 return "Red Hat";
52 }
53
54
55 static const char *
56 virgl_get_name(struct pipe_screen *screen)
57 {
58 return "virgl";
59 }
60
61 static int
62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
63 {
64 struct virgl_screen *vscreen = virgl_screen(screen);
65 switch (param) {
66 case PIPE_CAP_NPOT_TEXTURES:
67 return 1;
68 case PIPE_CAP_SM3:
69 return 1;
70 case PIPE_CAP_ANISOTROPIC_FILTER:
71 return 1;
72 case PIPE_CAP_POINT_SPRITE:
73 return 1;
74 case PIPE_CAP_MAX_RENDER_TARGETS:
75 return vscreen->caps.caps.v1.max_render_targets;
76 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
77 return vscreen->caps.caps.v1.max_dual_source_render_targets;
78 case PIPE_CAP_OCCLUSION_QUERY:
79 return vscreen->caps.caps.v1.bset.occlusion_query;
80 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
81 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
82 return vscreen->caps.caps.v1.bset.mirror_clamp;
83 case PIPE_CAP_TEXTURE_SWIZZLE:
84 return 1;
85 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
86 if (vscreen->caps.caps.v2.max_texture_2d_size)
87 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
88 return 15; /* 16K x 16K */
89 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
90 if (vscreen->caps.caps.v2.max_texture_3d_size)
91 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
92 return 9; /* 256 x 256 x 256 */
93 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
94 if (vscreen->caps.caps.v2.max_texture_cube_size)
95 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
96 return 13; /* 4K x 4K */
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 return 1;
99 case PIPE_CAP_INDEP_BLEND_ENABLE:
100 return vscreen->caps.caps.v1.bset.indep_blend_enable;
101 case PIPE_CAP_INDEP_BLEND_FUNC:
102 return vscreen->caps.caps.v1.bset.indep_blend_func;
103 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
104 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
106 return 1;
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
108 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
109 case PIPE_CAP_DEPTH_CLIP_DISABLE:
110 return vscreen->caps.caps.v1.bset.depth_clip_disable;
111 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
112 return vscreen->caps.caps.v1.max_streamout_buffers;
113 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
114 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
115 return 16*4;
116 case PIPE_CAP_PRIMITIVE_RESTART:
117 return vscreen->caps.caps.v1.bset.primitive_restart;
118 case PIPE_CAP_SHADER_STENCIL_EXPORT:
119 return vscreen->caps.caps.v1.bset.shader_stencil_export;
120 case PIPE_CAP_TGSI_INSTANCEID:
121 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
122 return 1;
123 case PIPE_CAP_SEAMLESS_CUBE_MAP:
124 return vscreen->caps.caps.v1.bset.seamless_cube_map;
125 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
126 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
127 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
128 return vscreen->caps.caps.v1.max_texture_array_layers;
129 case PIPE_CAP_MIN_TEXEL_OFFSET:
130 return vscreen->caps.caps.v2.min_texel_offset;
131 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
132 return vscreen->caps.caps.v2.min_texture_gather_offset;
133 case PIPE_CAP_MAX_TEXEL_OFFSET:
134 return vscreen->caps.caps.v2.max_texel_offset;
135 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
136 return vscreen->caps.caps.v2.max_texture_gather_offset;
137 case PIPE_CAP_CONDITIONAL_RENDER:
138 return vscreen->caps.caps.v1.bset.conditional_render;
139 case PIPE_CAP_TEXTURE_BARRIER:
140 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
141 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
142 return 1;
143 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
144 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
145 return vscreen->caps.caps.v1.bset.color_clamping;
146 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
147 return 1;
148 case PIPE_CAP_GLSL_FEATURE_LEVEL:
149 return vscreen->caps.caps.v1.glsl_level;
150 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
151 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
152 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
153 return 0;
154 case PIPE_CAP_COMPUTE:
155 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
156 case PIPE_CAP_USER_VERTEX_BUFFERS:
157 return 0;
158 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
159 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
160 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
161 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
162 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
163 case PIPE_CAP_START_INSTANCE:
164 return vscreen->caps.caps.v1.bset.start_instance;
165 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
166 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
167 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
168 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
169 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
170 return 0;
171 case PIPE_CAP_QUERY_TIMESTAMP:
172 return 1;
173 case PIPE_CAP_QUERY_TIME_ELAPSED:
174 return 0;
175 case PIPE_CAP_TGSI_TEXCOORD:
176 return 0;
177 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
178 return VIRGL_MAP_BUFFER_ALIGNMENT;
179 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
180 return vscreen->caps.caps.v1.max_tbo_size > 0;
181 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
182 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
183 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
184 return 0;
185 case PIPE_CAP_CUBE_MAP_ARRAY:
186 return vscreen->caps.caps.v1.bset.cube_map_array;
187 case PIPE_CAP_TEXTURE_MULTISAMPLE:
188 return vscreen->caps.caps.v1.bset.texture_multisample;
189 case PIPE_CAP_MAX_VIEWPORTS:
190 return vscreen->caps.caps.v1.max_viewports;
191 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
192 return vscreen->caps.caps.v1.max_tbo_size;
193 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
194 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
195 case PIPE_CAP_ENDIANNESS:
196 return 0;
197 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
198 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
199 return 1;
200 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
201 return 0;
202 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
203 return vscreen->caps.caps.v2.max_geom_output_vertices;
204 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
205 return vscreen->caps.caps.v2.max_geom_total_output_components;
206 case PIPE_CAP_TEXTURE_QUERY_LOD:
207 return vscreen->caps.caps.v1.bset.texture_query_lod;
208 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
209 return vscreen->caps.caps.v1.max_texture_gather_components;
210 case PIPE_CAP_DRAW_INDIRECT:
211 return vscreen->caps.caps.v1.bset.has_indirect_draw;
212 case PIPE_CAP_SAMPLE_SHADING:
213 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
214 return vscreen->caps.caps.v1.bset.has_sample_shading;
215 case PIPE_CAP_CULL_DISTANCE:
216 return vscreen->caps.caps.v1.bset.has_cull;
217 case PIPE_CAP_MAX_VERTEX_STREAMS:
218 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
219 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
220 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
221 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
222 return vscreen->caps.caps.v1.bset.derivative_control;
223 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
224 return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
225 case PIPE_CAP_QUERY_SO_OVERFLOW:
226 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
227 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
228 return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
229 case PIPE_CAP_DOUBLES:
230 return vscreen->caps.caps.v1.bset.has_fp64;
231 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
232 return vscreen->caps.caps.v2.max_shader_patch_varyings;
233 case PIPE_CAP_SAMPLER_VIEW_TARGET:
234 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
235 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
236 return vscreen->caps.caps.v2.max_vertex_attrib_stride;
237 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
238 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
239 case PIPE_CAP_TGSI_TXQS:
240 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
241 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
242 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
243 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
244 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
245 case PIPE_CAP_TGSI_FS_FBFETCH:
246 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
247 case PIPE_CAP_TGSI_CLOCK:
248 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
249 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
250 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
251 case PIPE_CAP_TEXTURE_GATHER_SM5:
252 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
253 case PIPE_CAP_FAKE_SW_MSAA:
254 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
255 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
256 case PIPE_CAP_MULTI_DRAW_INDIRECT:
257 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
258 case PIPE_CAP_CLIP_HALFZ:
259 case PIPE_CAP_VERTEXID_NOBASE:
260 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
261 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
262 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
263 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
264 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
265 case PIPE_CAP_DEPTH_BOUNDS_TEST:
266 case PIPE_CAP_SHAREABLE_SHADERS:
267 case PIPE_CAP_CLEAR_TEXTURE:
268 case PIPE_CAP_DRAW_PARAMETERS:
269 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
270 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
271 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
272 case PIPE_CAP_INVALIDATE_BUFFER:
273 case PIPE_CAP_GENERATE_MIPMAP:
274 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
275 case PIPE_CAP_QUERY_BUFFER_OBJECT:
276 case PIPE_CAP_STRING_MARKER:
277 case PIPE_CAP_QUERY_MEMORY_INFO:
278 case PIPE_CAP_PCI_GROUP:
279 case PIPE_CAP_PCI_BUS:
280 case PIPE_CAP_PCI_DEVICE:
281 case PIPE_CAP_PCI_FUNCTION:
282 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
283 case PIPE_CAP_TGSI_VOTE:
284 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
285 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
286 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
287 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
288 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
289 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
290 case PIPE_CAP_INT64:
291 case PIPE_CAP_INT64_DIVMOD:
292 case PIPE_CAP_TGSI_TEX_TXF_LZ:
293 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
294 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
295 case PIPE_CAP_TGSI_BALLOT:
296 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
297 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
298 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
299 case PIPE_CAP_POST_DEPTH_COVERAGE:
300 case PIPE_CAP_BINDLESS_TEXTURE:
301 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
302 case PIPE_CAP_MEMOBJ:
303 case PIPE_CAP_LOAD_CONSTBUF:
304 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
305 case PIPE_CAP_TILE_RASTER_ORDER:
306 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
307 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
308 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
309 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
310 case PIPE_CAP_FENCE_SIGNAL:
311 case PIPE_CAP_CONSTBUF0_FLAGS:
312 case PIPE_CAP_PACKED_UNIFORMS:
313 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
314 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
315 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
316 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
317 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
318 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
319 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
320 return 0;
321 case PIPE_CAP_MAX_GS_INVOCATIONS:
322 return 32;
323 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
324 return 1 << 27;
325 case PIPE_CAP_VENDOR_ID:
326 return 0x1af4;
327 case PIPE_CAP_DEVICE_ID:
328 return 0x1010;
329 case PIPE_CAP_ACCELERATED:
330 return 1;
331 case PIPE_CAP_UMA:
332 case PIPE_CAP_VIDEO_MEMORY:
333 return 0;
334 case PIPE_CAP_NATIVE_FENCE_FD:
335 return 0;
336 default:
337 return u_pipe_screen_get_param_defaults(screen, param);
338 }
339 }
340
341 static int
342 virgl_get_shader_param(struct pipe_screen *screen,
343 enum pipe_shader_type shader,
344 enum pipe_shader_cap param)
345 {
346 struct virgl_screen *vscreen = virgl_screen(screen);
347
348 if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
349 !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
350 return 0;
351
352 if (shader == PIPE_SHADER_COMPUTE &&
353 !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
354 return 0;
355
356 switch(shader)
357 {
358 case PIPE_SHADER_FRAGMENT:
359 case PIPE_SHADER_VERTEX:
360 case PIPE_SHADER_GEOMETRY:
361 case PIPE_SHADER_TESS_CTRL:
362 case PIPE_SHADER_TESS_EVAL:
363 case PIPE_SHADER_COMPUTE:
364 switch (param) {
365 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
366 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
367 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
368 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
369 return INT_MAX;
370 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
371 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
372 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
373 return 1;
374 case PIPE_SHADER_CAP_MAX_INPUTS:
375 if (vscreen->caps.caps.v1.glsl_level < 150)
376 return vscreen->caps.caps.v2.max_vertex_attribs;
377 return (shader == PIPE_SHADER_VERTEX ||
378 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
379 case PIPE_SHADER_CAP_MAX_OUTPUTS:
380 if (shader == PIPE_SHADER_FRAGMENT)
381 return vscreen->caps.caps.v1.max_render_targets;
382 return vscreen->caps.caps.v2.max_vertex_outputs;
383 // case PIPE_SHADER_CAP_MAX_CONSTS:
384 // return 4096;
385 case PIPE_SHADER_CAP_MAX_TEMPS:
386 return 256;
387 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
388 return vscreen->caps.caps.v1.max_uniform_blocks;
389 // case PIPE_SHADER_CAP_MAX_ADDRS:
390 // return 1;
391 case PIPE_SHADER_CAP_SUBROUTINES:
392 return 1;
393 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
394 return 16;
395 case PIPE_SHADER_CAP_INTEGERS:
396 return vscreen->caps.caps.v1.glsl_level >= 130;
397 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
398 return 32;
399 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
400 return 4096 * sizeof(float[4]);
401 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
402 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
403 return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
404 else
405 return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
406 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
407 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
408 return vscreen->caps.caps.v2.max_shader_image_frag_compute;
409 else
410 return vscreen->caps.caps.v2.max_shader_image_other_stages;
411 case PIPE_SHADER_CAP_SUPPORTED_IRS:
412 return (1 << PIPE_SHADER_IR_TGSI);
413 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
414 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
415 case PIPE_SHADER_CAP_INT64_ATOMICS:
416 case PIPE_SHADER_CAP_FP16:
417 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
418 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
419 return 0;
420 case PIPE_SHADER_CAP_SCALAR_ISA:
421 return 1;
422 default:
423 return 0;
424 }
425 default:
426 return 0;
427 }
428 }
429
430 static float
431 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
432 {
433 struct virgl_screen *vscreen = virgl_screen(screen);
434 switch (param) {
435 case PIPE_CAPF_MAX_LINE_WIDTH:
436 return vscreen->caps.caps.v2.max_aliased_line_width;
437 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
438 return vscreen->caps.caps.v2.max_smooth_line_width;
439 case PIPE_CAPF_MAX_POINT_WIDTH:
440 return vscreen->caps.caps.v2.max_aliased_point_size;
441 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
442 return vscreen->caps.caps.v2.max_smooth_point_size;
443 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
444 return 16.0;
445 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
446 return vscreen->caps.caps.v2.max_texture_lod_bias;
447 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
448 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
449 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
450 return 0.0f;
451 }
452 /* should only get here on unhandled cases */
453 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
454 return 0.0;
455 }
456
457 static int
458 virgl_get_compute_param(struct pipe_screen *screen,
459 enum pipe_shader_ir ir_type,
460 enum pipe_compute_cap param,
461 void *ret)
462 {
463 struct virgl_screen *vscreen = virgl_screen(screen);
464 if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
465 return 0;
466 switch (param) {
467 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
468 if (ret) {
469 uint64_t *grid_size = ret;
470 grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
471 grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
472 grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
473 }
474 return 3 * sizeof(uint64_t) ;
475 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
476 if (ret) {
477 uint64_t *block_size = ret;
478 block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
479 block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
480 block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
481 }
482 return 3 * sizeof(uint64_t);
483 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
484 if (ret) {
485 uint64_t *max_threads_per_block = ret;
486 *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
487 }
488 return sizeof(uint64_t);
489 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
490 if (ret) {
491 uint64_t *max_local_size = ret;
492 /* Value reported by the closed source driver. */
493 *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
494 }
495 return sizeof(uint64_t);
496 default:
497 break;
498 }
499 return 0;
500 }
501
502 static boolean
503 virgl_is_vertex_format_supported(struct pipe_screen *screen,
504 enum pipe_format format)
505 {
506 struct virgl_screen *vscreen = virgl_screen(screen);
507 const struct util_format_description *format_desc;
508 int i;
509
510 format_desc = util_format_description(format);
511 if (!format_desc)
512 return FALSE;
513
514 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
515 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
516 int big = vformat / 32;
517 int small = vformat % 32;
518 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
519 return FALSE;
520 return TRUE;
521 }
522
523 /* Find the first non-VOID channel. */
524 for (i = 0; i < 4; i++) {
525 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
526 break;
527 }
528 }
529
530 if (i == 4)
531 return FALSE;
532
533 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
534 return FALSE;
535
536 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
537 return FALSE;
538 return TRUE;
539 }
540
541 /**
542 * Query format support for creating a texture, drawing surface, etc.
543 * \param format the format to test
544 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
545 */
546 static boolean
547 virgl_is_format_supported( struct pipe_screen *screen,
548 enum pipe_format format,
549 enum pipe_texture_target target,
550 unsigned sample_count,
551 unsigned storage_sample_count,
552 unsigned bind)
553 {
554 struct virgl_screen *vscreen = virgl_screen(screen);
555 const struct util_format_description *format_desc;
556 int i;
557
558 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
559 return false;
560
561 assert(target == PIPE_BUFFER ||
562 target == PIPE_TEXTURE_1D ||
563 target == PIPE_TEXTURE_1D_ARRAY ||
564 target == PIPE_TEXTURE_2D ||
565 target == PIPE_TEXTURE_2D_ARRAY ||
566 target == PIPE_TEXTURE_RECT ||
567 target == PIPE_TEXTURE_3D ||
568 target == PIPE_TEXTURE_CUBE ||
569 target == PIPE_TEXTURE_CUBE_ARRAY);
570
571 format_desc = util_format_description(format);
572 if (!format_desc)
573 return FALSE;
574
575 if (util_format_is_intensity(format))
576 return FALSE;
577
578 if (sample_count > 1) {
579 if (!vscreen->caps.caps.v1.bset.texture_multisample)
580 return FALSE;
581
582 if (bind & PIPE_BIND_SHADER_IMAGE) {
583 if (sample_count > vscreen->caps.caps.v2.max_image_samples)
584 return FALSE;
585 }
586
587 if (sample_count > vscreen->caps.caps.v1.max_samples)
588 return FALSE;
589 }
590
591 if (bind & PIPE_BIND_VERTEX_BUFFER) {
592 return virgl_is_vertex_format_supported(screen, format);
593 }
594
595 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
596 if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
597 format == PIPE_FORMAT_R32G32B32_SINT ||
598 format == PIPE_FORMAT_R32G32B32_UINT) &&
599 target != PIPE_BUFFER)
600 return FALSE;
601
602 if (bind & PIPE_BIND_RENDER_TARGET) {
603 /* For ARB_framebuffer_no_attachments. */
604 if (format == PIPE_FORMAT_NONE)
605 return TRUE;
606
607 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
608 return FALSE;
609
610 /*
611 * Although possible, it is unnatural to render into compressed or YUV
612 * surfaces. So disable these here to avoid going into weird paths
613 * inside the state trackers.
614 */
615 if (format_desc->block.width != 1 ||
616 format_desc->block.height != 1)
617 return FALSE;
618
619 {
620 int big = format / 32;
621 int small = format % 32;
622 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
623 return FALSE;
624 }
625 }
626
627 if (bind & PIPE_BIND_DEPTH_STENCIL) {
628 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
629 return FALSE;
630 }
631
632 /*
633 * All other operations (sampling, transfer, etc).
634 */
635
636 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
637 goto out_lookup;
638 }
639 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
640 goto out_lookup;
641 }
642 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
643 goto out_lookup;
644 }
645
646 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
647 goto out_lookup;
648 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
649 goto out_lookup;
650 }
651
652 /* Find the first non-VOID channel. */
653 for (i = 0; i < 4; i++) {
654 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
655 break;
656 }
657 }
658
659 if (i == 4)
660 return FALSE;
661
662 /* no L4A4 */
663 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
664 return FALSE;
665
666 out_lookup:
667 {
668 int big = format / 32;
669 int small = format % 32;
670 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
671 return FALSE;
672 }
673 /*
674 * Everything else should be supported by u_format.
675 */
676 return TRUE;
677 }
678
679 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
680 struct pipe_resource *res,
681 unsigned level, unsigned layer,
682 void *winsys_drawable_handle, struct pipe_box *sub_box)
683 {
684 struct virgl_screen *vscreen = virgl_screen(screen);
685 struct virgl_winsys *vws = vscreen->vws;
686 struct virgl_resource *vres = virgl_resource(res);
687
688 if (vws->flush_frontbuffer)
689 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
690 sub_box);
691 }
692
693 static void virgl_fence_reference(struct pipe_screen *screen,
694 struct pipe_fence_handle **ptr,
695 struct pipe_fence_handle *fence)
696 {
697 struct virgl_screen *vscreen = virgl_screen(screen);
698 struct virgl_winsys *vws = vscreen->vws;
699
700 vws->fence_reference(vws, ptr, fence);
701 }
702
703 static boolean virgl_fence_finish(struct pipe_screen *screen,
704 struct pipe_context *ctx,
705 struct pipe_fence_handle *fence,
706 uint64_t timeout)
707 {
708 struct virgl_screen *vscreen = virgl_screen(screen);
709 struct virgl_winsys *vws = vscreen->vws;
710
711 return vws->fence_wait(vws, fence, timeout);
712 }
713
714 static uint64_t
715 virgl_get_timestamp(struct pipe_screen *_screen)
716 {
717 return os_time_get_nano();
718 }
719
720 static void
721 virgl_destroy_screen(struct pipe_screen *screen)
722 {
723 struct virgl_screen *vscreen = virgl_screen(screen);
724 struct virgl_winsys *vws = vscreen->vws;
725
726 slab_destroy_parent(&vscreen->texture_transfer_pool);
727
728 if (vws)
729 vws->destroy(vws);
730 FREE(vscreen);
731 }
732
733 struct pipe_screen *
734 virgl_create_screen(struct virgl_winsys *vws)
735 {
736 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
737
738 if (!screen)
739 return NULL;
740
741 virgl_debug = debug_get_option_virgl_debug();
742
743 screen->vws = vws;
744 screen->base.get_name = virgl_get_name;
745 screen->base.get_vendor = virgl_get_vendor;
746 screen->base.get_param = virgl_get_param;
747 screen->base.get_shader_param = virgl_get_shader_param;
748 screen->base.get_compute_param = virgl_get_compute_param;
749 screen->base.get_paramf = virgl_get_paramf;
750 screen->base.is_format_supported = virgl_is_format_supported;
751 screen->base.destroy = virgl_destroy_screen;
752 screen->base.context_create = virgl_context_create;
753 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
754 screen->base.get_timestamp = virgl_get_timestamp;
755 screen->base.fence_reference = virgl_fence_reference;
756 //screen->base.fence_signalled = virgl_fence_signalled;
757 screen->base.fence_finish = virgl_fence_finish;
758
759 virgl_init_screen_resource_functions(&screen->base);
760
761 vws->get_caps(vws, &screen->caps);
762
763 screen->refcnt = 1;
764
765 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
766
767 return &screen->base;
768 }