src/gallium/drivers/zink/zink_compiler.c

   1 /*
   2  * Copyright 2018 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "zink_context.h"
  25 #include "zink_compiler.h"
  26 #include "zink_program.h"
  27 #include "zink_screen.h"
  28 #include "nir_to_spirv/nir_to_spirv.h"
  29
  30 #include "pipe/p_state.h"
  31
  32 #include "nir.h"
  33 #include "compiler/nir/nir_builder.h"
  34
  35 #include "nir/tgsi_to_nir.h"
  36 #include "tgsi/tgsi_dump.h"
  37 #include "tgsi/tgsi_from_mesa.h"
  38
  39 #include "util/u_memory.h"
  40
  41 static bool
  42 lower_discard_if_instr(nir_intrinsic_instr *instr, nir_builder *b)
  43 {
  44    if (instr->intrinsic == nir_intrinsic_discard_if) {
  45       b->cursor = nir_before_instr(&instr->instr);
  46
  47       nir_if *if_stmt = nir_push_if(b, nir_ssa_for_src(b, instr->src[0], 1));
  48       nir_intrinsic_instr *discard =
  49          nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard);
  50       nir_builder_instr_insert(b, &discard->instr);
  51       nir_pop_if(b, if_stmt);
  52       nir_instr_remove(&instr->instr);
  53       return true;
  54    }
  55    /* a shader like this (shaders@glsl-fs-discard-04):
  56
  57       uniform int j, k;
  58
  59       void main()
  60       {
  61        for (int i = 0; i < j; i++) {
  62         if (i > k)
  63          continue;
  64         discard;
  65        }
  66        gl_FragColor = vec4(0.0, 1.0, 0.0, 0.0);
  67       }
  68
  69
  70
  71       will generate nir like:
  72
  73       loop   {
  74          //snip
  75          if   ssa_11   {
  76             block   block_5:
  77             /   preds:   block_4   /
  78             vec1   32   ssa_17   =   iadd   ssa_50,   ssa_31
  79             /   succs:   block_7   /
  80          }   else   {
  81             block   block_6:
  82             /   preds:   block_4   /
  83             intrinsic   discard   ()   () <-- not last instruction
  84             vec1   32   ssa_23   =   iadd   ssa_50,   ssa_31 <-- dead code loop itr increment
  85             /   succs:   block_7   /
  86          }
  87          //snip
  88       }
  89
  90       which means that we can't assert like this:
  91
  92       assert(instr->intrinsic != nir_intrinsic_discard ||
  93              nir_block_last_instr(instr->instr.block) == &instr->instr);
  94
  95
  96       and it's unnecessary anyway since post-vtn optimizing will dce the instructions following the discard
  97     */
  98
  99    return false;
 100 }
 101
 102 static bool
 103 lower_discard_if(nir_shader *shader)
 104 {
 105    bool progress = false;
 106
 107    nir_foreach_function(function, shader) {
 108       if (function->impl) {
 109          nir_builder builder;
 110          nir_builder_init(&builder, function->impl);
 111          nir_foreach_block(block, function->impl) {
 112             nir_foreach_instr_safe(instr, block) {
 113                if (instr->type == nir_instr_type_intrinsic)
 114                   progress |= lower_discard_if_instr(
 115                                                   nir_instr_as_intrinsic(instr),
 116                                                   &builder);
 117             }
 118          }
 119
 120          nir_metadata_preserve(function->impl, nir_metadata_dominance);
 121       }
 122    }
 123
 124    return progress;
 125 }
 126
 127 static const struct nir_shader_compiler_options nir_options = {
 128    .lower_all_io_to_temps = true,
 129    .lower_ffma = true,
 130    .lower_fdph = true,
 131    .lower_flrp32 = true,
 132    .lower_fpow = true,
 133    .lower_fsat = true,
 134    .lower_extract_byte = true,
 135    .lower_extract_word = true,
 136    .lower_mul_high = true,
 137    .lower_rotate = true,
 138    .lower_uadd_carry = true,
 139 };
 140
 141 const void *
 142 zink_get_compiler_options(struct pipe_screen *screen,
 143                           enum pipe_shader_ir ir,
 144                           enum pipe_shader_type shader)
 145 {
 146    assert(ir == PIPE_SHADER_IR_NIR);
 147    return &nir_options;
 148 }
 149
 150 struct nir_shader *
 151 zink_tgsi_to_nir(struct pipe_screen *screen, const struct tgsi_token *tokens)
 152 {
 153    if (zink_debug & ZINK_DEBUG_TGSI) {
 154       fprintf(stderr, "TGSI shader:\n---8<---\n");
 155       tgsi_dump_to_file(tokens, 0, stderr);
 156       fprintf(stderr, "---8<---\n\n");
 157    }
 158
 159    return tgsi_to_nir(tokens, screen, false);
 160 }
 161
 162 static void
 163 optimize_nir(struct nir_shader *s)
 164 {
 165    bool progress;
 166    do {
 167       progress = false;
 168       NIR_PASS_V(s, nir_lower_vars_to_ssa);
 169       NIR_PASS(progress, s, nir_copy_prop);
 170       NIR_PASS(progress, s, nir_opt_remove_phis);
 171       NIR_PASS(progress, s, nir_opt_dce);
 172       NIR_PASS(progress, s, nir_opt_dead_cf);
 173       NIR_PASS(progress, s, nir_opt_cse);
 174       NIR_PASS(progress, s, nir_opt_peephole_select, 8, true, true);
 175       NIR_PASS(progress, s, nir_opt_algebraic);
 176       NIR_PASS(progress, s, nir_opt_constant_folding);
 177       NIR_PASS(progress, s, nir_opt_undef);
 178       NIR_PASS(progress, s, zink_nir_lower_b2b);
 179    } while (progress);
 180 }
 181
 182 /* check for a genuine gl_PointSize output vs one from nir_lower_point_size_mov */
 183 static bool
 184 check_psiz(struct nir_shader *s)
 185 {
 186    nir_foreach_shader_out_variable(var, s) {
 187       if (var->data.location == VARYING_SLOT_PSIZ) {
 188          /* genuine PSIZ outputs will have this set */
 189          return !!var->data.explicit_location;
 190       }
 191    }
 192    return false;
 193 }
 194
 195 /* semi-copied from iris */
 196 static void
 197 update_so_info(struct zink_shader *sh,
 198                uint64_t outputs_written, bool have_psiz)
 199 {
 200    uint8_t reverse_map[64] = {};
 201    unsigned slot = 0;
 202    while (outputs_written) {
 203       int bit = u_bit_scan64(&outputs_written);
 204       /* PSIZ from nir_lower_point_size_mov breaks stream output, so always skip it */
 205       if (bit == VARYING_SLOT_PSIZ && !have_psiz)
 206          continue;
 207       reverse_map[slot++] = bit;
 208    }
 209
 210    for (unsigned i = 0; i < sh->streamout.so_info.num_outputs; i++) {
 211       struct pipe_stream_output *output = &sh->streamout.so_info.output[i];
 212       /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
 213       sh->streamout.so_info_slots[i] = reverse_map[output->register_index];
 214    }
 215 }
 216
 217 VkShaderModule
 218 zink_shader_compile(struct zink_screen *screen, struct zink_shader *zs)
 219 {
 220    VkShaderModule mod = NULL;
 221    void *streamout = zs->streamout.so_info_slots ? &zs->streamout : NULL;
 222    struct spirv_shader *spirv = nir_to_spirv(zs->nir, streamout);
 223    assert(spirv);
 224
 225    if (zink_debug & ZINK_DEBUG_SPIRV) {
 226       char buf[256];
 227       static int i;
 228       snprintf(buf, sizeof(buf), "dump%02d.spv", i++);
 229       FILE *fp = fopen(buf, "wb");
 230       if (fp) {
 231          fwrite(spirv->words, sizeof(uint32_t), spirv->num_words, fp);
 232          fclose(fp);
 233          fprintf(stderr, "wrote '%s'...\n", buf);
 234       }
 235    }
 236
 237    VkShaderModuleCreateInfo smci = {};
 238    smci.sType = VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO;
 239    smci.codeSize = spirv->num_words * sizeof(uint32_t);
 240    smci.pCode = spirv->words;
 241
 242    if (vkCreateShaderModule(screen->dev, &smci, NULL, &mod) != VK_SUCCESS)
 243       mod = NULL;
 244
 245    /* TODO: determine if there's any reason to cache spirv output? */
 246    free(spirv->words);
 247    free(spirv);
 248    return mod;
 249 }
 250
 251 struct zink_shader *
 252 zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
 253                    const struct pipe_stream_output_info *so_info)
 254 {
 255    struct zink_shader *ret = CALLOC_STRUCT(zink_shader);
 256    bool have_psiz = false;
 257
 258    ret->programs = _mesa_pointer_set_create(NULL);
 259
 260    NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 1);
 261    NIR_PASS_V(nir, nir_lower_clip_halfz);
 262    if (nir->info.stage == MESA_SHADER_VERTEX)
 263       have_psiz = check_psiz(nir);
 264    NIR_PASS_V(nir, nir_lower_regs_to_ssa);
 265    optimize_nir(nir);
 266    NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
 267    NIR_PASS_V(nir, lower_discard_if);
 268    NIR_PASS_V(nir, nir_lower_fragcolor);
 269    NIR_PASS_V(nir, nir_convert_from_ssa, true);
 270
 271    if (zink_debug & ZINK_DEBUG_NIR) {
 272       fprintf(stderr, "NIR shader:\n---8<---\n");
 273       nir_print_shader(nir, stderr);
 274       fprintf(stderr, "---8<---\n");
 275    }
 276
 277    ret->num_bindings = 0;
 278    nir_foreach_variable_with_modes(var, nir, nir_var_uniform |
 279                                              nir_var_mem_ubo) {
 280       if (var->data.mode == nir_var_mem_ubo) {
 281          int binding = zink_binding(nir->info.stage,
 282                                     VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER,
 283                                     var->data.binding);
 284          ret->bindings[ret->num_bindings].index = var->data.binding;
 285          ret->bindings[ret->num_bindings].binding = binding;
 286          ret->bindings[ret->num_bindings].type = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER;
 287          ret->num_bindings++;
 288       } else {
 289          assert(var->data.mode == nir_var_uniform);
 290          if (glsl_type_is_array(var->type) &&
 291              glsl_type_is_sampler(glsl_get_array_element(var->type))) {
 292             for (int i = 0; i < glsl_get_length(var->type); ++i) {
 293                int binding = zink_binding(nir->info.stage,
 294                                           VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER,
 295                                           var->data.binding + i);
 296                ret->bindings[ret->num_bindings].index = var->data.binding + i;
 297                ret->bindings[ret->num_bindings].binding = binding;
 298                ret->bindings[ret->num_bindings].type = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER;
 299                ret->num_bindings++;
 300             }
 301          } else if (glsl_type_is_sampler(var->type)) {
 302             int binding = zink_binding(nir->info.stage,
 303                                        VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER,
 304                                        var->data.binding);
 305             ret->bindings[ret->num_bindings].index = var->data.binding;
 306             ret->bindings[ret->num_bindings].binding = binding;
 307             ret->bindings[ret->num_bindings].type = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER;
 308             ret->num_bindings++;
 309          }
 310       }
 311    }
 312
 313    ret->nir = nir;
 314    if (so_info) {
 315       memcpy(&ret->streamout.so_info, so_info, sizeof(struct pipe_stream_output_info));
 316       ret->streamout.so_info_slots = malloc(so_info->num_outputs * sizeof(unsigned int));
 317       assert(ret->streamout.so_info_slots);
 318       update_so_info(ret, nir->info.outputs_written, have_psiz);
 319    }
 320
 321    return ret;
 322 }
 323
 324 void
 325 zink_shader_free(struct zink_context *ctx, struct zink_shader *shader)
 326 {
 327    struct zink_screen *screen = zink_screen(ctx->base.screen);
 328    set_foreach(shader->programs, entry) {
 329       struct zink_gfx_program *prog = (void*)entry->key;
 330       _mesa_hash_table_remove_key(ctx->program_cache, prog->shaders);
 331       prog->shaders[pipe_shader_type_from_mesa(shader->nir->info.stage)] = NULL;
 332       zink_gfx_program_reference(screen, &prog, NULL);
 333    }
 334    _mesa_set_destroy(shader->programs, NULL);
 335    free(shader->streamout.so_info_slots);
 336    ralloc_free(shader->nir);
 337    FREE(shader);
 338 }