zink: do advertize integer support in shaders
[mesa.git] / src / gallium / drivers / zink / zink_screen.c
1 /*
2 * Copyright 2018 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "zink_screen.h"
25
26 #include "zink_compiler.h"
27 #include "zink_context.h"
28 #include "zink_fence.h"
29 #include "zink_public.h"
30 #include "zink_resource.h"
31
32 #include "os/os_process.h"
33 #include "util/u_debug.h"
34 #include "util/u_format.h"
35 #include "util/u_math.h"
36 #include "util/u_memory.h"
37 #include "util/u_screen.h"
38 #include "util/u_string.h"
39
40 #include "state_tracker/sw_winsys.h"
41
42 static const struct debug_named_value
43 debug_options[] = {
44 { "nir", ZINK_DEBUG_NIR, "Dump NIR during program compile" },
45 { "spirv", ZINK_DEBUG_SPIRV, "Dump SPIR-V during program compile" },
46 { "tgsi", ZINK_DEBUG_TGSI, "Dump TGSI during program compile" },
47 DEBUG_NAMED_VALUE_END
48 };
49
50 DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug, "ZINK_DEBUG", debug_options, 0)
51
52 uint32_t
53 zink_debug;
54
55 static const char *
56 zink_get_vendor(struct pipe_screen *pscreen)
57 {
58 return "Collabora Ltd";
59 }
60
61 static const char *
62 zink_get_device_vendor(struct pipe_screen *pscreen)
63 {
64 struct zink_screen *screen = zink_screen(pscreen);
65 static char buf[1000];
66 snprintf(buf, sizeof(buf), "Unknown (vendor-id: 0x%04x)", screen->props.vendorID);
67 return buf;
68 }
69
70 static const char *
71 zink_get_name(struct pipe_screen *pscreen)
72 {
73 struct zink_screen *screen = zink_screen(pscreen);
74 static char buf[1000];
75 snprintf(buf, sizeof(buf), "zink (%s)", screen->props.deviceName);
76 return buf;
77 }
78
79 static int
80 get_video_mem(struct zink_screen *screen)
81 {
82 VkDeviceSize size = 0;
83 for (uint32_t i = 0; i < screen->mem_props.memoryHeapCount; ++i)
84 size += screen->mem_props.memoryHeaps[i].size;
85 return (int)(size >> 20);
86 }
87
88 static int
89 zink_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
90 {
91 struct zink_screen *screen = zink_screen(pscreen);
92
93 switch (param) {
94 case PIPE_CAP_NPOT_TEXTURES:
95 return 1;
96
97 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
98 return screen->props.limits.maxFragmentDualSrcAttachments;
99
100 case PIPE_CAP_POINT_SPRITE:
101 return 1;
102
103 case PIPE_CAP_MAX_RENDER_TARGETS:
104 return screen->props.limits.maxColorAttachments;
105
106 case PIPE_CAP_OCCLUSION_QUERY:
107 return 1;
108
109 #if 0 /* TODO: Enable me */
110 case PIPE_CAP_QUERY_TIME_ELAPSED:
111 return 1;
112 #endif
113
114 case PIPE_CAP_TEXTURE_SWIZZLE:
115 return 1;
116
117 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
118 return screen->props.limits.maxImageDimension2D;
119 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
120 return 1 + util_logbase2(screen->props.limits.maxImageDimension3D);
121 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
122 return 1 + util_logbase2(screen->props.limits.maxImageDimensionCube);
123
124 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
125 return 1;
126
127 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
128 return 0; /* TODO: re-enable after implementing nir_texop_txd */
129
130 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
131 case PIPE_CAP_VERTEX_SHADER_SATURATE:
132 return 1;
133
134 case PIPE_CAP_INDEP_BLEND_ENABLE:
135 case PIPE_CAP_INDEP_BLEND_FUNC:
136 return 1;
137
138 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
139 return screen->props.limits.maxImageArrayLayers;
140
141 #if 0 /* TODO: Enable me */
142 case PIPE_CAP_DEPTH_CLIP_DISABLE:
143 return 0;
144 #endif
145
146 #if 0 /* TODO: Enable me */
147 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
148 return 1;
149 #endif
150
151 case PIPE_CAP_SEAMLESS_CUBE_MAP:
152 return 1;
153
154 case PIPE_CAP_MIN_TEXEL_OFFSET:
155 return screen->props.limits.minTexelOffset;
156 case PIPE_CAP_MAX_TEXEL_OFFSET:
157 return screen->props.limits.maxTexelOffset;
158
159 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
160 return 1;
161
162 case PIPE_CAP_GLSL_FEATURE_LEVEL:
163 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
164 return 120;
165
166 #if 0 /* TODO: Enable me */
167 case PIPE_CAP_COMPUTE:
168 return 1;
169 #endif
170
171 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
172 return screen->props.limits.minUniformBufferOffsetAlignment;
173
174 #if 0 /* TODO: Enable me */
175 case PIPE_CAP_QUERY_TIMESTAMP:
176 return 1;
177 #endif
178
179 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
180 return screen->props.limits.minMemoryMapAlignment;
181
182 case PIPE_CAP_CUBE_MAP_ARRAY:
183 return screen->feats.imageCubeArray;
184
185 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
186 return 0; /* unsure */
187
188 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
189 return screen->props.limits.maxTexelBufferElements;
190
191 case PIPE_CAP_ENDIANNESS:
192 return PIPE_ENDIAN_NATIVE; /* unsure */
193
194 case PIPE_CAP_MAX_VIEWPORTS:
195 return screen->props.limits.maxViewports;
196
197 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
198 return 1;
199
200 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
201 return screen->props.limits.maxGeometryOutputVertices;
202 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
203 return screen->props.limits.maxGeometryOutputComponents;
204
205 #if 0 /* TODO: Enable me. Enables ARB_texture_gather */
206 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
207 return 4;
208 #endif
209
210 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
211 return screen->props.limits.minTexelGatherOffset;
212 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
213 return screen->props.limits.maxTexelGatherOffset;
214
215 case PIPE_CAP_VENDOR_ID:
216 return screen->props.vendorID;
217 case PIPE_CAP_DEVICE_ID:
218 return screen->props.deviceID;
219
220 case PIPE_CAP_ACCELERATED:
221 return 1;
222 case PIPE_CAP_VIDEO_MEMORY:
223 return get_video_mem(screen);
224 case PIPE_CAP_UMA:
225 return screen->props.deviceType == VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
226
227 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
228 return screen->props.limits.maxVertexInputBindingStride;
229
230 #if 0 /* TODO: Enable me */
231 case PIPE_CAP_SAMPLER_VIEW_TARGET:
232 return 1;
233 #endif
234
235 #if 0 /* TODO: Enable me */
236 case PIPE_CAP_CLIP_HALFZ:
237 return 1;
238 #endif
239
240 #if 0 /* TODO: Enable me */
241 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
242 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
243 return 1;
244 #endif
245
246 case PIPE_CAP_SHAREABLE_SHADERS:
247 return 1;
248
249 #if 0 /* TODO: Enable me. Enables GL_ARB_shader_storage_buffer_object */
250 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
251 return screen->props.limits.minStorageBufferOffsetAlignment;
252 #endif
253
254 case PIPE_CAP_PCI_GROUP:
255 case PIPE_CAP_PCI_BUS:
256 case PIPE_CAP_PCI_DEVICE:
257 case PIPE_CAP_PCI_FUNCTION:
258 return 0; /* TODO: figure these out */
259
260 #if 0 /* TODO: Enable me */
261 case PIPE_CAP_CULL_DISTANCE:
262 return screen->feats.shaderCullDistance;
263 #endif
264
265 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
266 return screen->props.limits.viewportSubPixelBits;
267
268 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
269 return 0; /* not sure */
270
271 case PIPE_CAP_MAX_GS_INVOCATIONS:
272 return 0; /* not implemented */
273
274 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
275 return screen->props.limits.maxDescriptorSetStorageBuffers;
276
277 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
278 return screen->props.limits.maxStorageBufferRange; /* unsure */
279
280 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
281 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
282 return 1;
283
284 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
285 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
286 return 0;
287
288 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
289 return 0;
290
291 case PIPE_CAP_NIR_COMPACT_ARRAYS:
292 return 1;
293
294 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
295 return 1;
296
297 case PIPE_CAP_FLATSHADE:
298 case PIPE_CAP_ALPHA_TEST:
299 case PIPE_CAP_CLIP_PLANES:
300 case PIPE_CAP_POINT_SIZE_FIXED:
301 case PIPE_CAP_TWO_SIDED_COLOR:
302 return 0;
303
304 case PIPE_CAP_DMABUF:
305 return screen->have_KHR_external_memory_fd;
306
307 default:
308 return u_pipe_screen_get_param_defaults(pscreen, param);
309 }
310 }
311
312 static float
313 zink_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
314 {
315 struct zink_screen *screen = zink_screen(pscreen);
316
317 switch (param) {
318 case PIPE_CAPF_MAX_LINE_WIDTH:
319 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
320 return screen->props.limits.lineWidthRange[1];
321
322 case PIPE_CAPF_MAX_POINT_WIDTH:
323 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
324 return screen->props.limits.pointSizeRange[1];
325
326 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
327 return screen->props.limits.maxSamplerAnisotropy;
328
329 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
330 return screen->props.limits.maxSamplerLodBias;
331
332 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
333 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
334 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
335 return 0.0f; /* not implemented */
336 }
337
338 /* should only get here on unhandled cases */
339 return 0.0;
340 }
341
342 static int
343 zink_get_shader_param(struct pipe_screen *pscreen,
344 enum pipe_shader_type shader,
345 enum pipe_shader_cap param)
346 {
347 struct zink_screen *screen = zink_screen(pscreen);
348
349 switch (param) {
350 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
351 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
352 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
353 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
354 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
355 if (shader == PIPE_SHADER_VERTEX ||
356 shader == PIPE_SHADER_FRAGMENT)
357 return INT_MAX;
358 return 0;
359
360 case PIPE_SHADER_CAP_MAX_INPUTS:
361 switch (shader) {
362 case PIPE_SHADER_VERTEX:
363 return MIN2(screen->props.limits.maxVertexInputAttributes,
364 PIPE_MAX_SHADER_INPUTS);
365 case PIPE_SHADER_FRAGMENT:
366 return MIN2(screen->props.limits.maxFragmentInputComponents / 4,
367 PIPE_MAX_SHADER_INPUTS);
368 default:
369 return 0; /* unsupported stage */
370 }
371
372 case PIPE_SHADER_CAP_MAX_OUTPUTS:
373 switch (shader) {
374 case PIPE_SHADER_VERTEX:
375 return MIN2(screen->props.limits.maxVertexOutputComponents / 4,
376 PIPE_MAX_SHADER_OUTPUTS);
377 case PIPE_SHADER_FRAGMENT:
378 return MIN2(screen->props.limits.maxColorAttachments,
379 PIPE_MAX_SHADER_OUTPUTS);
380 default:
381 return 0; /* unsupported stage */
382 }
383
384 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
385 /* this might be a bit simplistic... */
386 return MIN2(screen->props.limits.maxPerStageDescriptorSamplers,
387 PIPE_MAX_SAMPLERS);
388
389 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
390 return MIN2(screen->props.limits.maxUniformBufferRange, INT_MAX);
391
392 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
393 return screen->props.limits.maxPerStageDescriptorUniformBuffers;
394
395 case PIPE_SHADER_CAP_MAX_TEMPS:
396 return INT_MAX;
397
398 case PIPE_SHADER_CAP_INTEGERS:
399 return 1;
400
401 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
402 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
403 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
404 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
405 case PIPE_SHADER_CAP_SUBROUTINES:
406 case PIPE_SHADER_CAP_INT64_ATOMICS:
407 case PIPE_SHADER_CAP_FP16:
408 return 0; /* not implemented */
409
410 case PIPE_SHADER_CAP_PREFERRED_IR:
411 return PIPE_SHADER_IR_NIR;
412
413 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
414 return 0; /* not implemented */
415
416 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
417 return MIN2(screen->props.limits.maxPerStageDescriptorSampledImages,
418 PIPE_MAX_SHADER_SAMPLER_VIEWS);
419
420 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
421 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
422 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
423 return 0; /* not implemented */
424
425 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
426 return 0; /* no idea */
427
428 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
429 return 32; /* arbitrary */
430
431 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
432 /* TODO: this limitation is dumb, and will need some fixes in mesa */
433 return MIN2(screen->props.limits.maxPerStageDescriptorStorageBuffers, 8);
434
435 case PIPE_SHADER_CAP_SUPPORTED_IRS:
436 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
437
438 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
439 return MIN2(screen->props.limits.maxPerStageDescriptorStorageImages,
440 PIPE_MAX_SHADER_IMAGES);
441
442 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
443 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
444 return 0; /* unsure */
445
446 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
447 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
448 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
449 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
450 return 0; /* not implemented */
451 }
452
453 /* should only get here on unhandled cases */
454 return 0;
455 }
456
457 static const VkFormat formats[PIPE_FORMAT_COUNT] = {
458 #define MAP_FORMAT_NORM(FMT) \
459 [PIPE_FORMAT_ ## FMT ## _UNORM] = VK_FORMAT_ ## FMT ## _UNORM, \
460 [PIPE_FORMAT_ ## FMT ## _SNORM] = VK_FORMAT_ ## FMT ## _SNORM,
461
462 #define MAP_FORMAT_SCALED(FMT) \
463 [PIPE_FORMAT_ ## FMT ## _USCALED] = VK_FORMAT_ ## FMT ## _USCALED, \
464 [PIPE_FORMAT_ ## FMT ## _SSCALED] = VK_FORMAT_ ## FMT ## _SSCALED,
465
466 #define MAP_FORMAT_INT(FMT) \
467 [PIPE_FORMAT_ ## FMT ## _UINT] = VK_FORMAT_ ## FMT ## _UINT, \
468 [PIPE_FORMAT_ ## FMT ## _SINT] = VK_FORMAT_ ## FMT ## _SINT,
469
470 #define MAP_FORMAT_SRGB(FMT) \
471 [PIPE_FORMAT_ ## FMT ## _SRGB] = VK_FORMAT_ ## FMT ## _SRGB,
472
473 #define MAP_FORMAT_FLOAT(FMT) \
474 [PIPE_FORMAT_ ## FMT ## _FLOAT] = VK_FORMAT_ ## FMT ## _SFLOAT,
475
476 // one component
477
478 // 8-bits
479 MAP_FORMAT_NORM(R8)
480 MAP_FORMAT_SCALED(R8)
481 MAP_FORMAT_INT(R8)
482 // 16-bits
483 MAP_FORMAT_NORM(R16)
484 MAP_FORMAT_SCALED(R16)
485 MAP_FORMAT_INT(R16)
486 MAP_FORMAT_FLOAT(R16)
487 // 32-bits
488 MAP_FORMAT_INT(R32)
489 MAP_FORMAT_FLOAT(R32)
490
491 // two components
492
493 // 8-bits
494 MAP_FORMAT_NORM(R8G8)
495 MAP_FORMAT_SCALED(R8G8)
496 MAP_FORMAT_INT(R8G8)
497 // 16-bits
498 MAP_FORMAT_NORM(R16G16)
499 MAP_FORMAT_SCALED(R16G16)
500 MAP_FORMAT_INT(R16G16)
501 MAP_FORMAT_FLOAT(R16G16)
502 // 32-bits
503 MAP_FORMAT_INT(R32G32)
504 MAP_FORMAT_FLOAT(R32G32)
505
506 // three components
507
508 // 8-bits
509 MAP_FORMAT_NORM(R8G8B8)
510 MAP_FORMAT_SCALED(R8G8B8)
511 MAP_FORMAT_INT(R8G8B8)
512 MAP_FORMAT_SRGB(R8G8B8)
513 // 16-bits
514 MAP_FORMAT_NORM(R16G16B16)
515 MAP_FORMAT_SCALED(R16G16B16)
516 MAP_FORMAT_INT(R16G16B16)
517 MAP_FORMAT_FLOAT(R16G16B16)
518 // 32-bits
519 MAP_FORMAT_INT(R32G32B32)
520 MAP_FORMAT_FLOAT(R32G32B32)
521
522 // four components
523
524 // 8-bits
525 MAP_FORMAT_NORM(R8G8B8A8)
526 MAP_FORMAT_SCALED(R8G8B8A8)
527 MAP_FORMAT_INT(R8G8B8A8)
528 MAP_FORMAT_SRGB(R8G8B8A8)
529 [PIPE_FORMAT_B8G8R8A8_UNORM] = VK_FORMAT_B8G8R8A8_UNORM,
530 [PIPE_FORMAT_B8G8R8X8_UNORM] = VK_FORMAT_B8G8R8A8_UNORM,
531 MAP_FORMAT_SRGB(B8G8R8A8)
532 [PIPE_FORMAT_A8B8G8R8_SRGB] = VK_FORMAT_A8B8G8R8_SRGB_PACK32,
533 // 16-bits
534 MAP_FORMAT_NORM(R16G16B16A16)
535 MAP_FORMAT_SCALED(R16G16B16A16)
536 MAP_FORMAT_INT(R16G16B16A16)
537 MAP_FORMAT_FLOAT(R16G16B16A16)
538 // 32-bits
539 MAP_FORMAT_INT(R32G32B32A32)
540 MAP_FORMAT_FLOAT(R32G32B32A32)
541
542 // other color formats
543 [PIPE_FORMAT_B5G6R5_UNORM] = VK_FORMAT_R5G6B5_UNORM_PACK16,
544 [PIPE_FORMAT_B5G5R5A1_UNORM] = VK_FORMAT_B5G5R5A1_UNORM_PACK16,
545 [PIPE_FORMAT_R11G11B10_FLOAT] = VK_FORMAT_B10G11R11_UFLOAT_PACK32,
546 [PIPE_FORMAT_R9G9B9E5_FLOAT] = VK_FORMAT_E5B9G9R9_UFLOAT_PACK32,
547 [PIPE_FORMAT_R10G10B10A2_UNORM] = VK_FORMAT_A2B10G10R10_UNORM_PACK32,
548 [PIPE_FORMAT_B10G10R10A2_UNORM] = VK_FORMAT_A2R10G10B10_UNORM_PACK32,
549 [PIPE_FORMAT_R10G10B10A2_UINT] = VK_FORMAT_A2B10G10R10_UINT_PACK32,
550 [PIPE_FORMAT_B10G10R10A2_UINT] = VK_FORMAT_A2R10G10B10_UINT_PACK32,
551
552 // depth/stencil formats
553 [PIPE_FORMAT_Z32_FLOAT] = VK_FORMAT_D32_SFLOAT,
554 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = VK_FORMAT_D32_SFLOAT_S8_UINT,
555 [PIPE_FORMAT_Z16_UNORM] = VK_FORMAT_D16_UNORM,
556 [PIPE_FORMAT_X8Z24_UNORM] = VK_FORMAT_X8_D24_UNORM_PACK32,
557 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = VK_FORMAT_D24_UNORM_S8_UINT,
558
559 // compressed formats
560 [PIPE_FORMAT_DXT1_RGB] = VK_FORMAT_BC1_RGB_UNORM_BLOCK,
561 [PIPE_FORMAT_DXT1_RGBA] = VK_FORMAT_BC1_RGBA_UNORM_BLOCK,
562 [PIPE_FORMAT_DXT3_RGBA] = VK_FORMAT_BC2_UNORM_BLOCK,
563 [PIPE_FORMAT_DXT5_RGBA] = VK_FORMAT_BC3_UNORM_BLOCK,
564 [PIPE_FORMAT_DXT1_SRGB] = VK_FORMAT_BC1_RGB_SRGB_BLOCK,
565 [PIPE_FORMAT_DXT1_SRGBA] = VK_FORMAT_BC1_RGBA_SRGB_BLOCK,
566 [PIPE_FORMAT_DXT3_SRGBA] = VK_FORMAT_BC2_SRGB_BLOCK,
567 [PIPE_FORMAT_DXT5_SRGBA] = VK_FORMAT_BC3_SRGB_BLOCK,
568
569 [PIPE_FORMAT_RGTC1_UNORM] = VK_FORMAT_BC4_UNORM_BLOCK,
570 [PIPE_FORMAT_RGTC1_SNORM] = VK_FORMAT_BC4_SNORM_BLOCK,
571 [PIPE_FORMAT_RGTC2_UNORM] = VK_FORMAT_BC5_UNORM_BLOCK,
572 [PIPE_FORMAT_RGTC2_SNORM] = VK_FORMAT_BC5_SNORM_BLOCK,
573 [PIPE_FORMAT_BPTC_RGBA_UNORM] = VK_FORMAT_BC7_UNORM_BLOCK,
574 [PIPE_FORMAT_BPTC_SRGBA] = VK_FORMAT_BC7_SRGB_BLOCK,
575 [PIPE_FORMAT_BPTC_RGB_FLOAT] = VK_FORMAT_BC6H_SFLOAT_BLOCK,
576 [PIPE_FORMAT_BPTC_RGB_UFLOAT] = VK_FORMAT_BC6H_UFLOAT_BLOCK,
577 };
578
579 static bool
580 is_depth_format_supported(struct zink_screen *screen, VkFormat format)
581 {
582 VkFormatProperties props;
583 vkGetPhysicalDeviceFormatProperties(screen->pdev, format, &props);
584 return (props.linearTilingFeatures | props.optimalTilingFeatures) &
585 VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT;
586 }
587
588 VkFormat
589 zink_get_format(struct zink_screen *screen, enum pipe_format format)
590 {
591 VkFormat ret = formats[format];
592
593 if (ret == VK_FORMAT_X8_D24_UNORM_PACK32 &&
594 !screen->have_X8_D24_UNORM_PACK32) {
595 assert(is_depth_format_supported(screen, VK_FORMAT_D32_SFLOAT));
596 return VK_FORMAT_D32_SFLOAT;
597 }
598
599 if (ret == VK_FORMAT_D24_UNORM_S8_UINT &&
600 !screen->have_D24_UNORM_S8_UINT) {
601 assert(is_depth_format_supported(screen, VK_FORMAT_D32_SFLOAT_S8_UINT));
602 return VK_FORMAT_D32_SFLOAT_S8_UINT;
603 }
604
605 return ret;
606 }
607
608 static VkSampleCountFlagBits
609 vk_sample_count_flags(uint32_t sample_count)
610 {
611 switch (sample_count) {
612 case 1: return VK_SAMPLE_COUNT_1_BIT;
613 case 2: return VK_SAMPLE_COUNT_2_BIT;
614 case 4: return VK_SAMPLE_COUNT_4_BIT;
615 case 8: return VK_SAMPLE_COUNT_8_BIT;
616 case 16: return VK_SAMPLE_COUNT_16_BIT;
617 case 32: return VK_SAMPLE_COUNT_32_BIT;
618 case 64: return VK_SAMPLE_COUNT_64_BIT;
619 default:
620 return 0;
621 }
622 }
623
624 static bool
625 zink_is_format_supported(struct pipe_screen *pscreen,
626 enum pipe_format format,
627 enum pipe_texture_target target,
628 unsigned sample_count,
629 unsigned storage_sample_count,
630 unsigned bind)
631 {
632 struct zink_screen *screen = zink_screen(pscreen);
633
634 if (format == PIPE_FORMAT_NONE)
635 return screen->props.limits.framebufferNoAttachmentsSampleCounts &
636 vk_sample_count_flags(sample_count);
637
638 VkFormat vkformat = zink_get_format(screen, format);
639 if (vkformat == VK_FORMAT_UNDEFINED)
640 return FALSE;
641
642 if (sample_count >= 1) {
643 VkSampleCountFlagBits sample_mask = vk_sample_count_flags(sample_count);
644 const struct util_format_description *desc = util_format_description(format);
645 if (util_format_is_depth_or_stencil(format)) {
646 if (util_format_has_depth(desc)) {
647 if (bind & PIPE_BIND_DEPTH_STENCIL &&
648 (screen->props.limits.framebufferDepthSampleCounts & sample_mask) != sample_mask)
649 return FALSE;
650 if (bind & PIPE_BIND_SAMPLER_VIEW &&
651 (screen->props.limits.sampledImageDepthSampleCounts & sample_mask) != sample_mask)
652 return FALSE;
653 }
654 if (util_format_has_stencil(desc)) {
655 if (bind & PIPE_BIND_DEPTH_STENCIL &&
656 (screen->props.limits.framebufferStencilSampleCounts & sample_mask) != sample_mask)
657 return FALSE;
658 if (bind & PIPE_BIND_SAMPLER_VIEW &&
659 (screen->props.limits.sampledImageStencilSampleCounts & sample_mask) != sample_mask)
660 return FALSE;
661 }
662 } else if (util_format_is_pure_integer(format)) {
663 if (bind & PIPE_BIND_RENDER_TARGET &&
664 !(screen->props.limits.framebufferColorSampleCounts & sample_mask))
665 return FALSE;
666 if (bind & PIPE_BIND_SAMPLER_VIEW &&
667 !(screen->props.limits.sampledImageIntegerSampleCounts & sample_mask))
668 return FALSE;
669 } else {
670 if (bind & PIPE_BIND_RENDER_TARGET &&
671 !(screen->props.limits.framebufferColorSampleCounts & sample_mask))
672 return FALSE;
673 if (bind & PIPE_BIND_SAMPLER_VIEW &&
674 !(screen->props.limits.sampledImageColorSampleCounts & sample_mask))
675 return FALSE;
676 }
677 }
678
679 VkFormatProperties props;
680 vkGetPhysicalDeviceFormatProperties(screen->pdev, vkformat, &props);
681
682 if (target == PIPE_BUFFER) {
683 if (bind & PIPE_BIND_VERTEX_BUFFER &&
684 !(props.bufferFeatures & VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT))
685 return FALSE;
686 } else {
687 /* all other targets are texture-targets */
688 if (bind & PIPE_BIND_RENDER_TARGET &&
689 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT))
690 return FALSE;
691
692 if (bind & PIPE_BIND_BLENDABLE &&
693 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT))
694 return FALSE;
695
696 if (bind & PIPE_BIND_SAMPLER_VIEW &&
697 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT))
698 return FALSE;
699
700 if (bind & PIPE_BIND_DEPTH_STENCIL &&
701 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT))
702 return FALSE;
703 }
704
705 if (util_format_is_compressed(format)) {
706 const struct util_format_description *desc = util_format_description(format);
707 if (desc->layout == UTIL_FORMAT_LAYOUT_BPTC &&
708 !screen->feats.textureCompressionBC)
709 return FALSE;
710 }
711
712 return TRUE;
713 }
714
715 static void
716 zink_destroy_screen(struct pipe_screen *pscreen)
717 {
718 struct zink_screen *screen = zink_screen(pscreen);
719 slab_destroy_parent(&screen->transfer_pool);
720 FREE(screen);
721 }
722
723 static VkInstance
724 create_instance()
725 {
726 VkApplicationInfo ai = {};
727 ai.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO;
728
729 char proc_name[128];
730 if (os_get_process_name(proc_name, ARRAY_SIZE(proc_name)))
731 ai.pApplicationName = proc_name;
732 else
733 ai.pApplicationName = "unknown";
734
735 ai.pEngineName = "mesa zink";
736 ai.apiVersion = VK_API_VERSION_1_0;
737
738 const char *extensions[] = {
739 VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME,
740 VK_KHR_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME,
741 };
742
743 VkInstanceCreateInfo ici = {};
744 ici.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO;
745 ici.pApplicationInfo = &ai;
746 ici.ppEnabledExtensionNames = extensions;
747 ici.enabledExtensionCount = ARRAY_SIZE(extensions);
748
749 VkInstance instance = VK_NULL_HANDLE;
750 VkResult err = vkCreateInstance(&ici, NULL, &instance);
751 if (err != VK_SUCCESS)
752 return VK_NULL_HANDLE;
753
754 return instance;
755 }
756
757 static VkPhysicalDevice
758 choose_pdev(const VkInstance instance)
759 {
760 uint32_t i, pdev_count;
761 VkPhysicalDevice *pdevs, pdev;
762 vkEnumeratePhysicalDevices(instance, &pdev_count, NULL);
763 assert(pdev_count > 0);
764
765 pdevs = malloc(sizeof(*pdevs) * pdev_count);
766 vkEnumeratePhysicalDevices(instance, &pdev_count, pdevs);
767 assert(pdev_count > 0);
768
769 pdev = pdevs[0];
770 for (i = 0; i < pdev_count; ++i) {
771 VkPhysicalDeviceProperties props;
772 vkGetPhysicalDeviceProperties(pdevs[i], &props);
773 if (props.deviceType == VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU) {
774 pdev = pdevs[i];
775 break;
776 }
777 }
778 free(pdevs);
779 return pdev;
780 }
781
782 static uint32_t
783 find_gfx_queue(const VkPhysicalDevice pdev)
784 {
785 uint32_t num_queues;
786 vkGetPhysicalDeviceQueueFamilyProperties(pdev, &num_queues, NULL);
787 assert(num_queues > 0);
788
789 VkQueueFamilyProperties *props = malloc(sizeof(*props) * num_queues);
790 vkGetPhysicalDeviceQueueFamilyProperties(pdev, &num_queues, props);
791
792 for (uint32_t i = 0; i < num_queues; i++) {
793 if (props[i].queueFlags & VK_QUEUE_GRAPHICS_BIT) {
794 free(props);
795 return i;
796 }
797 }
798
799 return UINT32_MAX;
800 }
801
802 static void
803 zink_flush_frontbuffer(struct pipe_screen *pscreen,
804 struct pipe_resource *pres,
805 unsigned level, unsigned layer,
806 void *winsys_drawable_handle,
807 struct pipe_box *sub_box)
808 {
809 struct zink_screen *screen = zink_screen(pscreen);
810 struct sw_winsys *winsys = screen->winsys;
811 struct zink_resource *res = zink_resource(pres);
812
813 if (!winsys)
814 return;
815 void *map = winsys->displaytarget_map(winsys, res->dt, 0);
816
817 if (map) {
818 VkImageSubresource isr = {};
819 isr.aspectMask = res->aspect;
820 isr.mipLevel = level;
821 isr.arrayLayer = layer;
822 VkSubresourceLayout layout;
823 vkGetImageSubresourceLayout(screen->dev, res->image, &isr, &layout);
824
825 void *ptr;
826 VkResult result = vkMapMemory(screen->dev, res->mem, res->offset, res->size, 0, &ptr);
827 if (result != VK_SUCCESS) {
828 debug_printf("failed to map memory for display\n");
829 return;
830 }
831 for (int i = 0; i < pres->height0; ++i) {
832 uint8_t *src = (uint8_t *)ptr + i * layout.rowPitch;
833 uint8_t *dst = (uint8_t *)map + i * res->dt_stride;
834 memcpy(dst, src, res->dt_stride);
835 }
836 vkUnmapMemory(screen->dev, res->mem);
837 }
838
839 winsys->displaytarget_unmap(winsys, res->dt);
840
841 assert(res->dt);
842 if (res->dt)
843 winsys->displaytarget_display(winsys, res->dt, winsys_drawable_handle, sub_box);
844 }
845
846 static struct pipe_screen *
847 zink_internal_create_screen(struct sw_winsys *winsys, int fd)
848 {
849 struct zink_screen *screen = CALLOC_STRUCT(zink_screen);
850 if (!screen)
851 return NULL;
852
853 zink_debug = debug_get_option_zink_debug();
854
855 screen->instance = create_instance();
856 screen->pdev = choose_pdev(screen->instance);
857 screen->gfx_queue = find_gfx_queue(screen->pdev);
858
859 vkGetPhysicalDeviceProperties(screen->pdev, &screen->props);
860 vkGetPhysicalDeviceFeatures(screen->pdev, &screen->feats);
861 vkGetPhysicalDeviceMemoryProperties(screen->pdev, &screen->mem_props);
862
863 screen->have_X8_D24_UNORM_PACK32 = is_depth_format_supported(screen,
864 VK_FORMAT_X8_D24_UNORM_PACK32);
865 screen->have_D24_UNORM_S8_UINT = is_depth_format_supported(screen,
866 VK_FORMAT_D24_UNORM_S8_UINT);
867
868 uint32_t num_extensions = 0;
869 if (vkEnumerateDeviceExtensionProperties(screen->pdev, NULL,
870 &num_extensions, NULL) == VK_SUCCESS && num_extensions > 0) {
871 VkExtensionProperties *extensions = MALLOC(sizeof(VkExtensionProperties) *
872 num_extensions);
873 if (extensions) {
874 vkEnumerateDeviceExtensionProperties(screen->pdev, NULL,
875 &num_extensions, extensions);
876
877 for (uint32_t i = 0; i < num_extensions; ++i) {
878 if (!strcmp(extensions[i].extensionName,
879 VK_KHR_MAINTENANCE1_EXTENSION_NAME))
880 screen->have_KHR_maintenance1 = true;
881 if (!strcmp(extensions[i].extensionName,
882 VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME))
883 screen->have_KHR_external_memory_fd = true;
884 }
885 FREE(extensions);
886 }
887 }
888
889 if (!screen->have_KHR_maintenance1) {
890 debug_printf("ZINK: VK_KHR_maintenance1 required!\n");
891 goto fail;
892 }
893
894 VkDeviceQueueCreateInfo qci = {};
895 float dummy = 0.0f;
896 qci.sType = VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO;
897 qci.queueFamilyIndex = screen->gfx_queue;
898 qci.queueCount = 1;
899 qci.pQueuePriorities = &dummy;
900
901 VkDeviceCreateInfo dci = {};
902 dci.sType = VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO;
903 dci.queueCreateInfoCount = 1;
904 dci.pQueueCreateInfos = &qci;
905 dci.pEnabledFeatures = &screen->feats;
906 const char *extensions[3] = {
907 VK_KHR_MAINTENANCE1_EXTENSION_NAME,
908 };
909 num_extensions = 1;
910
911 if (fd >= 0 && !screen->have_KHR_external_memory_fd) {
912 debug_printf("ZINK: KHR_external_memory_fd required!\n");
913 goto fail;
914 }
915
916 if (screen->have_KHR_external_memory_fd) {
917 extensions[num_extensions++] = VK_KHR_EXTERNAL_MEMORY_EXTENSION_NAME;
918 extensions[num_extensions++] = VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME;
919 }
920 assert(num_extensions <= ARRAY_SIZE(extensions));
921
922 dci.ppEnabledExtensionNames = extensions;
923 dci.enabledExtensionCount = num_extensions;
924 if (vkCreateDevice(screen->pdev, &dci, NULL, &screen->dev) != VK_SUCCESS)
925 goto fail;
926
927 screen->winsys = winsys;
928
929 screen->base.get_name = zink_get_name;
930 screen->base.get_vendor = zink_get_vendor;
931 screen->base.get_device_vendor = zink_get_device_vendor;
932 screen->base.get_param = zink_get_param;
933 screen->base.get_paramf = zink_get_paramf;
934 screen->base.get_shader_param = zink_get_shader_param;
935 screen->base.get_compiler_options = zink_get_compiler_options;
936 screen->base.is_format_supported = zink_is_format_supported;
937 screen->base.context_create = zink_context_create;
938 screen->base.flush_frontbuffer = zink_flush_frontbuffer;
939 screen->base.destroy = zink_destroy_screen;
940
941 zink_screen_resource_init(&screen->base);
942 zink_screen_fence_init(&screen->base);
943
944 slab_create_parent(&screen->transfer_pool, sizeof(struct zink_transfer), 16);
945
946 return &screen->base;
947
948 fail:
949 FREE(screen);
950 return NULL;
951 }
952
953 struct pipe_screen *
954 zink_create_screen(struct sw_winsys *winsys)
955 {
956 return zink_internal_create_screen(winsys, -1);
957 }
958
959 struct pipe_screen *
960 zink_drm_create_screen(int fd)
961 {
962 return zink_internal_create_screen(NULL, fd);
963 }