2 * Copyright 2018 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "zink_screen.h"
26 #include "zink_compiler.h"
27 #include "zink_context.h"
28 #include "zink_fence.h"
29 #include "zink_public.h"
30 #include "zink_resource.h"
32 #include "os/os_process.h"
33 #include "util/u_debug.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_screen.h"
37 #include "util/u_string.h"
39 #include "state_tracker/sw_winsys.h"
41 static const struct debug_named_value
43 { "nir", ZINK_DEBUG_NIR
, "Dump NIR during program compile" },
44 { "spirv", ZINK_DEBUG_SPIRV
, "Dump SPIR-V during program compile" },
45 { "tgsi", ZINK_DEBUG_TGSI
, "Dump TGSI during program compile" },
49 DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug
, "ZINK_DEBUG", debug_options
, 0)
55 zink_get_vendor(struct pipe_screen
*pscreen
)
57 return "Collabora Ltd";
61 zink_get_device_vendor(struct pipe_screen
*pscreen
)
63 struct zink_screen
*screen
= zink_screen(pscreen
);
64 static char buf
[1000];
65 snprintf(buf
, sizeof(buf
), "Unknown (vendor-id: 0x%04x)", screen
->props
.vendorID
);
70 zink_get_name(struct pipe_screen
*pscreen
)
72 struct zink_screen
*screen
= zink_screen(pscreen
);
73 static char buf
[1000];
74 snprintf(buf
, sizeof(buf
), "zink (%s)", screen
->props
.deviceName
);
79 get_video_mem(struct zink_screen
*screen
)
81 VkDeviceSize size
= 0;
82 for (uint32_t i
= 0; i
< screen
->mem_props
.memoryHeapCount
; ++i
)
83 size
+= screen
->mem_props
.memoryHeaps
[i
].size
;
84 return (int)(size
>> 20);
88 zink_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
90 struct zink_screen
*screen
= zink_screen(pscreen
);
93 case PIPE_CAP_NPOT_TEXTURES
:
96 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
97 return screen
->props
.limits
.maxFragmentDualSrcAttachments
;
99 case PIPE_CAP_MAX_RENDER_TARGETS
:
100 return screen
->props
.limits
.maxColorAttachments
;
102 case PIPE_CAP_TEXTURE_SWIZZLE
:
105 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
106 return screen
->props
.limits
.maxImageDimension2D
;
107 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
108 return 1 + util_logbase2(screen
->props
.limits
.maxImageDimension3D
);
109 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
110 return 1 + util_logbase2(screen
->props
.limits
.maxImageDimensionCube
);
112 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
115 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD
:
116 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES
:
117 case PIPE_CAP_VERTEX_SHADER_SATURATE
:
120 case PIPE_CAP_INDEP_BLEND_ENABLE
:
121 case PIPE_CAP_INDEP_BLEND_FUNC
:
124 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
125 return screen
->props
.limits
.maxImageArrayLayers
;
127 #if 0 /* TODO: Enable me */
128 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
132 #if 0 /* TODO: Enable me */
133 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
137 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
140 case PIPE_CAP_MIN_TEXEL_OFFSET
:
141 return screen
->props
.limits
.minTexelOffset
;
142 case PIPE_CAP_MAX_TEXEL_OFFSET
:
143 return screen
->props
.limits
.maxTexelOffset
;
145 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
148 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
149 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
150 return 450; /* unsure (probably wrong) */
152 #if 0 /* TODO: Enable me */
153 case PIPE_CAP_COMPUTE
:
157 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
158 return screen
->props
.limits
.minUniformBufferOffsetAlignment
;
160 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
:
161 return screen
->props
.limits
.minMemoryMapAlignment
;
163 case PIPE_CAP_CUBE_MAP_ARRAY
:
164 return screen
->feats
.imageCubeArray
;
166 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
167 return 0; /* unsure */
169 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
:
170 return screen
->props
.limits
.maxTexelBufferElements
;
172 case PIPE_CAP_ENDIANNESS
:
173 return PIPE_ENDIAN_NATIVE
; /* unsure */
175 case PIPE_CAP_MAX_VIEWPORTS
:
176 return screen
->props
.limits
.maxViewports
;
178 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
181 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
:
182 return screen
->props
.limits
.maxGeometryOutputVertices
;
183 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
:
184 return screen
->props
.limits
.maxGeometryOutputComponents
;
186 #if 0 /* TODO: Enable me. Enables ARB_texture_gather */
187 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
191 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
:
192 return screen
->props
.limits
.minTexelGatherOffset
;
193 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
:
194 return screen
->props
.limits
.maxTexelGatherOffset
;
196 case PIPE_CAP_VENDOR_ID
:
197 return screen
->props
.vendorID
;
198 case PIPE_CAP_DEVICE_ID
:
199 return screen
->props
.deviceID
;
201 case PIPE_CAP_ACCELERATED
:
203 case PIPE_CAP_VIDEO_MEMORY
:
204 return get_video_mem(screen
);
207 return screen
->props
.deviceType
== VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU
;
209 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE
:
210 return screen
->props
.limits
.maxVertexInputBindingStride
;
212 #if 0 /* TODO: Enable me */
213 case PIPE_CAP_SAMPLER_VIEW_TARGET
:
217 #if 0 /* TODO: Enable me */
218 case PIPE_CAP_TEXTURE_FLOAT_LINEAR
:
219 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
223 case PIPE_CAP_SHAREABLE_SHADERS
:
226 #if 0 /* TODO: Enable me. Enables GL_ARB_shader_storage_buffer_object */
227 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
228 return screen
->props
.limits
.minStorageBufferOffsetAlignment
;
231 case PIPE_CAP_PCI_GROUP
:
232 case PIPE_CAP_PCI_BUS
:
233 case PIPE_CAP_PCI_DEVICE
:
234 case PIPE_CAP_PCI_FUNCTION
:
235 return 0; /* TODO: figure these out */
237 #if 0 /* TODO: Enable me */
238 case PIPE_CAP_CULL_DISTANCE
:
239 return screen
->feats
.shaderCullDistance
;
242 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS
:
243 return screen
->props
.limits
.viewportSubPixelBits
;
245 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
:
246 return 0; /* not sure */
248 case PIPE_CAP_MAX_GS_INVOCATIONS
:
249 return 0; /* not implemented */
251 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS
:
252 return screen
->props
.limits
.maxDescriptorSetStorageBuffers
;
254 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE
:
255 return screen
->props
.limits
.maxStorageBufferRange
; /* unsure */
257 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
258 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
261 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
262 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
265 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
:
269 return u_pipe_screen_get_param_defaults(pscreen
, param
);
274 zink_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
276 struct zink_screen
*screen
= zink_screen(pscreen
);
279 case PIPE_CAPF_MAX_LINE_WIDTH
:
280 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
281 return screen
->props
.limits
.lineWidthRange
[1];
283 case PIPE_CAPF_MAX_POINT_WIDTH
:
284 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
285 return screen
->props
.limits
.pointSizeRange
[1];
287 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
288 return screen
->props
.limits
.maxSamplerAnisotropy
;
290 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
291 return screen
->props
.limits
.maxSamplerLodBias
;
293 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
294 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
295 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
296 return 0.0f
; /* not implemented */
299 /* should only get here on unhandled cases */
304 zink_get_shader_param(struct pipe_screen
*pscreen
,
305 enum pipe_shader_type shader
,
306 enum pipe_shader_cap param
)
308 struct zink_screen
*screen
= zink_screen(pscreen
);
311 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
312 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
313 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
314 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
315 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
316 if (shader
== PIPE_SHADER_VERTEX
||
317 shader
== PIPE_SHADER_FRAGMENT
)
321 case PIPE_SHADER_CAP_MAX_INPUTS
:
323 case PIPE_SHADER_VERTEX
:
324 return MIN2(screen
->props
.limits
.maxVertexInputAttributes
,
325 PIPE_MAX_SHADER_INPUTS
);
326 case PIPE_SHADER_FRAGMENT
:
327 return MIN2(screen
->props
.limits
.maxFragmentInputComponents
/ 4,
328 PIPE_MAX_SHADER_INPUTS
);
330 return 0; /* unsupported stage */
333 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
335 case PIPE_SHADER_VERTEX
:
336 return MIN2(screen
->props
.limits
.maxVertexOutputComponents
/ 4,
337 PIPE_MAX_SHADER_OUTPUTS
);
338 case PIPE_SHADER_FRAGMENT
:
339 return MIN2(screen
->props
.limits
.maxColorAttachments
,
340 PIPE_MAX_SHADER_OUTPUTS
);
342 return 0; /* unsupported stage */
345 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
346 /* this might be a bit simplistic... */
347 return MIN2(screen
->props
.limits
.maxPerStageDescriptorSamplers
,
350 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
351 return screen
->props
.limits
.maxUniformBufferRange
;
353 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
354 return screen
->props
.limits
.maxPerStageDescriptorUniformBuffers
;
356 case PIPE_SHADER_CAP_MAX_TEMPS
:
359 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
360 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
361 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
362 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
363 case PIPE_SHADER_CAP_SUBROUTINES
:
364 case PIPE_SHADER_CAP_INTEGERS
:
365 case PIPE_SHADER_CAP_INT64_ATOMICS
:
366 case PIPE_SHADER_CAP_FP16
:
367 return 0; /* not implemented */
369 case PIPE_SHADER_CAP_PREFERRED_IR
:
370 return PIPE_SHADER_IR_NIR
;
372 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
373 return 0; /* not implemented */
375 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
376 return MIN2(screen
->props
.limits
.maxPerStageDescriptorSampledImages
,
377 PIPE_MAX_SHADER_SAMPLER_VIEWS
);
379 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
380 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
381 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
382 return 0; /* not implemented */
384 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
385 return 0; /* no idea */
387 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
388 return 32; /* arbitrary */
390 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
391 /* TODO: this limitation is dumb, and will need some fixes in mesa */
392 return MIN2(screen
->props
.limits
.maxPerStageDescriptorStorageBuffers
, 8);
394 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
395 return (1 << PIPE_SHADER_IR_NIR
) | (1 << PIPE_SHADER_IR_TGSI
);
397 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
398 return screen
->props
.limits
.maxPerStageDescriptorStorageImages
;
400 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
401 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
402 return 0; /* unsure */
404 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
405 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
406 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
407 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
408 return 0; /* not implemented */
411 /* should only get here on unhandled cases */
415 static const VkFormat formats
[PIPE_FORMAT_COUNT
] = {
416 #define MAP_FORMAT_NORM(FMT) \
417 [PIPE_FORMAT_ ## FMT ## _UNORM] = VK_FORMAT_ ## FMT ## _UNORM, \
418 [PIPE_FORMAT_ ## FMT ## _SNORM] = VK_FORMAT_ ## FMT ## _SNORM,
420 #define MAP_FORMAT_SCALED(FMT) \
421 [PIPE_FORMAT_ ## FMT ## _USCALED] = VK_FORMAT_ ## FMT ## _USCALED, \
422 [PIPE_FORMAT_ ## FMT ## _SSCALED] = VK_FORMAT_ ## FMT ## _SSCALED,
424 #define MAP_FORMAT_INT(FMT) \
425 [PIPE_FORMAT_ ## FMT ## _UINT] = VK_FORMAT_ ## FMT ## _UINT, \
426 [PIPE_FORMAT_ ## FMT ## _SINT] = VK_FORMAT_ ## FMT ## _SINT,
428 #define MAP_FORMAT_SRGB(FMT) \
429 [PIPE_FORMAT_ ## FMT ## _SRGB] = VK_FORMAT_ ## FMT ## _SRGB,
431 #define MAP_FORMAT_FLOAT(FMT) \
432 [PIPE_FORMAT_ ## FMT ## _FLOAT] = VK_FORMAT_ ## FMT ## _SFLOAT,
438 MAP_FORMAT_SCALED(R8
)
442 MAP_FORMAT_SCALED(R16
)
444 MAP_FORMAT_FLOAT(R16
)
447 MAP_FORMAT_FLOAT(R32
)
452 MAP_FORMAT_NORM(R8G8
)
453 MAP_FORMAT_SCALED(R8G8
)
456 MAP_FORMAT_NORM(R16G16
)
457 MAP_FORMAT_SCALED(R16G16
)
458 MAP_FORMAT_INT(R16G16
)
459 MAP_FORMAT_FLOAT(R16G16
)
461 MAP_FORMAT_INT(R32G32
)
462 MAP_FORMAT_FLOAT(R32G32
)
467 MAP_FORMAT_NORM(R8G8B8
)
468 MAP_FORMAT_SCALED(R8G8B8
)
469 MAP_FORMAT_INT(R8G8B8
)
470 MAP_FORMAT_SRGB(R8G8B8
)
472 MAP_FORMAT_NORM(R16G16B16
)
473 MAP_FORMAT_SCALED(R16G16B16
)
474 MAP_FORMAT_INT(R16G16B16
)
475 MAP_FORMAT_FLOAT(R16G16B16
)
477 MAP_FORMAT_INT(R32G32B32
)
478 MAP_FORMAT_FLOAT(R32G32B32
)
483 MAP_FORMAT_NORM(R8G8B8A8
)
484 MAP_FORMAT_SCALED(R8G8B8A8
)
485 MAP_FORMAT_INT(R8G8B8A8
)
486 MAP_FORMAT_SRGB(R8G8B8A8
)
487 [PIPE_FORMAT_B8G8R8A8_UNORM
] = VK_FORMAT_B8G8R8A8_UNORM
,
488 MAP_FORMAT_SRGB(B8G8R8A8
)
489 [PIPE_FORMAT_A8B8G8R8_SRGB
] = VK_FORMAT_A8B8G8R8_SRGB_PACK32
,
491 MAP_FORMAT_NORM(R16G16B16A16
)
492 MAP_FORMAT_SCALED(R16G16B16A16
)
493 MAP_FORMAT_INT(R16G16B16A16
)
494 MAP_FORMAT_FLOAT(R16G16B16A16
)
496 MAP_FORMAT_INT(R32G32B32A32
)
497 MAP_FORMAT_FLOAT(R32G32B32A32
)
499 // other color formats
500 [PIPE_FORMAT_B5G6R5_UNORM
] = VK_FORMAT_R5G6B5_UNORM_PACK16
,
501 [PIPE_FORMAT_B5G5R5A1_UNORM
] = VK_FORMAT_B5G5R5A1_UNORM_PACK16
,
502 [PIPE_FORMAT_R11G11B10_FLOAT
] = VK_FORMAT_B10G11R11_UFLOAT_PACK32
,
503 [PIPE_FORMAT_R9G9B9E5_FLOAT
] = VK_FORMAT_E5B9G9R9_UFLOAT_PACK32
,
504 [PIPE_FORMAT_R10G10B10A2_UNORM
] = VK_FORMAT_A2B10G10R10_UNORM_PACK32
,
505 [PIPE_FORMAT_B10G10R10A2_UNORM
] = VK_FORMAT_A2R10G10B10_UNORM_PACK32
,
506 [PIPE_FORMAT_R10G10B10A2_UINT
] = VK_FORMAT_A2B10G10R10_UINT_PACK32
,
507 [PIPE_FORMAT_B10G10R10A2_UINT
] = VK_FORMAT_A2R10G10B10_UINT_PACK32
,
509 // depth/stencil formats
510 [PIPE_FORMAT_Z32_FLOAT
] = VK_FORMAT_D32_SFLOAT
,
511 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
] = VK_FORMAT_D32_SFLOAT_S8_UINT
,
512 [PIPE_FORMAT_Z16_UNORM
] = VK_FORMAT_D16_UNORM
,
513 [PIPE_FORMAT_X8Z24_UNORM
] = VK_FORMAT_X8_D24_UNORM_PACK32
,
514 [PIPE_FORMAT_Z24_UNORM_S8_UINT
] = VK_FORMAT_D24_UNORM_S8_UINT
,
518 zink_get_format(enum pipe_format format
)
520 return formats
[format
];
524 zink_is_format_supported(struct pipe_screen
*pscreen
,
525 enum pipe_format format
,
526 enum pipe_texture_target target
,
527 unsigned sample_count
,
528 unsigned storage_sample_count
,
531 struct zink_screen
*screen
= zink_screen(pscreen
);
533 if (sample_count
> 1)
536 VkFormat vkformat
= formats
[format
];
537 if (vkformat
== VK_FORMAT_UNDEFINED
)
540 VkFormatProperties props
;
541 vkGetPhysicalDeviceFormatProperties(screen
->pdev
, vkformat
, &props
);
543 if (target
== PIPE_BUFFER
) {
544 if (bind
& PIPE_BIND_VERTEX_BUFFER
&&
545 !(props
.bufferFeatures
& VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT
))
548 /* all other targets are texture-targets */
549 if (bind
& PIPE_BIND_RENDER_TARGET
&&
550 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT
))
553 if (bind
& PIPE_BIND_BLENDABLE
&&
554 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT
))
557 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
558 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT
))
561 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
562 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT
))
570 zink_destroy_screen(struct pipe_screen
*pscreen
)
572 struct zink_screen
*screen
= zink_screen(pscreen
);
573 slab_destroy_parent(&screen
->transfer_pool
);
580 VkApplicationInfo ai
= {};
581 ai
.sType
= VK_STRUCTURE_TYPE_APPLICATION_INFO
;
584 if (os_get_process_name(proc_name
, ARRAY_SIZE(proc_name
)))
585 ai
.pApplicationName
= proc_name
;
587 ai
.pApplicationName
= "unknown";
589 ai
.pEngineName
= "mesa zink";
590 ai
.apiVersion
= VK_API_VERSION_1_0
;
592 VkInstanceCreateInfo ici
= {};
593 ici
.sType
= VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
;
594 ici
.pApplicationInfo
= &ai
;
596 VkInstance instance
= VK_NULL_HANDLE
;
597 VkResult err
= vkCreateInstance(&ici
, NULL
, &instance
);
598 if (err
!= VK_SUCCESS
)
599 return VK_NULL_HANDLE
;
604 static VkPhysicalDevice
605 choose_pdev(const VkInstance instance
)
607 uint32_t i
, pdev_count
;
608 VkPhysicalDevice
*pdevs
, pdev
;
609 vkEnumeratePhysicalDevices(instance
, &pdev_count
, NULL
);
610 assert(pdev_count
> 0);
612 pdevs
= malloc(sizeof(*pdevs
) * pdev_count
);
613 vkEnumeratePhysicalDevices(instance
, &pdev_count
, pdevs
);
614 assert(pdev_count
> 0);
617 for (i
= 0; i
< pdev_count
; ++i
) {
618 VkPhysicalDeviceProperties props
;
619 vkGetPhysicalDeviceProperties(pdevs
[i
], &props
);
620 if (props
.deviceType
== VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU
) {
630 find_gfx_queue(const VkPhysicalDevice pdev
)
633 vkGetPhysicalDeviceQueueFamilyProperties(pdev
, &num_queues
, NULL
);
634 assert(num_queues
> 0);
636 VkQueueFamilyProperties
*props
= malloc(sizeof(*props
) * num_queues
);
637 vkGetPhysicalDeviceQueueFamilyProperties(pdev
, &num_queues
, props
);
639 for (uint32_t i
= 0; i
< num_queues
; i
++) {
640 if (props
[i
].queueFlags
& VK_QUEUE_GRAPHICS_BIT
) {
650 zink_flush_frontbuffer(struct pipe_screen
*pscreen
,
651 struct pipe_resource
*pres
,
652 unsigned level
, unsigned layer
,
653 void *winsys_drawable_handle
,
654 struct pipe_box
*sub_box
)
656 struct zink_screen
*screen
= zink_screen(pscreen
);
657 struct sw_winsys
*winsys
= screen
->winsys
;
658 struct zink_resource
*res
= zink_resource(pres
);
660 void *map
= winsys
->displaytarget_map(winsys
, res
->dt
, 0);
663 VkImageSubresource isr
= {};
664 isr
.aspectMask
= res
->aspect
;
665 isr
.mipLevel
= level
;
666 isr
.arrayLayer
= layer
;
667 VkSubresourceLayout layout
;
668 vkGetImageSubresourceLayout(screen
->dev
, res
->image
, &isr
, &layout
);
671 VkResult result
= vkMapMemory(screen
->dev
, res
->mem
, res
->offset
, res
->size
, 0, &ptr
);
672 if (result
!= VK_SUCCESS
) {
673 debug_printf("failed to map memory for display\n");
676 for (int i
= 0; i
< pres
->height0
; ++i
) {
677 uint8_t *src
= (uint8_t *)ptr
+ i
* layout
.rowPitch
;
678 uint8_t *dst
= (uint8_t *)map
+ i
* res
->dt_stride
;
679 memcpy(dst
, src
, res
->dt_stride
);
681 vkUnmapMemory(screen
->dev
, res
->mem
);
684 winsys
->displaytarget_unmap(winsys
, res
->dt
);
688 winsys
->displaytarget_display(winsys
, res
->dt
, winsys_drawable_handle
, sub_box
);
692 zink_create_screen(struct sw_winsys
*winsys
)
694 struct zink_screen
*screen
= CALLOC_STRUCT(zink_screen
);
698 zink_debug
= debug_get_option_zink_debug();
700 screen
->instance
= create_instance();
701 screen
->pdev
= choose_pdev(screen
->instance
);
702 screen
->gfx_queue
= find_gfx_queue(screen
->pdev
);
704 vkGetPhysicalDeviceProperties(screen
->pdev
, &screen
->props
);
705 vkGetPhysicalDeviceFeatures(screen
->pdev
, &screen
->feats
);
706 vkGetPhysicalDeviceMemoryProperties(screen
->pdev
, &screen
->mem_props
);
708 VkDeviceQueueCreateInfo qci
= {};
710 qci
.sType
= VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO
;
711 qci
.queueFamilyIndex
= screen
->gfx_queue
;
713 qci
.pQueuePriorities
= &dummy
;
715 VkDeviceCreateInfo dci
= {};
716 dci
.sType
= VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO
;
717 dci
.queueCreateInfoCount
= 1;
718 dci
.pQueueCreateInfos
= &qci
;
719 dci
.pEnabledFeatures
= &screen
->feats
;
720 const char *extensions
[] = {
721 VK_KHR_MAINTENANCE1_EXTENSION_NAME
723 dci
.ppEnabledExtensionNames
= extensions
;
724 dci
.enabledExtensionCount
= ARRAY_SIZE(extensions
);
725 if (vkCreateDevice(screen
->pdev
, &dci
, NULL
, &screen
->dev
) != VK_SUCCESS
)
728 screen
->winsys
= winsys
;
730 screen
->base
.get_name
= zink_get_name
;
731 screen
->base
.get_vendor
= zink_get_vendor
;
732 screen
->base
.get_device_vendor
= zink_get_device_vendor
;
733 screen
->base
.get_param
= zink_get_param
;
734 screen
->base
.get_paramf
= zink_get_paramf
;
735 screen
->base
.get_shader_param
= zink_get_shader_param
;
736 screen
->base
.get_compiler_options
= zink_get_compiler_options
;
737 screen
->base
.is_format_supported
= zink_is_format_supported
;
738 screen
->base
.context_create
= zink_context_create
;
739 screen
->base
.flush_frontbuffer
= zink_flush_frontbuffer
;
740 screen
->base
.destroy
= zink_destroy_screen
;
742 zink_screen_resource_init(&screen
->base
);
743 zink_screen_fence_init(&screen
->base
);
745 slab_create_parent(&screen
->transfer_pool
, sizeof(struct zink_transfer
), 16);
747 return &screen
->base
;