zink: add dri loader
[mesa.git] / src / gallium / drivers / zink / zink_screen.c
1 /*
2 * Copyright 2018 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "zink_screen.h"
25
26 #include "zink_compiler.h"
27 #include "zink_context.h"
28 #include "zink_fence.h"
29 #include "zink_public.h"
30 #include "zink_resource.h"
31
32 #include "os/os_process.h"
33 #include "util/u_debug.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_screen.h"
37 #include "util/u_string.h"
38
39 #include "state_tracker/sw_winsys.h"
40
41 static const struct debug_named_value
42 debug_options[] = {
43 { "nir", ZINK_DEBUG_NIR, "Dump NIR during program compile" },
44 { "spirv", ZINK_DEBUG_SPIRV, "Dump SPIR-V during program compile" },
45 { "tgsi", ZINK_DEBUG_TGSI, "Dump TGSI during program compile" },
46 DEBUG_NAMED_VALUE_END
47 };
48
49 DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug, "ZINK_DEBUG", debug_options, 0)
50
51 uint32_t
52 zink_debug;
53
54 static const char *
55 zink_get_vendor(struct pipe_screen *pscreen)
56 {
57 return "Collabora Ltd";
58 }
59
60 static const char *
61 zink_get_device_vendor(struct pipe_screen *pscreen)
62 {
63 struct zink_screen *screen = zink_screen(pscreen);
64 static char buf[1000];
65 snprintf(buf, sizeof(buf), "Unknown (vendor-id: 0x%04x)", screen->props.vendorID);
66 return buf;
67 }
68
69 static const char *
70 zink_get_name(struct pipe_screen *pscreen)
71 {
72 struct zink_screen *screen = zink_screen(pscreen);
73 static char buf[1000];
74 snprintf(buf, sizeof(buf), "zink (%s)", screen->props.deviceName);
75 return buf;
76 }
77
78 static int
79 get_video_mem(struct zink_screen *screen)
80 {
81 VkDeviceSize size = 0;
82 for (uint32_t i = 0; i < screen->mem_props.memoryHeapCount; ++i)
83 size += screen->mem_props.memoryHeaps[i].size;
84 return (int)(size >> 20);
85 }
86
87 static int
88 zink_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
89 {
90 struct zink_screen *screen = zink_screen(pscreen);
91
92 switch (param) {
93 case PIPE_CAP_NPOT_TEXTURES:
94 return 1;
95
96 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
97 return screen->props.limits.maxFragmentDualSrcAttachments;
98
99 case PIPE_CAP_POINT_SPRITE:
100 return 1;
101
102 case PIPE_CAP_MAX_RENDER_TARGETS:
103 return screen->props.limits.maxColorAttachments;
104
105 case PIPE_CAP_TEXTURE_SWIZZLE:
106 return 1;
107
108 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
109 return screen->props.limits.maxImageDimension2D;
110 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
111 return 1 + util_logbase2(screen->props.limits.maxImageDimension3D);
112 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
113 return 1 + util_logbase2(screen->props.limits.maxImageDimensionCube);
114
115 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
116 return 1;
117
118 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
119 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
120 case PIPE_CAP_VERTEX_SHADER_SATURATE:
121 return 1;
122
123 case PIPE_CAP_INDEP_BLEND_ENABLE:
124 case PIPE_CAP_INDEP_BLEND_FUNC:
125 return 1;
126
127 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
128 return screen->props.limits.maxImageArrayLayers;
129
130 #if 0 /* TODO: Enable me */
131 case PIPE_CAP_DEPTH_CLIP_DISABLE:
132 return 0;
133 #endif
134
135 #if 0 /* TODO: Enable me */
136 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
137 return 1;
138 #endif
139
140 case PIPE_CAP_SEAMLESS_CUBE_MAP:
141 return 1;
142
143 case PIPE_CAP_MIN_TEXEL_OFFSET:
144 return screen->props.limits.minTexelOffset;
145 case PIPE_CAP_MAX_TEXEL_OFFSET:
146 return screen->props.limits.maxTexelOffset;
147
148 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
149 return 1;
150
151 case PIPE_CAP_GLSL_FEATURE_LEVEL:
152 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
153 return 450; /* unsure (probably wrong) */
154
155 #if 0 /* TODO: Enable me */
156 case PIPE_CAP_COMPUTE:
157 return 1;
158 #endif
159
160 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
161 return screen->props.limits.minUniformBufferOffsetAlignment;
162
163 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
164 return screen->props.limits.minMemoryMapAlignment;
165
166 case PIPE_CAP_CUBE_MAP_ARRAY:
167 return screen->feats.imageCubeArray;
168
169 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
170 return 0; /* unsure */
171
172 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
173 return screen->props.limits.maxTexelBufferElements;
174
175 case PIPE_CAP_ENDIANNESS:
176 return PIPE_ENDIAN_NATIVE; /* unsure */
177
178 case PIPE_CAP_MAX_VIEWPORTS:
179 return screen->props.limits.maxViewports;
180
181 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
182 return 1;
183
184 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
185 return screen->props.limits.maxGeometryOutputVertices;
186 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
187 return screen->props.limits.maxGeometryOutputComponents;
188
189 #if 0 /* TODO: Enable me. Enables ARB_texture_gather */
190 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
191 return 4;
192 #endif
193
194 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
195 return screen->props.limits.minTexelGatherOffset;
196 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
197 return screen->props.limits.maxTexelGatherOffset;
198
199 case PIPE_CAP_VENDOR_ID:
200 return screen->props.vendorID;
201 case PIPE_CAP_DEVICE_ID:
202 return screen->props.deviceID;
203
204 case PIPE_CAP_ACCELERATED:
205 return 1;
206 case PIPE_CAP_VIDEO_MEMORY:
207 return get_video_mem(screen);
208 case PIPE_CAP_UMA:
209 /* inaccurate */
210 return screen->props.deviceType == VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
211
212 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
213 return screen->props.limits.maxVertexInputBindingStride;
214
215 #if 0 /* TODO: Enable me */
216 case PIPE_CAP_SAMPLER_VIEW_TARGET:
217 return 1;
218 #endif
219
220 #if 0 /* TODO: Enable me */
221 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
222 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
223 return 1;
224 #endif
225
226 case PIPE_CAP_SHAREABLE_SHADERS:
227 return 1;
228
229 #if 0 /* TODO: Enable me. Enables GL_ARB_shader_storage_buffer_object */
230 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
231 return screen->props.limits.minStorageBufferOffsetAlignment;
232 #endif
233
234 case PIPE_CAP_PCI_GROUP:
235 case PIPE_CAP_PCI_BUS:
236 case PIPE_CAP_PCI_DEVICE:
237 case PIPE_CAP_PCI_FUNCTION:
238 return 0; /* TODO: figure these out */
239
240 #if 0 /* TODO: Enable me */
241 case PIPE_CAP_CULL_DISTANCE:
242 return screen->feats.shaderCullDistance;
243 #endif
244
245 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
246 return screen->props.limits.viewportSubPixelBits;
247
248 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
249 return 0; /* not sure */
250
251 case PIPE_CAP_MAX_GS_INVOCATIONS:
252 return 0; /* not implemented */
253
254 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
255 return screen->props.limits.maxDescriptorSetStorageBuffers;
256
257 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
258 return screen->props.limits.maxStorageBufferRange; /* unsure */
259
260 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
261 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
262 return 1;
263
264 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
265 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
266 return 0;
267
268 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
269 return 1;
270
271 case PIPE_CAP_FLATSHADE:
272 return 0;
273
274 default:
275 return u_pipe_screen_get_param_defaults(pscreen, param);
276 }
277 }
278
279 static float
280 zink_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
281 {
282 struct zink_screen *screen = zink_screen(pscreen);
283
284 switch (param) {
285 case PIPE_CAPF_MAX_LINE_WIDTH:
286 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
287 return screen->props.limits.lineWidthRange[1];
288
289 case PIPE_CAPF_MAX_POINT_WIDTH:
290 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
291 return screen->props.limits.pointSizeRange[1];
292
293 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
294 return screen->props.limits.maxSamplerAnisotropy;
295
296 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
297 return screen->props.limits.maxSamplerLodBias;
298
299 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
300 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
301 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
302 return 0.0f; /* not implemented */
303 }
304
305 /* should only get here on unhandled cases */
306 return 0.0;
307 }
308
309 static int
310 zink_get_shader_param(struct pipe_screen *pscreen,
311 enum pipe_shader_type shader,
312 enum pipe_shader_cap param)
313 {
314 struct zink_screen *screen = zink_screen(pscreen);
315
316 switch (param) {
317 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
318 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
319 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
320 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
321 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
322 if (shader == PIPE_SHADER_VERTEX ||
323 shader == PIPE_SHADER_FRAGMENT)
324 return INT_MAX;
325 return 0;
326
327 case PIPE_SHADER_CAP_MAX_INPUTS:
328 switch (shader) {
329 case PIPE_SHADER_VERTEX:
330 return MIN2(screen->props.limits.maxVertexInputAttributes,
331 PIPE_MAX_SHADER_INPUTS);
332 case PIPE_SHADER_FRAGMENT:
333 return MIN2(screen->props.limits.maxFragmentInputComponents / 4,
334 PIPE_MAX_SHADER_INPUTS);
335 default:
336 return 0; /* unsupported stage */
337 }
338
339 case PIPE_SHADER_CAP_MAX_OUTPUTS:
340 switch (shader) {
341 case PIPE_SHADER_VERTEX:
342 return MIN2(screen->props.limits.maxVertexOutputComponents / 4,
343 PIPE_MAX_SHADER_OUTPUTS);
344 case PIPE_SHADER_FRAGMENT:
345 return MIN2(screen->props.limits.maxColorAttachments,
346 PIPE_MAX_SHADER_OUTPUTS);
347 default:
348 return 0; /* unsupported stage */
349 }
350
351 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
352 /* this might be a bit simplistic... */
353 return MIN2(screen->props.limits.maxPerStageDescriptorSamplers,
354 PIPE_MAX_SAMPLERS);
355
356 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
357 return screen->props.limits.maxUniformBufferRange;
358
359 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
360 return screen->props.limits.maxPerStageDescriptorUniformBuffers;
361
362 case PIPE_SHADER_CAP_MAX_TEMPS:
363 return INT_MAX;
364
365 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
366 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
367 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
368 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
369 case PIPE_SHADER_CAP_SUBROUTINES:
370 case PIPE_SHADER_CAP_INTEGERS:
371 case PIPE_SHADER_CAP_INT64_ATOMICS:
372 case PIPE_SHADER_CAP_FP16:
373 return 0; /* not implemented */
374
375 case PIPE_SHADER_CAP_PREFERRED_IR:
376 return PIPE_SHADER_IR_NIR;
377
378 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
379 return 0; /* not implemented */
380
381 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
382 return MIN2(screen->props.limits.maxPerStageDescriptorSampledImages,
383 PIPE_MAX_SHADER_SAMPLER_VIEWS);
384
385 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
386 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
387 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
388 return 0; /* not implemented */
389
390 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
391 return 0; /* no idea */
392
393 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
394 return 32; /* arbitrary */
395
396 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
397 /* TODO: this limitation is dumb, and will need some fixes in mesa */
398 return MIN2(screen->props.limits.maxPerStageDescriptorStorageBuffers, 8);
399
400 case PIPE_SHADER_CAP_SUPPORTED_IRS:
401 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
402
403 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
404 return screen->props.limits.maxPerStageDescriptorStorageImages;
405
406 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
407 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
408 return 0; /* unsure */
409
410 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
411 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
412 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
413 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
414 return 0; /* not implemented */
415 }
416
417 /* should only get here on unhandled cases */
418 return 0;
419 }
420
421 static const VkFormat formats[PIPE_FORMAT_COUNT] = {
422 #define MAP_FORMAT_NORM(FMT) \
423 [PIPE_FORMAT_ ## FMT ## _UNORM] = VK_FORMAT_ ## FMT ## _UNORM, \
424 [PIPE_FORMAT_ ## FMT ## _SNORM] = VK_FORMAT_ ## FMT ## _SNORM,
425
426 #define MAP_FORMAT_SCALED(FMT) \
427 [PIPE_FORMAT_ ## FMT ## _USCALED] = VK_FORMAT_ ## FMT ## _USCALED, \
428 [PIPE_FORMAT_ ## FMT ## _SSCALED] = VK_FORMAT_ ## FMT ## _SSCALED,
429
430 #define MAP_FORMAT_INT(FMT) \
431 [PIPE_FORMAT_ ## FMT ## _UINT] = VK_FORMAT_ ## FMT ## _UINT, \
432 [PIPE_FORMAT_ ## FMT ## _SINT] = VK_FORMAT_ ## FMT ## _SINT,
433
434 #define MAP_FORMAT_SRGB(FMT) \
435 [PIPE_FORMAT_ ## FMT ## _SRGB] = VK_FORMAT_ ## FMT ## _SRGB,
436
437 #define MAP_FORMAT_FLOAT(FMT) \
438 [PIPE_FORMAT_ ## FMT ## _FLOAT] = VK_FORMAT_ ## FMT ## _SFLOAT,
439
440 // one component
441
442 // 8-bits
443 MAP_FORMAT_NORM(R8)
444 MAP_FORMAT_SCALED(R8)
445 MAP_FORMAT_INT(R8)
446 // 16-bits
447 MAP_FORMAT_NORM(R16)
448 MAP_FORMAT_SCALED(R16)
449 MAP_FORMAT_INT(R16)
450 MAP_FORMAT_FLOAT(R16)
451 // 32-bits
452 MAP_FORMAT_INT(R32)
453 MAP_FORMAT_FLOAT(R32)
454
455 // two components
456
457 // 8-bits
458 MAP_FORMAT_NORM(R8G8)
459 MAP_FORMAT_SCALED(R8G8)
460 MAP_FORMAT_INT(R8G8)
461 // 16-bits
462 MAP_FORMAT_NORM(R16G16)
463 MAP_FORMAT_SCALED(R16G16)
464 MAP_FORMAT_INT(R16G16)
465 MAP_FORMAT_FLOAT(R16G16)
466 // 32-bits
467 MAP_FORMAT_INT(R32G32)
468 MAP_FORMAT_FLOAT(R32G32)
469
470 // three components
471
472 // 8-bits
473 MAP_FORMAT_NORM(R8G8B8)
474 MAP_FORMAT_SCALED(R8G8B8)
475 MAP_FORMAT_INT(R8G8B8)
476 MAP_FORMAT_SRGB(R8G8B8)
477 // 16-bits
478 MAP_FORMAT_NORM(R16G16B16)
479 MAP_FORMAT_SCALED(R16G16B16)
480 MAP_FORMAT_INT(R16G16B16)
481 MAP_FORMAT_FLOAT(R16G16B16)
482 // 32-bits
483 MAP_FORMAT_INT(R32G32B32)
484 MAP_FORMAT_FLOAT(R32G32B32)
485
486 // four components
487
488 // 8-bits
489 MAP_FORMAT_NORM(R8G8B8A8)
490 MAP_FORMAT_SCALED(R8G8B8A8)
491 MAP_FORMAT_INT(R8G8B8A8)
492 MAP_FORMAT_SRGB(R8G8B8A8)
493 [PIPE_FORMAT_B8G8R8A8_UNORM] = VK_FORMAT_B8G8R8A8_UNORM,
494 MAP_FORMAT_SRGB(B8G8R8A8)
495 [PIPE_FORMAT_A8B8G8R8_SRGB] = VK_FORMAT_A8B8G8R8_SRGB_PACK32,
496 // 16-bits
497 MAP_FORMAT_NORM(R16G16B16A16)
498 MAP_FORMAT_SCALED(R16G16B16A16)
499 MAP_FORMAT_INT(R16G16B16A16)
500 MAP_FORMAT_FLOAT(R16G16B16A16)
501 // 32-bits
502 MAP_FORMAT_INT(R32G32B32A32)
503 MAP_FORMAT_FLOAT(R32G32B32A32)
504
505 // other color formats
506 [PIPE_FORMAT_B5G6R5_UNORM] = VK_FORMAT_R5G6B5_UNORM_PACK16,
507 [PIPE_FORMAT_B5G5R5A1_UNORM] = VK_FORMAT_B5G5R5A1_UNORM_PACK16,
508 [PIPE_FORMAT_R11G11B10_FLOAT] = VK_FORMAT_B10G11R11_UFLOAT_PACK32,
509 [PIPE_FORMAT_R9G9B9E5_FLOAT] = VK_FORMAT_E5B9G9R9_UFLOAT_PACK32,
510 [PIPE_FORMAT_R10G10B10A2_UNORM] = VK_FORMAT_A2B10G10R10_UNORM_PACK32,
511 [PIPE_FORMAT_B10G10R10A2_UNORM] = VK_FORMAT_A2R10G10B10_UNORM_PACK32,
512 [PIPE_FORMAT_R10G10B10A2_UINT] = VK_FORMAT_A2B10G10R10_UINT_PACK32,
513 [PIPE_FORMAT_B10G10R10A2_UINT] = VK_FORMAT_A2R10G10B10_UINT_PACK32,
514
515 // depth/stencil formats
516 [PIPE_FORMAT_Z32_FLOAT] = VK_FORMAT_D32_SFLOAT,
517 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = VK_FORMAT_D32_SFLOAT_S8_UINT,
518 [PIPE_FORMAT_Z16_UNORM] = VK_FORMAT_D16_UNORM,
519 [PIPE_FORMAT_X8Z24_UNORM] = VK_FORMAT_X8_D24_UNORM_PACK32,
520 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = VK_FORMAT_D24_UNORM_S8_UINT,
521 };
522
523 VkFormat
524 zink_get_format(enum pipe_format format)
525 {
526 return formats[format];
527 }
528
529 static bool
530 zink_is_format_supported(struct pipe_screen *pscreen,
531 enum pipe_format format,
532 enum pipe_texture_target target,
533 unsigned sample_count,
534 unsigned storage_sample_count,
535 unsigned bind)
536 {
537 struct zink_screen *screen = zink_screen(pscreen);
538
539 if (sample_count > 1)
540 return FALSE;
541
542 VkFormat vkformat = formats[format];
543 if (vkformat == VK_FORMAT_UNDEFINED)
544 return FALSE;
545
546 VkFormatProperties props;
547 vkGetPhysicalDeviceFormatProperties(screen->pdev, vkformat, &props);
548
549 if (target == PIPE_BUFFER) {
550 if (bind & PIPE_BIND_VERTEX_BUFFER &&
551 !(props.bufferFeatures & VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT))
552 return FALSE;
553 } else {
554 /* all other targets are texture-targets */
555 if (bind & PIPE_BIND_RENDER_TARGET &&
556 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT))
557 return FALSE;
558
559 if (bind & PIPE_BIND_BLENDABLE &&
560 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT))
561 return FALSE;
562
563 if (bind & PIPE_BIND_SAMPLER_VIEW &&
564 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT))
565 return FALSE;
566
567 if (bind & PIPE_BIND_DEPTH_STENCIL &&
568 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT))
569 return FALSE;
570 }
571
572 return TRUE;
573 }
574
575 static void
576 zink_destroy_screen(struct pipe_screen *pscreen)
577 {
578 struct zink_screen *screen = zink_screen(pscreen);
579 slab_destroy_parent(&screen->transfer_pool);
580 FREE(screen);
581 }
582
583 static VkInstance
584 create_instance()
585 {
586 VkApplicationInfo ai = {};
587 ai.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO;
588
589 char proc_name[128];
590 if (os_get_process_name(proc_name, ARRAY_SIZE(proc_name)))
591 ai.pApplicationName = proc_name;
592 else
593 ai.pApplicationName = "unknown";
594
595 ai.pEngineName = "mesa zink";
596 ai.apiVersion = VK_API_VERSION_1_0;
597
598 const char *extensions[] = {
599 VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME,
600 VK_KHR_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME,
601 };
602
603 VkInstanceCreateInfo ici = {};
604 ici.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO;
605 ici.pApplicationInfo = &ai;
606 ici.ppEnabledExtensionNames = extensions;
607 ici.enabledExtensionCount = ARRAY_SIZE(extensions);
608
609 VkInstance instance = VK_NULL_HANDLE;
610 VkResult err = vkCreateInstance(&ici, NULL, &instance);
611 if (err != VK_SUCCESS)
612 return VK_NULL_HANDLE;
613
614 return instance;
615 }
616
617 static VkPhysicalDevice
618 choose_pdev(const VkInstance instance)
619 {
620 uint32_t i, pdev_count;
621 VkPhysicalDevice *pdevs, pdev;
622 vkEnumeratePhysicalDevices(instance, &pdev_count, NULL);
623 assert(pdev_count > 0);
624
625 pdevs = malloc(sizeof(*pdevs) * pdev_count);
626 vkEnumeratePhysicalDevices(instance, &pdev_count, pdevs);
627 assert(pdev_count > 0);
628
629 pdev = pdevs[0];
630 for (i = 0; i < pdev_count; ++i) {
631 VkPhysicalDeviceProperties props;
632 vkGetPhysicalDeviceProperties(pdevs[i], &props);
633 if (props.deviceType == VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU) {
634 pdev = pdevs[i];
635 break;
636 }
637 }
638 free(pdevs);
639 return pdev;
640 }
641
642 static uint32_t
643 find_gfx_queue(const VkPhysicalDevice pdev)
644 {
645 uint32_t num_queues;
646 vkGetPhysicalDeviceQueueFamilyProperties(pdev, &num_queues, NULL);
647 assert(num_queues > 0);
648
649 VkQueueFamilyProperties *props = malloc(sizeof(*props) * num_queues);
650 vkGetPhysicalDeviceQueueFamilyProperties(pdev, &num_queues, props);
651
652 for (uint32_t i = 0; i < num_queues; i++) {
653 if (props[i].queueFlags & VK_QUEUE_GRAPHICS_BIT) {
654 free(props);
655 return i;
656 }
657 }
658
659 return UINT32_MAX;
660 }
661
662 static void
663 zink_flush_frontbuffer(struct pipe_screen *pscreen,
664 struct pipe_resource *pres,
665 unsigned level, unsigned layer,
666 void *winsys_drawable_handle,
667 struct pipe_box *sub_box)
668 {
669 struct zink_screen *screen = zink_screen(pscreen);
670 struct sw_winsys *winsys = screen->winsys;
671 struct zink_resource *res = zink_resource(pres);
672
673 if (!winsys)
674 return;
675 void *map = winsys->displaytarget_map(winsys, res->dt, 0);
676
677 if (map) {
678 VkImageSubresource isr = {};
679 isr.aspectMask = res->aspect;
680 isr.mipLevel = level;
681 isr.arrayLayer = layer;
682 VkSubresourceLayout layout;
683 vkGetImageSubresourceLayout(screen->dev, res->image, &isr, &layout);
684
685 void *ptr;
686 VkResult result = vkMapMemory(screen->dev, res->mem, res->offset, res->size, 0, &ptr);
687 if (result != VK_SUCCESS) {
688 debug_printf("failed to map memory for display\n");
689 return;
690 }
691 for (int i = 0; i < pres->height0; ++i) {
692 uint8_t *src = (uint8_t *)ptr + i * layout.rowPitch;
693 uint8_t *dst = (uint8_t *)map + i * res->dt_stride;
694 memcpy(dst, src, res->dt_stride);
695 }
696 vkUnmapMemory(screen->dev, res->mem);
697 }
698
699 winsys->displaytarget_unmap(winsys, res->dt);
700
701 assert(res->dt);
702 if (res->dt)
703 winsys->displaytarget_display(winsys, res->dt, winsys_drawable_handle, sub_box);
704 }
705
706 static struct pipe_screen *
707 zink_internal_create_screen(struct sw_winsys *winsys, int fd)
708 {
709 struct zink_screen *screen = CALLOC_STRUCT(zink_screen);
710 if (!screen)
711 return NULL;
712
713 zink_debug = debug_get_option_zink_debug();
714
715 screen->instance = create_instance();
716 screen->pdev = choose_pdev(screen->instance);
717 screen->gfx_queue = find_gfx_queue(screen->pdev);
718
719 vkGetPhysicalDeviceProperties(screen->pdev, &screen->props);
720 vkGetPhysicalDeviceFeatures(screen->pdev, &screen->feats);
721 vkGetPhysicalDeviceMemoryProperties(screen->pdev, &screen->mem_props);
722
723 uint32_t num_extensions = 0;
724 if (vkEnumerateDeviceExtensionProperties(screen->pdev, NULL,
725 &num_extensions, NULL) == VK_SUCCESS && num_extensions > 0) {
726 VkExtensionProperties *extensions = MALLOC(sizeof(VkExtensionProperties) *
727 num_extensions);
728 if (extensions) {
729 vkEnumerateDeviceExtensionProperties(screen->pdev, NULL,
730 &num_extensions, extensions);
731
732 for (uint32_t i = 0; i < num_extensions; ++i) {
733 if (!strcmp(extensions[i].extensionName,
734 VK_KHR_MAINTENANCE1_EXTENSION_NAME))
735 screen->have_VK_KHR_maintenance1 = true;
736 }
737 FREE(extensions);
738 }
739 }
740
741 VkDeviceQueueCreateInfo qci = {};
742 float dummy = 0.0f;
743 qci.sType = VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO;
744 qci.queueFamilyIndex = screen->gfx_queue;
745 qci.queueCount = 1;
746 qci.pQueuePriorities = &dummy;
747
748 VkDeviceCreateInfo dci = {};
749 dci.sType = VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO;
750 dci.queueCreateInfoCount = 1;
751 dci.pQueueCreateInfos = &qci;
752 dci.pEnabledFeatures = &screen->feats;
753 const char *extensions[] = {
754 VK_KHR_MAINTENANCE1_EXTENSION_NAME,
755 VK_KHR_EXTERNAL_MEMORY_EXTENSION_NAME,
756 VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME,
757 };
758 dci.ppEnabledExtensionNames = extensions;
759 dci.enabledExtensionCount = ARRAY_SIZE(extensions);
760 if (vkCreateDevice(screen->pdev, &dci, NULL, &screen->dev) != VK_SUCCESS)
761 goto fail;
762
763 screen->winsys = winsys;
764
765 screen->base.get_name = zink_get_name;
766 screen->base.get_vendor = zink_get_vendor;
767 screen->base.get_device_vendor = zink_get_device_vendor;
768 screen->base.get_param = zink_get_param;
769 screen->base.get_paramf = zink_get_paramf;
770 screen->base.get_shader_param = zink_get_shader_param;
771 screen->base.get_compiler_options = zink_get_compiler_options;
772 screen->base.is_format_supported = zink_is_format_supported;
773 screen->base.context_create = zink_context_create;
774 screen->base.flush_frontbuffer = zink_flush_frontbuffer;
775 screen->base.destroy = zink_destroy_screen;
776
777 zink_screen_resource_init(&screen->base);
778 zink_screen_fence_init(&screen->base);
779
780 slab_create_parent(&screen->transfer_pool, sizeof(struct zink_transfer), 16);
781
782 return &screen->base;
783
784 fail:
785 FREE(screen);
786 return NULL;
787 }
788
789 struct pipe_screen *
790 zink_create_screen(struct sw_winsys *winsys)
791 {
792 return zink_internal_create_screen(winsys, -1);
793 }
794
795 struct pipe_screen *
796 zink_drm_create_screen(int fd)
797 {
798 return zink_internal_create_screen(NULL, fd);
799 }