zink: clamped limits to INT_MAX when stored as uint32_t.
[mesa.git] / src / gallium / drivers / zink / zink_screen.c
1 /*
2 * Copyright 2018 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "zink_screen.h"
25
26 #include "zink_compiler.h"
27 #include "zink_context.h"
28 #include "zink_fence.h"
29 #include "zink_public.h"
30 #include "zink_resource.h"
31
32 #include "os/os_process.h"
33 #include "util/u_debug.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_screen.h"
37 #include "util/u_string.h"
38
39 #include "state_tracker/sw_winsys.h"
40
41 static const struct debug_named_value
42 debug_options[] = {
43 { "nir", ZINK_DEBUG_NIR, "Dump NIR during program compile" },
44 { "spirv", ZINK_DEBUG_SPIRV, "Dump SPIR-V during program compile" },
45 { "tgsi", ZINK_DEBUG_TGSI, "Dump TGSI during program compile" },
46 DEBUG_NAMED_VALUE_END
47 };
48
49 DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug, "ZINK_DEBUG", debug_options, 0)
50
51 uint32_t
52 zink_debug;
53
54 static const char *
55 zink_get_vendor(struct pipe_screen *pscreen)
56 {
57 return "Collabora Ltd";
58 }
59
60 static const char *
61 zink_get_device_vendor(struct pipe_screen *pscreen)
62 {
63 struct zink_screen *screen = zink_screen(pscreen);
64 static char buf[1000];
65 snprintf(buf, sizeof(buf), "Unknown (vendor-id: 0x%04x)", screen->props.vendorID);
66 return buf;
67 }
68
69 static const char *
70 zink_get_name(struct pipe_screen *pscreen)
71 {
72 struct zink_screen *screen = zink_screen(pscreen);
73 static char buf[1000];
74 snprintf(buf, sizeof(buf), "zink (%s)", screen->props.deviceName);
75 return buf;
76 }
77
78 static int
79 get_video_mem(struct zink_screen *screen)
80 {
81 VkDeviceSize size = 0;
82 for (uint32_t i = 0; i < screen->mem_props.memoryHeapCount; ++i)
83 size += screen->mem_props.memoryHeaps[i].size;
84 return (int)(size >> 20);
85 }
86
87 static int
88 zink_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
89 {
90 struct zink_screen *screen = zink_screen(pscreen);
91
92 switch (param) {
93 case PIPE_CAP_NPOT_TEXTURES:
94 return 1;
95
96 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
97 return screen->props.limits.maxFragmentDualSrcAttachments;
98
99 case PIPE_CAP_POINT_SPRITE:
100 return 1;
101
102 case PIPE_CAP_MAX_RENDER_TARGETS:
103 return screen->props.limits.maxColorAttachments;
104
105 case PIPE_CAP_OCCLUSION_QUERY:
106 case PIPE_CAP_QUERY_TIME_ELAPSED:
107 return 1;
108
109 case PIPE_CAP_TEXTURE_SWIZZLE:
110 return 1;
111
112 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
113 return screen->props.limits.maxImageDimension2D;
114 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
115 return 1 + util_logbase2(screen->props.limits.maxImageDimension3D);
116 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
117 return 1 + util_logbase2(screen->props.limits.maxImageDimensionCube);
118
119 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
120 return 1;
121
122 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
123 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
124 case PIPE_CAP_VERTEX_SHADER_SATURATE:
125 return 1;
126
127 case PIPE_CAP_INDEP_BLEND_ENABLE:
128 case PIPE_CAP_INDEP_BLEND_FUNC:
129 return 1;
130
131 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
132 return screen->props.limits.maxImageArrayLayers;
133
134 #if 0 /* TODO: Enable me */
135 case PIPE_CAP_DEPTH_CLIP_DISABLE:
136 return 0;
137 #endif
138
139 #if 0 /* TODO: Enable me */
140 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
141 return 1;
142 #endif
143
144 case PIPE_CAP_SEAMLESS_CUBE_MAP:
145 return 1;
146
147 case PIPE_CAP_MIN_TEXEL_OFFSET:
148 return screen->props.limits.minTexelOffset;
149 case PIPE_CAP_MAX_TEXEL_OFFSET:
150 return screen->props.limits.maxTexelOffset;
151
152 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
153 return 1;
154
155 case PIPE_CAP_GLSL_FEATURE_LEVEL:
156 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
157 return 450; /* unsure (probably wrong) */
158
159 #if 0 /* TODO: Enable me */
160 case PIPE_CAP_COMPUTE:
161 return 1;
162 #endif
163
164 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
165 return screen->props.limits.minUniformBufferOffsetAlignment;
166
167 case PIPE_CAP_QUERY_TIMESTAMP:
168 return 1;
169
170 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
171 return screen->props.limits.minMemoryMapAlignment;
172
173 case PIPE_CAP_CUBE_MAP_ARRAY:
174 return screen->feats.imageCubeArray;
175
176 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
177 return 0; /* unsure */
178
179 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
180 return screen->props.limits.maxTexelBufferElements;
181
182 case PIPE_CAP_ENDIANNESS:
183 return PIPE_ENDIAN_NATIVE; /* unsure */
184
185 case PIPE_CAP_MAX_VIEWPORTS:
186 return screen->props.limits.maxViewports;
187
188 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
189 return 1;
190
191 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
192 return screen->props.limits.maxGeometryOutputVertices;
193 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
194 return screen->props.limits.maxGeometryOutputComponents;
195
196 #if 0 /* TODO: Enable me. Enables ARB_texture_gather */
197 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
198 return 4;
199 #endif
200
201 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
202 return screen->props.limits.minTexelGatherOffset;
203 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
204 return screen->props.limits.maxTexelGatherOffset;
205
206 case PIPE_CAP_VENDOR_ID:
207 return screen->props.vendorID;
208 case PIPE_CAP_DEVICE_ID:
209 return screen->props.deviceID;
210
211 case PIPE_CAP_ACCELERATED:
212 return 1;
213 case PIPE_CAP_VIDEO_MEMORY:
214 return get_video_mem(screen);
215 case PIPE_CAP_UMA:
216 /* inaccurate */
217 return screen->props.deviceType == VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
218
219 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
220 return screen->props.limits.maxVertexInputBindingStride;
221
222 #if 0 /* TODO: Enable me */
223 case PIPE_CAP_SAMPLER_VIEW_TARGET:
224 return 1;
225 #endif
226
227 #if 0 /* TODO: Enable me */
228 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
229 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
230 return 1;
231 #endif
232
233 case PIPE_CAP_SHAREABLE_SHADERS:
234 return 1;
235
236 #if 0 /* TODO: Enable me. Enables GL_ARB_shader_storage_buffer_object */
237 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
238 return screen->props.limits.minStorageBufferOffsetAlignment;
239 #endif
240
241 case PIPE_CAP_PCI_GROUP:
242 case PIPE_CAP_PCI_BUS:
243 case PIPE_CAP_PCI_DEVICE:
244 case PIPE_CAP_PCI_FUNCTION:
245 return 0; /* TODO: figure these out */
246
247 #if 0 /* TODO: Enable me */
248 case PIPE_CAP_CULL_DISTANCE:
249 return screen->feats.shaderCullDistance;
250 #endif
251
252 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
253 return screen->props.limits.viewportSubPixelBits;
254
255 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
256 return 0; /* not sure */
257
258 case PIPE_CAP_MAX_GS_INVOCATIONS:
259 return 0; /* not implemented */
260
261 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
262 return screen->props.limits.maxDescriptorSetStorageBuffers;
263
264 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
265 return screen->props.limits.maxStorageBufferRange; /* unsure */
266
267 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
268 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
269 return 1;
270
271 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
272 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
273 return 0;
274
275 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
276 return 1;
277
278 case PIPE_CAP_FLATSHADE:
279 return 0;
280
281 default:
282 return u_pipe_screen_get_param_defaults(pscreen, param);
283 }
284 }
285
286 static float
287 zink_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
288 {
289 struct zink_screen *screen = zink_screen(pscreen);
290
291 switch (param) {
292 case PIPE_CAPF_MAX_LINE_WIDTH:
293 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
294 return screen->props.limits.lineWidthRange[1];
295
296 case PIPE_CAPF_MAX_POINT_WIDTH:
297 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
298 return screen->props.limits.pointSizeRange[1];
299
300 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
301 return screen->props.limits.maxSamplerAnisotropy;
302
303 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
304 return screen->props.limits.maxSamplerLodBias;
305
306 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
307 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
308 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
309 return 0.0f; /* not implemented */
310 }
311
312 /* should only get here on unhandled cases */
313 return 0.0;
314 }
315
316 static int
317 zink_get_shader_param(struct pipe_screen *pscreen,
318 enum pipe_shader_type shader,
319 enum pipe_shader_cap param)
320 {
321 struct zink_screen *screen = zink_screen(pscreen);
322
323 switch (param) {
324 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
325 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
326 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
327 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
328 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
329 if (shader == PIPE_SHADER_VERTEX ||
330 shader == PIPE_SHADER_FRAGMENT)
331 return INT_MAX;
332 return 0;
333
334 case PIPE_SHADER_CAP_MAX_INPUTS:
335 switch (shader) {
336 case PIPE_SHADER_VERTEX:
337 return MIN2(screen->props.limits.maxVertexInputAttributes,
338 PIPE_MAX_SHADER_INPUTS);
339 case PIPE_SHADER_FRAGMENT:
340 return MIN2(screen->props.limits.maxFragmentInputComponents / 4,
341 PIPE_MAX_SHADER_INPUTS);
342 default:
343 return 0; /* unsupported stage */
344 }
345
346 case PIPE_SHADER_CAP_MAX_OUTPUTS:
347 switch (shader) {
348 case PIPE_SHADER_VERTEX:
349 return MIN2(screen->props.limits.maxVertexOutputComponents / 4,
350 PIPE_MAX_SHADER_OUTPUTS);
351 case PIPE_SHADER_FRAGMENT:
352 return MIN2(screen->props.limits.maxColorAttachments,
353 PIPE_MAX_SHADER_OUTPUTS);
354 default:
355 return 0; /* unsupported stage */
356 }
357
358 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
359 /* this might be a bit simplistic... */
360 return MIN2(screen->props.limits.maxPerStageDescriptorSamplers,
361 PIPE_MAX_SAMPLERS);
362
363 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
364 return MIN2(screen->props.limits.maxUniformBufferRange, INT_MAX);
365
366 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
367 return screen->props.limits.maxPerStageDescriptorUniformBuffers;
368
369 case PIPE_SHADER_CAP_MAX_TEMPS:
370 return INT_MAX;
371
372 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
373 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
374 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
375 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
376 case PIPE_SHADER_CAP_SUBROUTINES:
377 case PIPE_SHADER_CAP_INTEGERS:
378 case PIPE_SHADER_CAP_INT64_ATOMICS:
379 case PIPE_SHADER_CAP_FP16:
380 return 0; /* not implemented */
381
382 case PIPE_SHADER_CAP_PREFERRED_IR:
383 return PIPE_SHADER_IR_NIR;
384
385 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
386 return 0; /* not implemented */
387
388 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
389 return MIN2(screen->props.limits.maxPerStageDescriptorSampledImages,
390 PIPE_MAX_SHADER_SAMPLER_VIEWS);
391
392 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
393 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
394 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
395 return 0; /* not implemented */
396
397 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
398 return 0; /* no idea */
399
400 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
401 return 32; /* arbitrary */
402
403 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
404 /* TODO: this limitation is dumb, and will need some fixes in mesa */
405 return MIN2(screen->props.limits.maxPerStageDescriptorStorageBuffers, 8);
406
407 case PIPE_SHADER_CAP_SUPPORTED_IRS:
408 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
409
410 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
411 return MIN2(screen->props.limits.maxPerStageDescriptorStorageImages,
412 PIPE_MAX_SHADER_IMAGES);
413
414 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
415 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
416 return 0; /* unsure */
417
418 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
419 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
420 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
421 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
422 return 0; /* not implemented */
423 }
424
425 /* should only get here on unhandled cases */
426 return 0;
427 }
428
429 static const VkFormat formats[PIPE_FORMAT_COUNT] = {
430 #define MAP_FORMAT_NORM(FMT) \
431 [PIPE_FORMAT_ ## FMT ## _UNORM] = VK_FORMAT_ ## FMT ## _UNORM, \
432 [PIPE_FORMAT_ ## FMT ## _SNORM] = VK_FORMAT_ ## FMT ## _SNORM,
433
434 #define MAP_FORMAT_SCALED(FMT) \
435 [PIPE_FORMAT_ ## FMT ## _USCALED] = VK_FORMAT_ ## FMT ## _USCALED, \
436 [PIPE_FORMAT_ ## FMT ## _SSCALED] = VK_FORMAT_ ## FMT ## _SSCALED,
437
438 #define MAP_FORMAT_INT(FMT) \
439 [PIPE_FORMAT_ ## FMT ## _UINT] = VK_FORMAT_ ## FMT ## _UINT, \
440 [PIPE_FORMAT_ ## FMT ## _SINT] = VK_FORMAT_ ## FMT ## _SINT,
441
442 #define MAP_FORMAT_SRGB(FMT) \
443 [PIPE_FORMAT_ ## FMT ## _SRGB] = VK_FORMAT_ ## FMT ## _SRGB,
444
445 #define MAP_FORMAT_FLOAT(FMT) \
446 [PIPE_FORMAT_ ## FMT ## _FLOAT] = VK_FORMAT_ ## FMT ## _SFLOAT,
447
448 // one component
449
450 // 8-bits
451 MAP_FORMAT_NORM(R8)
452 MAP_FORMAT_SCALED(R8)
453 MAP_FORMAT_INT(R8)
454 // 16-bits
455 MAP_FORMAT_NORM(R16)
456 MAP_FORMAT_SCALED(R16)
457 MAP_FORMAT_INT(R16)
458 MAP_FORMAT_FLOAT(R16)
459 // 32-bits
460 MAP_FORMAT_INT(R32)
461 MAP_FORMAT_FLOAT(R32)
462
463 // two components
464
465 // 8-bits
466 MAP_FORMAT_NORM(R8G8)
467 MAP_FORMAT_SCALED(R8G8)
468 MAP_FORMAT_INT(R8G8)
469 // 16-bits
470 MAP_FORMAT_NORM(R16G16)
471 MAP_FORMAT_SCALED(R16G16)
472 MAP_FORMAT_INT(R16G16)
473 MAP_FORMAT_FLOAT(R16G16)
474 // 32-bits
475 MAP_FORMAT_INT(R32G32)
476 MAP_FORMAT_FLOAT(R32G32)
477
478 // three components
479
480 // 8-bits
481 MAP_FORMAT_NORM(R8G8B8)
482 MAP_FORMAT_SCALED(R8G8B8)
483 MAP_FORMAT_INT(R8G8B8)
484 MAP_FORMAT_SRGB(R8G8B8)
485 // 16-bits
486 MAP_FORMAT_NORM(R16G16B16)
487 MAP_FORMAT_SCALED(R16G16B16)
488 MAP_FORMAT_INT(R16G16B16)
489 MAP_FORMAT_FLOAT(R16G16B16)
490 // 32-bits
491 MAP_FORMAT_INT(R32G32B32)
492 MAP_FORMAT_FLOAT(R32G32B32)
493
494 // four components
495
496 // 8-bits
497 MAP_FORMAT_NORM(R8G8B8A8)
498 MAP_FORMAT_SCALED(R8G8B8A8)
499 MAP_FORMAT_INT(R8G8B8A8)
500 MAP_FORMAT_SRGB(R8G8B8A8)
501 [PIPE_FORMAT_B8G8R8A8_UNORM] = VK_FORMAT_B8G8R8A8_UNORM,
502 MAP_FORMAT_SRGB(B8G8R8A8)
503 [PIPE_FORMAT_A8B8G8R8_SRGB] = VK_FORMAT_A8B8G8R8_SRGB_PACK32,
504 // 16-bits
505 MAP_FORMAT_NORM(R16G16B16A16)
506 MAP_FORMAT_SCALED(R16G16B16A16)
507 MAP_FORMAT_INT(R16G16B16A16)
508 MAP_FORMAT_FLOAT(R16G16B16A16)
509 // 32-bits
510 MAP_FORMAT_INT(R32G32B32A32)
511 MAP_FORMAT_FLOAT(R32G32B32A32)
512
513 // other color formats
514 [PIPE_FORMAT_B5G6R5_UNORM] = VK_FORMAT_R5G6B5_UNORM_PACK16,
515 [PIPE_FORMAT_B5G5R5A1_UNORM] = VK_FORMAT_B5G5R5A1_UNORM_PACK16,
516 [PIPE_FORMAT_R11G11B10_FLOAT] = VK_FORMAT_B10G11R11_UFLOAT_PACK32,
517 [PIPE_FORMAT_R9G9B9E5_FLOAT] = VK_FORMAT_E5B9G9R9_UFLOAT_PACK32,
518 [PIPE_FORMAT_R10G10B10A2_UNORM] = VK_FORMAT_A2B10G10R10_UNORM_PACK32,
519 [PIPE_FORMAT_B10G10R10A2_UNORM] = VK_FORMAT_A2R10G10B10_UNORM_PACK32,
520 [PIPE_FORMAT_R10G10B10A2_UINT] = VK_FORMAT_A2B10G10R10_UINT_PACK32,
521 [PIPE_FORMAT_B10G10R10A2_UINT] = VK_FORMAT_A2R10G10B10_UINT_PACK32,
522
523 // depth/stencil formats
524 [PIPE_FORMAT_Z32_FLOAT] = VK_FORMAT_D32_SFLOAT,
525 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = VK_FORMAT_D32_SFLOAT_S8_UINT,
526 [PIPE_FORMAT_Z16_UNORM] = VK_FORMAT_D16_UNORM,
527 [PIPE_FORMAT_X8Z24_UNORM] = VK_FORMAT_X8_D24_UNORM_PACK32,
528 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = VK_FORMAT_D24_UNORM_S8_UINT,
529 };
530
531 VkFormat
532 zink_get_format(enum pipe_format format)
533 {
534 return formats[format];
535 }
536
537 static bool
538 zink_is_format_supported(struct pipe_screen *pscreen,
539 enum pipe_format format,
540 enum pipe_texture_target target,
541 unsigned sample_count,
542 unsigned storage_sample_count,
543 unsigned bind)
544 {
545 struct zink_screen *screen = zink_screen(pscreen);
546
547 if (sample_count > 1)
548 return FALSE;
549
550 VkFormat vkformat = formats[format];
551 if (vkformat == VK_FORMAT_UNDEFINED)
552 return FALSE;
553
554 VkFormatProperties props;
555 vkGetPhysicalDeviceFormatProperties(screen->pdev, vkformat, &props);
556
557 if (target == PIPE_BUFFER) {
558 if (bind & PIPE_BIND_VERTEX_BUFFER &&
559 !(props.bufferFeatures & VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT))
560 return FALSE;
561 } else {
562 /* all other targets are texture-targets */
563 if (bind & PIPE_BIND_RENDER_TARGET &&
564 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT))
565 return FALSE;
566
567 if (bind & PIPE_BIND_BLENDABLE &&
568 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT))
569 return FALSE;
570
571 if (bind & PIPE_BIND_SAMPLER_VIEW &&
572 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT))
573 return FALSE;
574
575 if (bind & PIPE_BIND_DEPTH_STENCIL &&
576 !(props.optimalTilingFeatures & VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT))
577 return FALSE;
578 }
579
580 return TRUE;
581 }
582
583 static void
584 zink_destroy_screen(struct pipe_screen *pscreen)
585 {
586 struct zink_screen *screen = zink_screen(pscreen);
587 slab_destroy_parent(&screen->transfer_pool);
588 FREE(screen);
589 }
590
591 static VkInstance
592 create_instance()
593 {
594 VkApplicationInfo ai = {};
595 ai.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO;
596
597 char proc_name[128];
598 if (os_get_process_name(proc_name, ARRAY_SIZE(proc_name)))
599 ai.pApplicationName = proc_name;
600 else
601 ai.pApplicationName = "unknown";
602
603 ai.pEngineName = "mesa zink";
604 ai.apiVersion = VK_API_VERSION_1_0;
605
606 const char *extensions[] = {
607 VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME,
608 VK_KHR_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME,
609 };
610
611 VkInstanceCreateInfo ici = {};
612 ici.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO;
613 ici.pApplicationInfo = &ai;
614 ici.ppEnabledExtensionNames = extensions;
615 ici.enabledExtensionCount = ARRAY_SIZE(extensions);
616
617 VkInstance instance = VK_NULL_HANDLE;
618 VkResult err = vkCreateInstance(&ici, NULL, &instance);
619 if (err != VK_SUCCESS)
620 return VK_NULL_HANDLE;
621
622 return instance;
623 }
624
625 static VkPhysicalDevice
626 choose_pdev(const VkInstance instance)
627 {
628 uint32_t i, pdev_count;
629 VkPhysicalDevice *pdevs, pdev;
630 vkEnumeratePhysicalDevices(instance, &pdev_count, NULL);
631 assert(pdev_count > 0);
632
633 pdevs = malloc(sizeof(*pdevs) * pdev_count);
634 vkEnumeratePhysicalDevices(instance, &pdev_count, pdevs);
635 assert(pdev_count > 0);
636
637 pdev = pdevs[0];
638 for (i = 0; i < pdev_count; ++i) {
639 VkPhysicalDeviceProperties props;
640 vkGetPhysicalDeviceProperties(pdevs[i], &props);
641 if (props.deviceType == VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU) {
642 pdev = pdevs[i];
643 break;
644 }
645 }
646 free(pdevs);
647 return pdev;
648 }
649
650 static uint32_t
651 find_gfx_queue(const VkPhysicalDevice pdev)
652 {
653 uint32_t num_queues;
654 vkGetPhysicalDeviceQueueFamilyProperties(pdev, &num_queues, NULL);
655 assert(num_queues > 0);
656
657 VkQueueFamilyProperties *props = malloc(sizeof(*props) * num_queues);
658 vkGetPhysicalDeviceQueueFamilyProperties(pdev, &num_queues, props);
659
660 for (uint32_t i = 0; i < num_queues; i++) {
661 if (props[i].queueFlags & VK_QUEUE_GRAPHICS_BIT) {
662 free(props);
663 return i;
664 }
665 }
666
667 return UINT32_MAX;
668 }
669
670 static void
671 zink_flush_frontbuffer(struct pipe_screen *pscreen,
672 struct pipe_resource *pres,
673 unsigned level, unsigned layer,
674 void *winsys_drawable_handle,
675 struct pipe_box *sub_box)
676 {
677 struct zink_screen *screen = zink_screen(pscreen);
678 struct sw_winsys *winsys = screen->winsys;
679 struct zink_resource *res = zink_resource(pres);
680
681 if (!winsys)
682 return;
683 void *map = winsys->displaytarget_map(winsys, res->dt, 0);
684
685 if (map) {
686 VkImageSubresource isr = {};
687 isr.aspectMask = res->aspect;
688 isr.mipLevel = level;
689 isr.arrayLayer = layer;
690 VkSubresourceLayout layout;
691 vkGetImageSubresourceLayout(screen->dev, res->image, &isr, &layout);
692
693 void *ptr;
694 VkResult result = vkMapMemory(screen->dev, res->mem, res->offset, res->size, 0, &ptr);
695 if (result != VK_SUCCESS) {
696 debug_printf("failed to map memory for display\n");
697 return;
698 }
699 for (int i = 0; i < pres->height0; ++i) {
700 uint8_t *src = (uint8_t *)ptr + i * layout.rowPitch;
701 uint8_t *dst = (uint8_t *)map + i * res->dt_stride;
702 memcpy(dst, src, res->dt_stride);
703 }
704 vkUnmapMemory(screen->dev, res->mem);
705 }
706
707 winsys->displaytarget_unmap(winsys, res->dt);
708
709 assert(res->dt);
710 if (res->dt)
711 winsys->displaytarget_display(winsys, res->dt, winsys_drawable_handle, sub_box);
712 }
713
714 static struct pipe_screen *
715 zink_internal_create_screen(struct sw_winsys *winsys, int fd)
716 {
717 struct zink_screen *screen = CALLOC_STRUCT(zink_screen);
718 if (!screen)
719 return NULL;
720
721 zink_debug = debug_get_option_zink_debug();
722
723 screen->instance = create_instance();
724 screen->pdev = choose_pdev(screen->instance);
725 screen->gfx_queue = find_gfx_queue(screen->pdev);
726
727 vkGetPhysicalDeviceProperties(screen->pdev, &screen->props);
728 vkGetPhysicalDeviceFeatures(screen->pdev, &screen->feats);
729 vkGetPhysicalDeviceMemoryProperties(screen->pdev, &screen->mem_props);
730
731 uint32_t num_extensions = 0;
732 if (vkEnumerateDeviceExtensionProperties(screen->pdev, NULL,
733 &num_extensions, NULL) == VK_SUCCESS && num_extensions > 0) {
734 VkExtensionProperties *extensions = MALLOC(sizeof(VkExtensionProperties) *
735 num_extensions);
736 if (extensions) {
737 vkEnumerateDeviceExtensionProperties(screen->pdev, NULL,
738 &num_extensions, extensions);
739
740 for (uint32_t i = 0; i < num_extensions; ++i) {
741 if (!strcmp(extensions[i].extensionName,
742 VK_KHR_MAINTENANCE1_EXTENSION_NAME))
743 screen->have_VK_KHR_maintenance1 = true;
744 }
745 FREE(extensions);
746 }
747 }
748
749 VkDeviceQueueCreateInfo qci = {};
750 float dummy = 0.0f;
751 qci.sType = VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO;
752 qci.queueFamilyIndex = screen->gfx_queue;
753 qci.queueCount = 1;
754 qci.pQueuePriorities = &dummy;
755
756 VkDeviceCreateInfo dci = {};
757 dci.sType = VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO;
758 dci.queueCreateInfoCount = 1;
759 dci.pQueueCreateInfos = &qci;
760 dci.pEnabledFeatures = &screen->feats;
761 const char *extensions[] = {
762 VK_KHR_MAINTENANCE1_EXTENSION_NAME,
763 VK_KHR_EXTERNAL_MEMORY_EXTENSION_NAME,
764 VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME,
765 };
766 dci.ppEnabledExtensionNames = extensions;
767 dci.enabledExtensionCount = ARRAY_SIZE(extensions);
768 if (vkCreateDevice(screen->pdev, &dci, NULL, &screen->dev) != VK_SUCCESS)
769 goto fail;
770
771 screen->winsys = winsys;
772
773 screen->base.get_name = zink_get_name;
774 screen->base.get_vendor = zink_get_vendor;
775 screen->base.get_device_vendor = zink_get_device_vendor;
776 screen->base.get_param = zink_get_param;
777 screen->base.get_paramf = zink_get_paramf;
778 screen->base.get_shader_param = zink_get_shader_param;
779 screen->base.get_compiler_options = zink_get_compiler_options;
780 screen->base.is_format_supported = zink_is_format_supported;
781 screen->base.context_create = zink_context_create;
782 screen->base.flush_frontbuffer = zink_flush_frontbuffer;
783 screen->base.destroy = zink_destroy_screen;
784
785 zink_screen_resource_init(&screen->base);
786 zink_screen_fence_init(&screen->base);
787
788 slab_create_parent(&screen->transfer_pool, sizeof(struct zink_transfer), 16);
789
790 return &screen->base;
791
792 fail:
793 FREE(screen);
794 return NULL;
795 }
796
797 struct pipe_screen *
798 zink_create_screen(struct sw_winsys *winsys)
799 {
800 return zink_internal_create_screen(winsys, -1);
801 }
802
803 struct pipe_screen *
804 zink_drm_create_screen(int fd)
805 {
806 return zink_internal_create_screen(NULL, fd);
807 }