src/gallium/winsys/amdgpu/drm/addrlib/r800/chip/si_ci_vi_merged_enum.h

   1 /*
   2  * Copyright © 2014 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  */
  26 #if !defined (SI_CI_VI_MERGED_ENUM_HEADER)
  27 #define SI_CI_VI_MERGED_ENUM_HEADER
  28
  29 typedef enum PipeInterleaveSize {
  30 ADDR_CONFIG_PIPE_INTERLEAVE_256B         = 0x00000000,
  31 ADDR_CONFIG_PIPE_INTERLEAVE_512B         = 0x00000001,
  32 } PipeInterleaveSize;
  33
  34 typedef enum RowSize {
  35 ADDR_CONFIG_1KB_ROW                      = 0x00000000,
  36 ADDR_CONFIG_2KB_ROW                      = 0x00000001,
  37 ADDR_CONFIG_4KB_ROW                      = 0x00000002,
  38 } RowSize;
  39
  40 #endif