src/gallium/winsys/drm/radeon/core/radeon_r300.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "radeon_r300.h"
  24
  25 static void radeon_r300_set_flush_cb(struct r300_winsys *winsys,
  26                                      void (*flush_cb)(void *),
  27                                      void *data)
  28 {
  29     struct radeon_winsys_priv* priv =
  30         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  31
  32     radeon_cs_space_set_flush(priv->cs, flush_cb,
  33                               data);
  34 }
  35
  36 static boolean radeon_r300_add_buffer(struct r300_winsys* winsys,
  37                                       struct pipe_buffer* pbuffer,
  38                                       uint32_t rd,
  39                                       uint32_t wd)
  40 {
  41     struct radeon_winsys_priv* priv =
  42         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  43     struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo;
  44
  45     radeon_cs_space_add_persistent_bo(priv->cs, bo, rd, wd);
  46     return TRUE;
  47 }
  48
  49 static boolean radeon_r300_validate(struct r300_winsys* winsys)
  50 {
  51     struct radeon_winsys_priv* priv =
  52         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  53
  54     if (radeon_cs_space_check(priv->cs) < 0) {
  55         return FALSE;
  56     }
  57
  58     /* Things are fine, we can proceed as normal. */
  59     return TRUE;
  60 }
  61
  62 static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size)
  63 {
  64     /* XXX check size here, lazy ass! */
  65     /* XXX also validate buffers */
  66     return TRUE;
  67 }
  68
  69 static void radeon_r300_begin_cs(struct r300_winsys* winsys,
  70                                  int size,
  71                                  const char* file,
  72                                  const char* function,
  73                                  int line)
  74 {
  75     struct radeon_winsys_priv* priv =
  76         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  77
  78     radeon_cs_begin(priv->cs, size, file, function, line);
  79 }
  80
  81 static void radeon_r300_write_cs_dword(struct r300_winsys* winsys,
  82                                        uint32_t dword)
  83 {
  84     struct radeon_winsys_priv* priv =
  85         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  86
  87     radeon_cs_write_dword(priv->cs, dword);
  88 }
  89
  90 static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys,
  91                                        struct pipe_buffer* pbuffer,
  92                                        uint32_t rd,
  93                                        uint32_t wd,
  94                                        uint32_t flags)
  95 {
  96     struct radeon_winsys_priv* priv =
  97         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  98     int retval = 0;
  99
 100     retval = radeon_cs_write_reloc(priv->cs,
 101             ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags);
 102
 103     if (retval) {
 104         debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n",
 105                 pbuffer, rd, wd, flags);
 106     }
 107 }
 108
 109 static void radeon_r300_reset_bos(struct r300_winsys *winsys)
 110 {
 111     struct radeon_winsys_priv* priv =
 112         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 113     radeon_cs_space_reset_bos(priv->cs);
 114 }
 115
 116 static void radeon_r300_end_cs(struct r300_winsys* winsys,
 117                                const char* file,
 118                                const char* function,
 119                                int line)
 120 {
 121     struct radeon_winsys_priv* priv =
 122         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 123
 124     radeon_cs_end(priv->cs, file, function, line);
 125 }
 126
 127 static void radeon_r300_flush_cs(struct r300_winsys* winsys)
 128 {
 129     struct radeon_winsys_priv* priv =
 130         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 131     int retval;
 132
 133     /* Emit the CS. */
 134     retval = radeon_cs_emit(priv->cs);
 135     if (retval) {
 136         debug_printf("radeon: Bad CS, dumping...\n");
 137         radeon_cs_print(priv->cs, stderr);
 138     }
 139
 140     /* Reset CS.
 141      * Someday, when we care about performance, we should really find a way
 142      * to rotate between two or three CS objects so that the GPU can be
 143      * spinning through one CS while another one is being filled. */
 144     radeon_cs_erase(priv->cs);
 145 }
 146
 147 /* Helper function to do the ioctls needed for setup and init. */
 148 static void do_ioctls(struct r300_winsys* winsys, int fd)
 149 {
 150     struct drm_radeon_gem_info gem_info = {0};
 151     struct drm_radeon_info info = {0};
 152     int target = 0;
 153     int retval;
 154
 155     info.value = (unsigned long)&target;
 156
 157     /* First, get the number of pixel pipes */
 158     info.request = RADEON_INFO_NUM_GB_PIPES;
 159     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
 160     if (retval) {
 161         fprintf(stderr, "%s: Failed to get GB pipe count, "
 162                 "error number %d\n", __FUNCTION__, retval);
 163         exit(1);
 164     }
 165     winsys->gb_pipes = target;
 166
 167     /* get Z pipes */
 168     info.request = RADEON_INFO_NUM_Z_PIPES;
 169     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
 170     if (retval) {
 171         fprintf(stderr, "%s: Failed to get GB pipe count, "
 172                 "error number %d\n", __FUNCTION__, retval);
 173         exit(1);
 174     }
 175     winsys->z_pipes = target;
 176
 177     /* Then, get PCI ID */
 178     info.request = RADEON_INFO_DEVICE_ID;
 179     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
 180     if (retval) {
 181         fprintf(stderr, "%s: Failed to get PCI ID, "
 182                 "error number %d\n", __FUNCTION__, retval);
 183         exit(1);
 184     }
 185     winsys->pci_id = target;
 186
 187     /* Finally, retrieve MM info */
 188     retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
 189             &gem_info, sizeof(gem_info));
 190     if (retval) {
 191         fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
 192                 __FUNCTION__, retval);
 193         exit(1);
 194     }
 195     winsys->gart_size = gem_info.gart_size;
 196     /* XXX */
 197     winsys->vram_size = gem_info.vram_visible;
 198 }
 199
 200 struct r300_winsys*
 201 radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys)
 202 {
 203     struct r300_winsys* winsys = CALLOC_STRUCT(r300_winsys);
 204     struct radeon_winsys_priv* priv;
 205
 206     if (winsys == NULL) {
 207         return NULL;
 208     }
 209
 210     priv = old_winsys->priv;
 211
 212     do_ioctls(winsys, fd);
 213
 214     priv->csm = radeon_cs_manager_gem_ctor(fd);
 215
 216     priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4);
 217     radeon_cs_set_limit(priv->cs,
 218             RADEON_GEM_DOMAIN_GTT, winsys->gart_size);
 219     radeon_cs_set_limit(priv->cs,
 220             RADEON_GEM_DOMAIN_VRAM, winsys->vram_size);
 221
 222     winsys->add_buffer = radeon_r300_add_buffer;
 223     winsys->validate = radeon_r300_validate;
 224
 225     winsys->check_cs = radeon_r300_check_cs;
 226     winsys->begin_cs = radeon_r300_begin_cs;
 227     winsys->write_cs_dword = radeon_r300_write_cs_dword;
 228     winsys->write_cs_reloc = radeon_r300_write_cs_reloc;
 229     winsys->end_cs = radeon_r300_end_cs;
 230     winsys->flush_cs = radeon_r300_flush_cs;
 231     winsys->reset_bos = radeon_r300_reset_bos;
 232     winsys->set_flush_cb = radeon_r300_set_flush_cb;
 233
 234     memcpy(winsys, old_winsys, sizeof(struct radeon_winsys));
 235
 236     return winsys;
 237 }