2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
33 #include <util/u_double_list.h>
34 #include <util/u_inlines.h>
35 #include "util/u_hash_table.h"
36 #include <os/os_thread.h>
39 #define PKT_COUNT_C 0xC000FFFF
40 #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
50 enum chip_class chip_class
;
51 struct r600_tiling_info tiling_info
;
52 struct r600_bomgr
*bomgr
;
55 struct r600_bo
*fence_bo
;
56 unsigned clock_crystal_freq
;
57 unsigned num_backends
;
58 unsigned minor_version
;
60 /* List of buffer handles and its mutex. */
61 struct util_hash_table
*bo_handles
;
62 pipe_mutex bo_handles_mutex
;
65 #define REG_FLAG_NEED_BO 1
66 #define REG_FLAG_DIRTY_ALWAYS 2
78 struct pipe_reference reference
;
84 struct list_head fencedlist
;
86 struct r600_context
*ctx
;
88 struct r600_reloc
*reloc
;
95 struct pipe_reference reference
;
97 unsigned tiling_flags
;
98 unsigned kernel_pitch
;
100 struct radeon_bo
*bo
;
103 struct list_head list
;
112 struct radeon
*radeon
;
115 struct list_head delayed
;
116 unsigned num_delayed
;
122 struct radeon
*r600_new(int fd
, unsigned device
);
123 void r600_delete(struct radeon
*r600
);
128 unsigned radeon_family_from_device(unsigned device
);
133 struct radeon_bo
*radeon_bo(struct radeon
*radeon
, unsigned handle
,
134 unsigned size
, unsigned alignment
);
135 void radeon_bo_reference(struct radeon
*radeon
, struct radeon_bo
**dst
,
136 struct radeon_bo
*src
);
137 int radeon_bo_wait(struct radeon
*radeon
, struct radeon_bo
*bo
);
138 int radeon_bo_busy(struct radeon
*radeon
, struct radeon_bo
*bo
, uint32_t *domain
);
139 int radeon_bo_fencelist(struct radeon
*radeon
, struct radeon_bo
**bolist
, uint32_t num_bo
);
140 int radeon_bo_get_tiling_flags(struct radeon
*radeon
,
141 struct radeon_bo
*bo
,
142 uint32_t *tiling_flags
,
144 int radeon_bo_get_name(struct radeon
*radeon
,
145 struct radeon_bo
*bo
,
151 int r600_context_init_fence(struct r600_context
*ctx
);
152 void r600_context_bo_reloc(struct r600_context
*ctx
, u32
*pm4
, struct r600_bo
*rbo
);
153 void r600_context_bo_flush(struct r600_context
*ctx
, unsigned flush_flags
,
154 unsigned flush_mask
, struct r600_bo
*rbo
);
155 struct r600_bo
*r600_context_reg_bo(struct r600_context
*ctx
, unsigned offset
);
156 int r600_context_add_block(struct r600_context
*ctx
, const struct r600_reg
*reg
, unsigned nreg
);
157 void r600_context_pipe_state_set_resource(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned offset
);
158 void r600_context_block_emit_dirty(struct r600_context
*ctx
, struct r600_block
*block
);
159 void r600_context_dirty_block(struct r600_context
*ctx
, struct r600_block
*block
,
160 int dirty
, int index
);
162 void r600_context_reg(struct r600_context
*ctx
,
163 unsigned offset
, unsigned value
,
168 void r600_bo_destroy(struct radeon
*radeon
, struct r600_bo
*bo
);
173 struct r600_bomgr
*r600_bomgr_create(struct radeon
*radeon
, unsigned usecs
);
174 void r600_bomgr_destroy(struct r600_bomgr
*mgr
);
175 bool r600_bomgr_bo_destroy(struct r600_bomgr
*mgr
, struct r600_bo
*bo
);
176 void r600_bomgr_bo_init(struct r600_bomgr
*mgr
, struct r600_bo
*bo
);
177 struct r600_bo
*r600_bomgr_bo_create(struct r600_bomgr
*mgr
,
186 #define CTX_RANGE_ID(ctx, offset) (((offset) >> (ctx)->hash_shift) & 255)
187 #define CTX_BLOCK_ID(ctx, offset) ((offset) & ((1 << (ctx)->hash_shift) - 1))
192 static inline int radeon_bo_map(struct radeon
*radeon
, struct radeon_bo
*bo
)
198 static inline void radeon_bo_unmap(struct radeon
*radeon
, struct radeon_bo
*bo
)
201 assert(bo
->map_count
>= 0);
207 static inline struct radeon_bo
*r600_bo_get_bo(struct r600_bo
*bo
)
212 static unsigned inline r600_bo_get_handle(struct r600_bo
*bo
)
214 return bo
->bo
->handle
;
217 static unsigned inline r600_bo_get_size(struct r600_bo
*bo
)
225 static inline bool fence_is_after(unsigned fence
, unsigned ofence
)
227 /* handle wrap around */
228 if (fence
< 0x80000000 && ofence
> 0x80000000)