src/gallium/winsys/radeon/drm/radeon_drm_winsys.c

   1 /*
   2  * Copyright © 2009 Corbin Simpson
   3  * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  16  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  17  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  18  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * The above copyright notice and this permission notice (including the
  24  * next paragraph) shall be included in all copies or substantial portions
  25  * of the Software.
  26  */
  27 /*
  28  * Authors:
  29  *      Corbin Simpson <MostAwesomeDude@gmail.com>
  30  *      Joakim Sindholt <opensource@zhasha.com>
  31  *      Marek Olšák <maraeo@gmail.com>
  32  */
  33
  34 #include "radeon_drm_bo.h"
  35 #include "radeon_drm_cs.h"
  36 #include "radeon_drm_public.h"
  37
  38 #include "pipebuffer/pb_bufmgr.h"
  39 #include "util/u_memory.h"
  40
  41 #include <xf86drm.h>
  42 #include <stdio.h>
  43
  44 #ifndef RADEON_INFO_TILING_CONFIG
  45 #define RADEON_INFO_TILING_CONFIG 6
  46 #endif
  47
  48 #ifndef RADEON_INFO_WANT_HYPERZ
  49 #define RADEON_INFO_WANT_HYPERZ 7
  50 #endif
  51
  52 #ifndef RADEON_INFO_WANT_CMASK
  53 #define RADEON_INFO_WANT_CMASK 8
  54 #endif
  55
  56 #ifndef RADEON_INFO_CLOCK_CRYSTAL_FREQ
  57 #define RADEON_INFO_CLOCK_CRYSTAL_FREQ 9
  58 #endif
  59
  60 #ifndef RADEON_INFO_NUM_BACKENDS
  61 #define RADEON_INFO_NUM_BACKENDS 0xa
  62 #endif
  63
  64 #ifndef RADEON_INFO_NUM_TILE_PIPES
  65 #define RADEON_INFO_NUM_TILE_PIPES 0xb
  66 #endif
  67
  68 #ifndef RADEON_INFO_BACKEND_MAP
  69 #define RADEON_INFO_BACKEND_MAP 0xd
  70 #endif
  71
  72 /* Enable/disable feature access for one command stream.
  73  * If enable == TRUE, return TRUE on success.
  74  * Otherwise, return FALSE.
  75  *
  76  * We basically do the same thing kernel does, because we have to deal
  77  * with multiple contexts (here command streams) backed by one winsys. */
  78 static boolean radeon_set_fd_access(struct radeon_drm_cs *applier,
  79                                     struct radeon_drm_cs **owner,
  80                                     pipe_mutex *mutex,
  81                                     unsigned request, boolean enable)
  82 {
  83     struct drm_radeon_info info;
  84     unsigned value = enable ? 1 : 0;
  85
  86     memset(&info, 0, sizeof(info));
  87
  88     pipe_mutex_lock(*mutex);
  89
  90     /* Early exit if we are sure the request will fail. */
  91     if (enable) {
  92         if (*owner) {
  93             pipe_mutex_unlock(*mutex);
  94             return FALSE;
  95         }
  96     } else {
  97         if (*owner != applier) {
  98             pipe_mutex_unlock(*mutex);
  99             return FALSE;
 100         }
 101     }
 102
 103     /* Pass through the request to the kernel. */
 104     info.value = (unsigned long)&value;
 105     info.request = request;
 106     if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO,
 107                             &info, sizeof(info)) != 0) {
 108         pipe_mutex_unlock(*mutex);
 109         return FALSE;
 110     }
 111
 112     /* Update the rights in the winsys. */
 113     if (enable) {
 114         if (value) {
 115             *owner = applier;
 116             fprintf(stderr, "radeon: Acquired Hyper-Z.\n");
 117             pipe_mutex_unlock(*mutex);
 118             return TRUE;
 119         }
 120     } else {
 121         *owner = NULL;
 122         fprintf(stderr, "radeon: Released Hyper-Z.\n");
 123     }
 124
 125     pipe_mutex_unlock(*mutex);
 126     return FALSE;
 127 }
 128
 129 static boolean radeon_get_drm_value(int fd, unsigned request,
 130                                     const char *errname, uint32_t *out)
 131 {
 132     struct drm_radeon_info info;
 133     int retval;
 134
 135     memset(&info, 0, sizeof(info));
 136
 137     info.value = (unsigned long)out;
 138     info.request = request;
 139
 140     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
 141     if (retval) {
 142         if (errname) {
 143             fprintf(stderr, "radeon: Failed to get %s, error number %d\n",
 144                     errname, retval);
 145         }
 146         return FALSE;
 147     }
 148     return TRUE;
 149 }
 150
 151 /* Helper function to do the ioctls needed for setup and init. */
 152 static boolean do_winsys_init(struct radeon_drm_winsys *ws)
 153 {
 154     struct drm_radeon_gem_info gem_info;
 155     int retval;
 156     drmVersionPtr version;
 157
 158     memset(&gem_info, 0, sizeof(gem_info));
 159
 160     /* We do things in a specific order here.
 161      *
 162      * DRM version first. We need to be sure we're running on a KMS chipset.
 163      * This is also for some features.
 164      *
 165      * Then, the PCI ID. This is essential and should return usable numbers
 166      * for all Radeons. If this fails, we probably got handed an FD for some
 167      * non-Radeon card.
 168      *
 169      * The GEM info is actually bogus on the kernel side, as well as our side
 170      * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
 171      * we don't actually use the info for anything yet.
 172      *
 173      * The GB and Z pipe requests should always succeed, but they might not
 174      * return sensical values for all chipsets, but that's alright because
 175      * the pipe drivers already know that.
 176      */
 177
 178     /* Get DRM version. */
 179     version = drmGetVersion(ws->fd);
 180     if (version->version_major != 2 ||
 181         version->version_minor < 3) {
 182         fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
 183                 "only compatible with 2.3.x (kernel 2.6.34) or later.\n",
 184                 __FUNCTION__,
 185                 version->version_major,
 186                 version->version_minor,
 187                 version->version_patchlevel);
 188         drmFreeVersion(version);
 189         return FALSE;
 190     }
 191
 192     ws->info.drm_major = version->version_major;
 193     ws->info.drm_minor = version->version_minor;
 194     ws->info.drm_patchlevel = version->version_patchlevel;
 195     drmFreeVersion(version);
 196
 197     /* Get PCI ID. */
 198     if (!radeon_get_drm_value(ws->fd, RADEON_INFO_DEVICE_ID, "PCI ID",
 199                               &ws->info.pci_id))
 200         return FALSE;
 201
 202     /* Check PCI ID. */
 203     switch (ws->info.pci_id) {
 204 #define CHIPSET(pci_id, name, family) case pci_id:
 205 #include "pci_ids/r300_pci_ids.h"
 206 #undef CHIPSET
 207         ws->gen = R300;
 208         break;
 209
 210 #define CHIPSET(pci_id, name, family) case pci_id:
 211 #include "pci_ids/r600_pci_ids.h"
 212 #undef CHIPSET
 213         ws->gen = R600;
 214         break;
 215
 216     default:
 217         fprintf(stderr, "radeon: Invalid PCI ID.\n");
 218         return FALSE;
 219     }
 220
 221     /* Get GEM info. */
 222     retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,
 223             &gem_info, sizeof(gem_info));
 224     if (retval) {
 225         fprintf(stderr, "radeon: Failed to get MM info, error number %d\n",
 226                 retval);
 227         return FALSE;
 228     }
 229     ws->info.gart_size = gem_info.gart_size;
 230     ws->info.vram_size = gem_info.vram_size;
 231
 232     ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 233
 234     /* Generation-specific queries. */
 235     if (ws->gen == R300) {
 236         if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_GB_PIPES,
 237                                   "GB pipe count",
 238                                   &ws->info.r300_num_gb_pipes))
 239             return FALSE;
 240
 241         if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_Z_PIPES,
 242                                   "Z pipe count",
 243                                   &ws->info.r300_num_z_pipes))
 244             return FALSE;
 245     }
 246     else if (ws->gen == R600) {
 247         if (ws->info.drm_minor >= 9 &&
 248             !radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS,
 249                                   "num backends",
 250                                   &ws->info.r600_num_backends))
 251             return FALSE;
 252
 253         /* get the GPU counter frequency, failure is not fatal */
 254         radeon_get_drm_value(ws->fd, RADEON_INFO_CLOCK_CRYSTAL_FREQ, NULL,
 255                              &ws->info.r600_clock_crystal_freq);
 256
 257         radeon_get_drm_value(ws->fd, RADEON_INFO_TILING_CONFIG, NULL,
 258                              &ws->info.r600_tiling_config);
 259
 260         if (ws->info.drm_minor >= 11) {
 261             radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
 262                                  &ws->info.r600_num_tile_pipes);
 263
 264             if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
 265                                       &ws->info.r600_backend_map))
 266                 ws->info.r600_backend_map_valid = TRUE;
 267         }
 268     }
 269
 270     return TRUE;
 271 }
 272
 273 static void radeon_winsys_destroy(struct radeon_winsys *rws)
 274 {
 275     struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
 276
 277     pipe_mutex_destroy(ws->hyperz_owner_mutex);
 278     pipe_mutex_destroy(ws->cmask_owner_mutex);
 279
 280     ws->cman->destroy(ws->cman);
 281     ws->kman->destroy(ws->kman);
 282     FREE(rws);
 283 }
 284
 285 static void radeon_query_info(struct radeon_winsys *rws,
 286                               struct radeon_info *info)
 287 {
 288     *info = ((struct radeon_drm_winsys *)rws)->info;
 289 }
 290
 291 static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs,
 292                                          enum radeon_feature_id fid,
 293                                          boolean enable)
 294 {
 295     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
 296
 297     switch (fid) {
 298     case RADEON_FID_R300_HYPERZ_ACCESS:
 299         if (debug_get_bool_option("RADEON_HYPERZ", FALSE)) {
 300             return radeon_set_fd_access(cs, &cs->ws->hyperz_owner,
 301                                         &cs->ws->hyperz_owner_mutex,
 302                                         RADEON_INFO_WANT_HYPERZ, enable);
 303         } else {
 304             return FALSE;
 305         }
 306
 307     case RADEON_FID_R300_CMASK_ACCESS:
 308         if (debug_get_bool_option("RADEON_CMASK", FALSE)) {
 309             return radeon_set_fd_access(cs, &cs->ws->cmask_owner,
 310                                         &cs->ws->cmask_owner_mutex,
 311                                         RADEON_INFO_WANT_CMASK, enable);
 312         } else {
 313             return FALSE;
 314         }
 315     }
 316     return FALSE;
 317 }
 318
 319 struct radeon_winsys *radeon_drm_winsys_create(int fd)
 320 {
 321     struct radeon_drm_winsys *ws = CALLOC_STRUCT(radeon_drm_winsys);
 322     if (!ws) {
 323         return NULL;
 324     }
 325
 326     ws->fd = fd;
 327
 328     if (!do_winsys_init(ws))
 329         goto fail;
 330
 331     /* Create managers. */
 332     ws->kman = radeon_bomgr_create(ws);
 333     if (!ws->kman)
 334         goto fail;
 335     ws->cman = pb_cache_manager_create(ws->kman, 1000000);
 336     if (!ws->cman)
 337         goto fail;
 338
 339     /* Set functions. */
 340     ws->base.destroy = radeon_winsys_destroy;
 341     ws->base.query_info = radeon_query_info;
 342     ws->base.cs_request_feature = radeon_cs_request_feature;
 343
 344     radeon_bomgr_init_functions(ws);
 345     radeon_drm_cs_init_functions(ws);
 346
 347     pipe_mutex_init(ws->hyperz_owner_mutex);
 348     pipe_mutex_init(ws->cmask_owner_mutex);
 349
 350     return &ws->base;
 351
 352 fail:
 353     if (ws->cman)
 354         ws->cman->destroy(ws->cman);
 355     if (ws->kman)
 356         ws->kman->destroy(ws->kman);
 357     FREE(ws);
 358     return NULL;
 359 }