Merge branch 'master' of ../mesa into vulkan
[mesa.git] / src / glsl / nir / nir_lower_io.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
26 *
27 */
28
29 /*
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
32 */
33
34 #include "nir.h"
35 #include "nir_builder.h"
36
37 struct lower_io_state {
38 nir_builder builder;
39 void *mem_ctx;
40 int (*type_size)(const struct glsl_type *type);
41 };
42
43 void
44 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
45 int (*type_size)(const struct glsl_type *))
46 {
47 unsigned location = 0;
48
49 foreach_list_typed(nir_variable, var, node, var_list) {
50 /*
51 * UBO's have their own address spaces, so don't count them towards the
52 * number of global uniforms
53 */
54 if ((var->data.mode == nir_var_uniform || var->data.mode == nir_var_shader_storage) &&
55 var->interface_type != NULL)
56 continue;
57
58 var->data.driver_location = location;
59 location += type_size(var->type);
60 }
61
62 *size = location;
63 }
64
65 static bool
66 deref_has_indirect(nir_deref_var *deref)
67 {
68 for (nir_deref *tail = deref->deref.child; tail; tail = tail->child) {
69 if (tail->deref_type == nir_deref_type_array) {
70 nir_deref_array *arr = nir_deref_as_array(tail);
71 if (arr->deref_array_type == nir_deref_array_type_indirect)
72 return true;
73 }
74 }
75
76 return false;
77 }
78
79 static unsigned
80 get_io_offset(nir_deref_var *deref, nir_instr *instr, nir_src *indirect,
81 struct lower_io_state *state)
82 {
83 bool found_indirect = false;
84 unsigned base_offset = 0;
85
86 nir_builder *b = &state->builder;
87 b->cursor = nir_before_instr(instr);
88
89 nir_deref *tail = &deref->deref;
90 while (tail->child != NULL) {
91 const struct glsl_type *parent_type = tail->type;
92 tail = tail->child;
93
94 if (tail->deref_type == nir_deref_type_array) {
95 nir_deref_array *deref_array = nir_deref_as_array(tail);
96 unsigned size = state->type_size(tail->type);
97
98 base_offset += size * deref_array->base_offset;
99
100 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
101 nir_ssa_def *mul =
102 nir_imul(b, nir_imm_int(b, size),
103 nir_ssa_for_src(b, deref_array->indirect, 1));
104
105 if (found_indirect) {
106 indirect->ssa =
107 nir_iadd(b, nir_ssa_for_src(b, *indirect, 1), mul);
108 } else {
109 indirect->ssa = mul;
110 }
111 indirect->is_ssa = true;
112 found_indirect = true;
113 }
114 } else if (tail->deref_type == nir_deref_type_struct) {
115 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
116
117 for (unsigned i = 0; i < deref_struct->index; i++) {
118 base_offset +=
119 state->type_size(glsl_get_struct_field(parent_type, i));
120 }
121 }
122 }
123
124 return base_offset;
125 }
126
127 static nir_intrinsic_op
128 load_op(nir_variable_mode mode, bool has_indirect)
129 {
130 nir_intrinsic_op op;
131 switch (mode) {
132 case nir_var_shader_in:
133 op = has_indirect ? nir_intrinsic_load_input_indirect :
134 nir_intrinsic_load_input;
135 break;
136 case nir_var_uniform:
137 op = has_indirect ? nir_intrinsic_load_uniform_indirect :
138 nir_intrinsic_load_uniform;
139 break;
140 default:
141 unreachable("Unknown variable mode");
142 }
143 return op;
144 }
145
146 static bool
147 nir_lower_io_block(nir_block *block, void *void_state)
148 {
149 struct lower_io_state *state = void_state;
150
151 nir_foreach_instr_safe(block, instr) {
152 if (instr->type != nir_instr_type_intrinsic)
153 continue;
154
155 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
156
157 switch (intrin->intrinsic) {
158 case nir_intrinsic_load_var: {
159 nir_variable_mode mode = intrin->variables[0]->var->data.mode;
160 if (mode != nir_var_shader_in && mode != nir_var_uniform)
161 continue;
162
163 bool has_indirect = deref_has_indirect(intrin->variables[0]);
164
165 nir_intrinsic_instr *load =
166 nir_intrinsic_instr_create(state->mem_ctx,
167 load_op(mode, has_indirect));
168 load->num_components = intrin->num_components;
169
170 nir_src indirect;
171 unsigned offset = get_io_offset(intrin->variables[0],
172 &intrin->instr, &indirect, state);
173
174 unsigned location = intrin->variables[0]->var->data.driver_location;
175 if (mode == nir_var_uniform) {
176 load->const_index[0] = location;
177 load->const_index[1] = offset;
178 } else {
179 load->const_index[0] = location + offset;
180 }
181
182 if (has_indirect)
183 load->src[0] = indirect;
184
185 if (intrin->dest.is_ssa) {
186 nir_ssa_dest_init(&load->instr, &load->dest,
187 intrin->num_components, NULL);
188 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
189 nir_src_for_ssa(&load->dest.ssa));
190 } else {
191 nir_dest_copy(&load->dest, &intrin->dest, state->mem_ctx);
192 }
193
194 nir_instr_insert_before(&intrin->instr, &load->instr);
195 nir_instr_remove(&intrin->instr);
196 break;
197 }
198
199 case nir_intrinsic_store_var: {
200 if (intrin->variables[0]->var->data.mode != nir_var_shader_out)
201 continue;
202
203 bool has_indirect = deref_has_indirect(intrin->variables[0]);
204
205 nir_intrinsic_op store_op;
206 if (has_indirect) {
207 store_op = nir_intrinsic_store_output_indirect;
208 } else {
209 store_op = nir_intrinsic_store_output;
210 }
211
212 nir_intrinsic_instr *store = nir_intrinsic_instr_create(state->mem_ctx,
213 store_op);
214 store->num_components = intrin->num_components;
215
216 nir_src indirect;
217 unsigned offset = get_io_offset(intrin->variables[0],
218 &intrin->instr, &indirect, state);
219 offset += intrin->variables[0]->var->data.driver_location;
220
221 store->const_index[0] = offset;
222
223 nir_src_copy(&store->src[0], &intrin->src[0], store);
224
225 if (has_indirect)
226 store->src[1] = indirect;
227
228 nir_instr_insert_before(&intrin->instr, &store->instr);
229 nir_instr_remove(&intrin->instr);
230 break;
231 }
232
233 default:
234 break;
235 }
236 }
237
238 return true;
239 }
240
241 static void
242 nir_lower_io_impl(nir_function_impl *impl, int(*type_size)(const struct glsl_type *))
243 {
244 struct lower_io_state state;
245
246 nir_builder_init(&state.builder, impl);
247 state.mem_ctx = ralloc_parent(impl);
248 state.type_size = type_size;
249
250 nir_foreach_block(impl, nir_lower_io_block, &state);
251
252 nir_metadata_preserve(impl, nir_metadata_block_index |
253 nir_metadata_dominance);
254 }
255
256 void
257 nir_lower_io(nir_shader *shader, int(*type_size)(const struct glsl_type *))
258 {
259 nir_foreach_overload(shader, overload) {
260 if (overload->impl)
261 nir_lower_io_impl(overload->impl, type_size);
262 }
263 }