1e96fb42b06a3334b52998185b0ee0a0b1a4261c
[mesa.git] / src / intel / blorp / blorp.h
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef BLORP_H
25 #define BLORP_H
26
27 #include <stdint.h>
28 #include <stdbool.h>
29
30 #include "isl/isl.h"
31
32 struct brw_stage_prog_data;
33
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37
38 struct blorp_batch;
39 struct blorp_params;
40
41 struct blorp_context {
42 void *driver_ctx;
43
44 const struct isl_device *isl_dev;
45
46 const struct brw_compiler *compiler;
47
48 struct {
49 uint32_t tex;
50 uint32_t rb;
51 uint32_t vb;
52 } mocs;
53
54 bool (*lookup_shader)(struct blorp_context *blorp,
55 const void *key, uint32_t key_size,
56 uint32_t *kernel_out, void *prog_data_out);
57 bool (*upload_shader)(struct blorp_context *blorp,
58 const void *key, uint32_t key_size,
59 const void *kernel, uint32_t kernel_size,
60 const struct brw_stage_prog_data *prog_data,
61 uint32_t prog_data_size,
62 uint32_t *kernel_out, void *prog_data_out);
63 void (*exec)(struct blorp_batch *batch, const struct blorp_params *params);
64 };
65
66 void blorp_init(struct blorp_context *blorp, void *driver_ctx,
67 struct isl_device *isl_dev);
68 void blorp_finish(struct blorp_context *blorp);
69
70 enum blorp_batch_flags {
71 /**
72 * This flag indicates that blorp should *not* re-emit the depth and
73 * stencil buffer packets. Instead, the driver guarantees that all depth
74 * and stencil images passed in will match what is currently set in the
75 * hardware.
76 */
77 BLORP_BATCH_NO_EMIT_DEPTH_STENCIL = (1 << 0),
78
79 /* This flag indicates that the blorp call should be predicated. */
80 BLORP_BATCH_PREDICATE_ENABLE = (1 << 1),
81 };
82
83 struct blorp_batch {
84 struct blorp_context *blorp;
85 void *driver_batch;
86 enum blorp_batch_flags flags;
87 };
88
89 void blorp_batch_init(struct blorp_context *blorp, struct blorp_batch *batch,
90 void *driver_batch, enum blorp_batch_flags flags);
91 void blorp_batch_finish(struct blorp_batch *batch);
92
93 struct blorp_address {
94 void *buffer;
95 uint32_t read_domains;
96 uint32_t write_domain;
97 uint32_t offset;
98 };
99
100 struct blorp_surf
101 {
102 const struct isl_surf *surf;
103 struct blorp_address addr;
104
105 const struct isl_surf *aux_surf;
106 struct blorp_address aux_addr;
107 enum isl_aux_usage aux_usage;
108
109 union isl_color_value clear_color;
110 };
111
112 void
113 blorp_blit(struct blorp_batch *batch,
114 const struct blorp_surf *src_surf,
115 unsigned src_level, unsigned src_layer,
116 enum isl_format src_format, struct isl_swizzle src_swizzle,
117 const struct blorp_surf *dst_surf,
118 unsigned dst_level, unsigned dst_layer,
119 enum isl_format dst_format, struct isl_swizzle dst_swizzle,
120 float src_x0, float src_y0,
121 float src_x1, float src_y1,
122 float dst_x0, float dst_y0,
123 float dst_x1, float dst_y1,
124 uint32_t filter, bool mirror_x, bool mirror_y);
125
126 void
127 blorp_copy(struct blorp_batch *batch,
128 const struct blorp_surf *src_surf,
129 unsigned src_level, unsigned src_layer,
130 const struct blorp_surf *dst_surf,
131 unsigned dst_level, unsigned dst_layer,
132 uint32_t src_x, uint32_t src_y,
133 uint32_t dst_x, uint32_t dst_y,
134 uint32_t src_width, uint32_t src_height);
135
136 void
137 blorp_fast_clear(struct blorp_batch *batch,
138 const struct blorp_surf *surf, enum isl_format format,
139 uint32_t level, uint32_t start_layer, uint32_t num_layers,
140 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1);
141
142 void
143 blorp_clear(struct blorp_batch *batch,
144 const struct blorp_surf *surf,
145 enum isl_format format, struct isl_swizzle swizzle,
146 uint32_t level, uint32_t start_layer, uint32_t num_layers,
147 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
148 union isl_color_value clear_color,
149 const bool color_write_disable[4]);
150
151 void
152 blorp_clear_depth_stencil(struct blorp_batch *batch,
153 const struct blorp_surf *depth,
154 const struct blorp_surf *stencil,
155 uint32_t level, uint32_t start_layer,
156 uint32_t num_layers,
157 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
158 bool clear_depth, float depth_value,
159 uint8_t stencil_mask, uint8_t stencil_value);
160 bool
161 blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format,
162 uint32_t num_samples,
163 uint32_t x0, uint32_t y0,
164 uint32_t x1, uint32_t y1);
165
166 void
167 blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch,
168 uint32_t num_samples,
169 uint32_t x0, uint32_t y0,
170 uint32_t x1, uint32_t y1,
171 bool clear_depth, bool clear_stencil,
172 uint8_t stencil_value);
173 void
174 blorp_clear_attachments(struct blorp_batch *batch,
175 uint32_t binding_table_offset,
176 enum isl_format depth_format,
177 uint32_t num_samples,
178 uint32_t start_layer, uint32_t num_layers,
179 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
180 bool clear_color, union isl_color_value color_value,
181 bool clear_depth, float depth_value,
182 uint8_t stencil_mask, uint8_t stencil_value);
183
184 enum blorp_fast_clear_op {
185 BLORP_FAST_CLEAR_OP_NONE = 0,
186 BLORP_FAST_CLEAR_OP_CLEAR,
187 BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL,
188 BLORP_FAST_CLEAR_OP_RESOLVE_FULL,
189 };
190
191 void
192 blorp_ccs_resolve(struct blorp_batch *batch,
193 struct blorp_surf *surf, uint32_t level, uint32_t layer,
194 enum isl_format format,
195 enum blorp_fast_clear_op resolve_op);
196
197 /* Resolves subresources of the image subresource range specified in the
198 * binding table.
199 */
200 void
201 blorp_ccs_resolve_attachment(struct blorp_batch *batch,
202 const uint32_t binding_table_offset,
203 struct blorp_surf * const surf,
204 const uint32_t level, const uint32_t num_layers,
205 const enum isl_format format,
206 const enum blorp_fast_clear_op resolve_op);
207
208 /**
209 * For an overview of the HiZ operations, see the following sections of the
210 * Sandy Bridge PRM, Volume 1, Part2:
211 * - 7.5.3.1 Depth Buffer Clear
212 * - 7.5.3.2 Depth Buffer Resolve
213 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
214 *
215 * Of these, two get entered in the resolve map as needing to be done to the
216 * buffer: depth resolve and hiz resolve.
217 */
218 enum blorp_hiz_op {
219 BLORP_HIZ_OP_NONE,
220 BLORP_HIZ_OP_DEPTH_CLEAR,
221 BLORP_HIZ_OP_DEPTH_RESOLVE,
222 BLORP_HIZ_OP_HIZ_RESOLVE,
223 };
224
225 void
226 blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
227 uint32_t level, uint32_t start_layer, uint32_t num_layers,
228 enum blorp_hiz_op op);
229
230 #ifdef __cplusplus
231 } /* end extern "C" */
232 #endif /* __cplusplus */
233
234 #endif /* BLORP_H */