nir: Add options to nir_lower_compute_system_values to control compute ID base lowering
[mesa.git] / src / intel / common / gen_urb_config.c
1 /*
2 * Copyright (c) 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdlib.h>
25 #include <math.h>
26
27 #include "util/macros.h"
28 #include "main/macros.h"
29 #include "compiler/shader_enums.h"
30
31 #include "gen_l3_config.h"
32
33 /**
34 * The following diagram shows how we partition the URB:
35 *
36 * 16kb or 32kb Rest of the URB space
37 * __________-__________ _________________-_________________
38 * / \ / \
39 * +-------------------------------------------------------------+
40 * | VS/HS/DS/GS/FS Push | VS/HS/DS/GS URB |
41 * | Constants | Entries |
42 * +-------------------------------------------------------------+
43 *
44 * Push constants must be stored at the beginning of the URB space,
45 * while URB entries can be stored anywhere. We choose to lay them
46 * out in pipeline order (VS -> HS -> DS -> GS).
47 */
48
49 /**
50 * Decide how to partition the URB among the various stages.
51 *
52 * \param[in] push_constant_bytes - space allocate for push constants.
53 * \param[in] urb_size_bytes - total size of the URB (from L3 config).
54 * \param[in] tess_present - are tessellation shaders active?
55 * \param[in] gs_present - are geometry shaders active?
56 * \param[in] entry_size - the URB entry size (from the shader compiler)
57 * \param[out] entries - the number of URB entries for each stage
58 * \param[out] start - the starting offset for each stage
59 */
60 void
61 gen_get_urb_config(const struct gen_device_info *devinfo,
62 const struct gen_l3_config *l3_cfg,
63 bool tess_present, bool gs_present,
64 const unsigned entry_size[4],
65 unsigned entries[4], unsigned start[4],
66 enum gen_urb_deref_block_size *deref_block_size)
67 {
68 unsigned urb_size_kB = gen_get_l3_config_urb_size(devinfo, l3_cfg);
69
70 /* RCU_MODE register for Gen12+ in BSpec says:
71 *
72 * "HW reserves 4KB of URB space per bank for Compute Engine out of the
73 * total storage available in L3. SW must consider that 4KB of storage
74 * per bank will be reduced from what is programmed for the URB space
75 * in L3 for Render Engine executed workloads.
76 *
77 * Example: When URB space programmed is 64KB (per bank) for Render
78 * Engine, the actual URB space available for operation is only 60KB
79 * (per bank). Similarly when URB space programmed is 128KB (per bank)
80 * for render engine, the actual URB space available for operation is
81 * only 124KB (per bank). More detailed descripton available in "L3
82 * Cache" section of the B-Spec."
83 */
84 if (devinfo->gen >= 12)
85 urb_size_kB -= 4 * devinfo->l3_banks;
86
87 const unsigned push_constant_kB =
88 (devinfo->gen >= 8 || (devinfo->is_haswell && devinfo->gt == 3)) ? 32 : 16;
89
90 const bool active[4] = { true, tess_present, tess_present, gs_present };
91
92 /* URB allocations must be done in 8k chunks. */
93 const unsigned chunk_size_kB = 8;
94 const unsigned chunk_size_bytes = chunk_size_kB * 1024;
95
96 const unsigned push_constant_chunks = push_constant_kB / chunk_size_kB;
97 const unsigned urb_chunks = urb_size_kB / chunk_size_kB;
98
99 /* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS):
100 *
101 * VS Number of URB Entries must be divisible by 8 if the VS URB Entry
102 * Allocation Size is less than 9 512-bit URB entries.
103 *
104 * Similar text exists for HS, DS and GS.
105 */
106 unsigned granularity[4];
107 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
108 granularity[i] = (entry_size[i] < 9) ? 8 : 1;
109 }
110
111 unsigned min_entries[4] = {
112 /* VS has a lower limit on the number of URB entries.
113 *
114 * From the Broadwell PRM, 3DSTATE_URB_VS instruction:
115 * "When tessellation is enabled, the VS Number of URB Entries must be
116 * greater than or equal to 192."
117 */
118 [MESA_SHADER_VERTEX] = tess_present && devinfo->gen == 8 ?
119 192 : devinfo->urb.min_entries[MESA_SHADER_VERTEX],
120
121 /* There are two constraints on the minimum amount of URB space we can
122 * allocate:
123 *
124 * (1) We need room for at least 2 URB entries, since we always operate
125 * the GS in DUAL_OBJECT mode.
126 *
127 * (2) We can't allocate less than nr_gs_entries_granularity.
128 */
129 [MESA_SHADER_GEOMETRY] = gs_present ? 2 : 0,
130
131 [MESA_SHADER_TESS_CTRL] = tess_present ? 1 : 0,
132
133 [MESA_SHADER_TESS_EVAL] = tess_present ?
134 devinfo->urb.min_entries[MESA_SHADER_TESS_EVAL] : 0,
135 };
136
137 /* Min VS Entries isn't a multiple of 8 on Cherryview/Broxton; round up.
138 * Round them all up.
139 */
140 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
141 min_entries[i] = ALIGN(min_entries[i], granularity[i]);
142 }
143
144 unsigned entry_size_bytes[4];
145 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
146 entry_size_bytes[i] = 64 * entry_size[i];
147 }
148
149 /* Initially, assign each stage the minimum amount of URB space it needs,
150 * and make a note of how much additional space it "wants" (the amount of
151 * additional space it could actually make use of).
152 */
153 unsigned chunks[4];
154 unsigned wants[4];
155 unsigned total_needs = push_constant_chunks;
156 unsigned total_wants = 0;
157
158 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
159 if (active[i]) {
160 chunks[i] = DIV_ROUND_UP(min_entries[i] * entry_size_bytes[i],
161 chunk_size_bytes);
162
163 wants[i] =
164 DIV_ROUND_UP(devinfo->urb.max_entries[i] * entry_size_bytes[i],
165 chunk_size_bytes) - chunks[i];
166 } else {
167 chunks[i] = 0;
168 wants[i] = 0;
169 }
170
171 total_needs += chunks[i];
172 total_wants += wants[i];
173 }
174
175 assert(total_needs <= urb_chunks);
176
177 /* Mete out remaining space (if any) in proportion to "wants". */
178 unsigned remaining_space = MIN2(urb_chunks - total_needs, total_wants);
179
180 if (remaining_space > 0) {
181 for (int i = MESA_SHADER_VERTEX;
182 total_wants > 0 && i <= MESA_SHADER_TESS_EVAL; i++) {
183 unsigned additional = (unsigned)
184 roundf(wants[i] * (((float) remaining_space) / total_wants));
185 chunks[i] += additional;
186 remaining_space -= additional;
187 total_wants -= wants[i];
188 }
189
190 chunks[MESA_SHADER_GEOMETRY] += remaining_space;
191 }
192
193 /* Sanity check that we haven't over-allocated. */
194 unsigned total_chunks = push_constant_chunks;
195 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
196 total_chunks += chunks[i];
197 }
198 assert(total_chunks <= urb_chunks);
199
200 /* Finally, compute the number of entries that can fit in the space
201 * allocated to each stage.
202 */
203 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
204 entries[i] = chunks[i] * chunk_size_bytes / entry_size_bytes[i];
205
206 /* Since we rounded up when computing wants[], this may be slightly
207 * more than the maximum allowed amount, so correct for that.
208 */
209 entries[i] = MIN2(entries[i], devinfo->urb.max_entries[i]);
210
211 /* Ensure that we program a multiple of the granularity. */
212 entries[i] = ROUND_DOWN_TO(entries[i], granularity[i]);
213
214 /* Finally, sanity check to make sure we have at least the minimum
215 * number of entries needed for each stage.
216 */
217 assert(entries[i] >= min_entries[i]);
218 }
219
220 /* Lay out the URB in pipeline order: push constants, VS, HS, DS, GS. */
221 int next = push_constant_chunks;
222 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
223 if (entries[i]) {
224 start[i] = next;
225 next += chunks[i];
226 } else {
227 /* Just put disabled stages at the beginning. */
228 start[i] = 0;
229 }
230 }
231
232 if (deref_block_size) {
233 if (devinfo->gen >= 12) {
234 /* From the Gen12 BSpec:
235 *
236 * "Deref Block size depends on the last enabled shader and number
237 * of handles programmed for that shader
238 *
239 * 1) For GS last shader enabled cases, the deref block is
240 * always set to a per poly(within hardware)
241 *
242 * If the last enabled shader is VS or DS.
243 *
244 * 1) If DS is last enabled shader then if the number of DS
245 * handles is less than 324, need to set per poly deref.
246 *
247 * 2) If VS is last enabled shader then if the number of VS
248 * handles is less than 192, need to set per poly deref"
249 *
250 * The default is 32 so we assume that's the right choice if we're
251 * not in one of the explicit cases listed above.
252 */
253 if (gs_present) {
254 *deref_block_size = GEN_URB_DEREF_BLOCK_SIZE_PER_POLY;
255 } else if (tess_present) {
256 if (entries[MESA_SHADER_TESS_EVAL] < 324)
257 *deref_block_size = GEN_URB_DEREF_BLOCK_SIZE_PER_POLY;
258 else
259 *deref_block_size = GEN_URB_DEREF_BLOCK_SIZE_32;
260 } else {
261 if (entries[MESA_SHADER_VERTEX] < 192)
262 *deref_block_size = GEN_URB_DEREF_BLOCK_SIZE_PER_POLY;
263 else
264 *deref_block_size = GEN_URB_DEREF_BLOCK_SIZE_32;
265 }
266 } else {
267 *deref_block_size = 0;
268 }
269 }
270 }