i965/fs: Implement basic SPIR-V subgroup intrinsics
[mesa.git] / src / intel / compiler / brw_nir_lower_cs_intrinsics.c
1 /*
2 * Copyright (c) 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_nir.h"
25 #include "compiler/nir/nir_builder.h"
26
27 struct lower_intrinsics_state {
28 nir_shader *nir;
29 unsigned dispatch_width;
30 nir_function_impl *impl;
31 bool progress;
32 nir_builder builder;
33 unsigned local_workgroup_size;
34 };
35
36 static bool
37 lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
38 nir_block *block)
39 {
40 bool progress = false;
41 nir_builder *b = &state->builder;
42 nir_shader *nir = state->nir;
43
44 nir_foreach_instr_safe(instr, block) {
45 if (instr->type != nir_instr_type_intrinsic)
46 continue;
47
48 nir_intrinsic_instr *intrinsic = nir_instr_as_intrinsic(instr);
49
50 b->cursor = nir_after_instr(&intrinsic->instr);
51
52 nir_ssa_def *sysval;
53 switch (intrinsic->intrinsic) {
54 case nir_intrinsic_load_local_invocation_index: {
55 /* We construct the local invocation index from:
56 *
57 * gl_LocalInvocationIndex =
58 * cs_thread_local_id + subgroup_invocation;
59 */
60 nir_ssa_def *subgroup_id;
61 if (state->local_workgroup_size <= state->dispatch_width)
62 subgroup_id = nir_imm_int(b, 0);
63 else
64 subgroup_id = nir_load_subgroup_id(b);
65
66 nir_ssa_def *thread_local_id =
67 nir_imul(b, subgroup_id, nir_imm_int(b, state->dispatch_width));
68 nir_ssa_def *channel = nir_load_subgroup_invocation(b);
69 sysval = nir_iadd(b, channel, thread_local_id);
70 break;
71 }
72
73 case nir_intrinsic_load_local_invocation_id: {
74 /* We lower gl_LocalInvocationID from gl_LocalInvocationIndex based
75 * on this formula:
76 *
77 * gl_LocalInvocationID.x =
78 * gl_LocalInvocationIndex % gl_WorkGroupSize.x;
79 * gl_LocalInvocationID.y =
80 * (gl_LocalInvocationIndex / gl_WorkGroupSize.x) %
81 * gl_WorkGroupSize.y;
82 * gl_LocalInvocationID.z =
83 * (gl_LocalInvocationIndex /
84 * (gl_WorkGroupSize.x * gl_WorkGroupSize.y)) %
85 * gl_WorkGroupSize.z;
86 */
87 unsigned *size = nir->info.cs.local_size;
88
89 nir_ssa_def *local_index = nir_load_local_invocation_index(b);
90
91 nir_const_value uvec3;
92 memset(&uvec3, 0, sizeof(uvec3));
93 uvec3.u32[0] = 1;
94 uvec3.u32[1] = size[0];
95 uvec3.u32[2] = size[0] * size[1];
96 nir_ssa_def *div_val = nir_build_imm(b, 3, 32, uvec3);
97 uvec3.u32[0] = size[0];
98 uvec3.u32[1] = size[1];
99 uvec3.u32[2] = size[2];
100 nir_ssa_def *mod_val = nir_build_imm(b, 3, 32, uvec3);
101
102 sysval = nir_umod(b, nir_udiv(b, local_index, div_val), mod_val);
103 break;
104 }
105
106 case nir_intrinsic_load_subgroup_id:
107 if (state->local_workgroup_size > 8)
108 continue;
109
110 /* For small workgroup sizes, we know subgroup_id will be zero */
111 sysval = nir_imm_int(b, 0);
112 break;
113
114 case nir_intrinsic_load_num_subgroups: {
115 unsigned local_workgroup_size =
116 nir->info.cs.local_size[0] * nir->info.cs.local_size[1] *
117 nir->info.cs.local_size[2];
118 unsigned num_subgroups =
119 DIV_ROUND_UP(local_workgroup_size, state->dispatch_width);
120 sysval = nir_imm_int(b, num_subgroups);
121 break;
122 }
123
124 default:
125 continue;
126 }
127
128 nir_ssa_def_rewrite_uses(&intrinsic->dest.ssa, nir_src_for_ssa(sysval));
129 nir_instr_remove(&intrinsic->instr);
130
131 state->progress = true;
132 }
133
134 return progress;
135 }
136
137 static void
138 lower_cs_intrinsics_convert_impl(struct lower_intrinsics_state *state)
139 {
140 nir_builder_init(&state->builder, state->impl);
141
142 nir_foreach_block(block, state->impl) {
143 lower_cs_intrinsics_convert_block(state, block);
144 }
145
146 nir_metadata_preserve(state->impl,
147 nir_metadata_block_index | nir_metadata_dominance);
148 }
149
150 bool
151 brw_nir_lower_cs_intrinsics(nir_shader *nir,
152 unsigned dispatch_width)
153 {
154 assert(nir->info.stage == MESA_SHADER_COMPUTE);
155
156 bool progress = false;
157 struct lower_intrinsics_state state;
158 memset(&state, 0, sizeof(state));
159 state.nir = nir;
160 state.dispatch_width = dispatch_width;
161 state.local_workgroup_size = nir->info.cs.local_size[0] *
162 nir->info.cs.local_size[1] *
163 nir->info.cs.local_size[2];
164
165 do {
166 state.progress = false;
167 nir_foreach_function(function, nir) {
168 if (function->impl) {
169 state.impl = function->impl;
170 lower_cs_intrinsics_convert_impl(&state);
171 }
172 }
173 progress |= state.progress;
174 } while (state.progress);
175
176 return progress;
177 }