src/intel/compiler/brw_vec4_live_variables.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #ifndef BRW_VEC4_LIVE_VARIABLES_H
  29 #define BRW_VEC4_LIVE_VARIABLES_H
  30
  31 #include "brw_ir_vec4.h"
  32 #include "util/bitset.h"
  33
  34 namespace brw {
  35
  36 class vec4_live_variables {
  37 public:
  38    struct block_data {
  39       /**
  40        * Which variables are defined before being used in the block.
  41        *
  42        * Note that for our purposes, "defined" means unconditionally, completely
  43        * defined.
  44        */
  45       BITSET_WORD *def;
  46
  47       /**
  48        * Which variables are used before being defined in the block.
  49        */
  50       BITSET_WORD *use;
  51
  52       /** Which defs reach the entry point of the block. */
  53       BITSET_WORD *livein;
  54
  55       /** Which defs reach the exit point of the block. */
  56       BITSET_WORD *liveout;
  57
  58       BITSET_WORD flag_def[1];
  59       BITSET_WORD flag_use[1];
  60       BITSET_WORD flag_livein[1];
  61       BITSET_WORD flag_liveout[1];
  62    };
  63
  64    DECLARE_RALLOC_CXX_OPERATORS(vec4_live_variables)
  65
  66    vec4_live_variables(const simple_allocator &alloc, cfg_t *cfg);
  67    ~vec4_live_variables();
  68
  69    int num_vars;
  70    int bitset_words;
  71
  72    /** Per-basic-block information on live variables */
  73    struct block_data *block_data;
  74
  75    /** @{
  76     * Final computed live ranges for each variable.
  77     */
  78    int *start;
  79    int *end;
  80    /** @} */
  81
  82    int var_range_start(unsigned v, unsigned n) const;
  83    int var_range_end(unsigned v, unsigned n) const;
  84    bool vgrfs_interfere(int a, int b) const;
  85
  86 protected:
  87    void setup_def_use();
  88    void compute_live_variables();
  89
  90    const simple_allocator &alloc;
  91    cfg_t *cfg;
  92    void *mem_ctx;
  93 };
  94
  95 /* Returns the variable index for the k-th dword of the c-th component of
  96  * register reg.
  97  */
  98 inline unsigned
  99 var_from_reg(const simple_allocator &alloc, const src_reg &reg,
 100              unsigned c = 0, unsigned k = 0)
 101 {
 102    assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
 103    const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
 104    unsigned result =
 105       8 * alloc.offsets[reg.nr] + reg.offset / 4 +
 106       (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize;
 107    /* Do not exceed the limit for this register */
 108    assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
 109    return result;
 110 }
 111
 112 inline unsigned
 113 var_from_reg(const simple_allocator &alloc, const dst_reg &reg,
 114              unsigned c = 0, unsigned k = 0)
 115 {
 116    assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
 117    const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
 118    unsigned result =
 119       8 * alloc.offsets[reg.nr] + reg.offset / 4 +
 120       (c + k / csize * 4) * csize + k % csize;
 121    /* Do not exceed the limit for this register */
 122    assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
 123    return result;
 124 }
 125
 126 } /* namespace brw */
 127
 128 #endif /* BRW_VEC4_LIVE_VARIABLES_H */