intel/genxml,isl: Add gen12 stencil buffer changes
[mesa.git] / src / intel / isl / isl_emit_depth_stencil.c
1 /*
2 * Copyright 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdint.h>
25
26 #define __gen_address_type uint64_t
27 #define __gen_user_data void
28
29 static uint64_t
30 __gen_combine_address(__attribute__((unused)) void *data,
31 __attribute__((unused)) void *loc, uint64_t addr,
32 uint32_t delta)
33 {
34 return addr + delta;
35 }
36
37 #include "genxml/gen_macros.h"
38 #include "genxml/genX_pack.h"
39
40 #include "isl_priv.h"
41
42 static const uint32_t isl_to_gen_ds_surftype[] = {
43 #if GEN_GEN >= 9
44 /* From the SKL PRM, "3DSTATE_DEPTH_STENCIL::SurfaceType":
45 *
46 * "If depth/stencil is enabled with 1D render target, depth/stencil
47 * surface type needs to be set to 2D surface type and height set to 1.
48 * Depth will use (legacy) TileY and stencil will use TileW. For this
49 * case only, the Surface Type of the depth buffer can be 2D while the
50 * Surface Type of the render target(s) are 1D, representing an
51 * exception to a programming note above.
52 */
53 [ISL_SURF_DIM_1D] = SURFTYPE_2D,
54 #else
55 [ISL_SURF_DIM_1D] = SURFTYPE_1D,
56 #endif
57 [ISL_SURF_DIM_2D] = SURFTYPE_2D,
58 [ISL_SURF_DIM_3D] = SURFTYPE_3D,
59 };
60
61 void
62 isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
63 const struct isl_depth_stencil_hiz_emit_info *restrict info)
64 {
65 struct GENX(3DSTATE_DEPTH_BUFFER) db = {
66 GENX(3DSTATE_DEPTH_BUFFER_header),
67 };
68
69 if (info->depth_surf) {
70 db.SurfaceType = isl_to_gen_ds_surftype[info->depth_surf->dim];
71 db.SurfaceFormat = isl_surf_get_depth_format(dev, info->depth_surf);
72 db.Width = info->depth_surf->logical_level0_px.width - 1;
73 db.Height = info->depth_surf->logical_level0_px.height - 1;
74 } else if (info->stencil_surf) {
75 db.SurfaceType = isl_to_gen_ds_surftype[info->stencil_surf->dim];
76 db.SurfaceFormat = D32_FLOAT;
77 db.Width = info->stencil_surf->logical_level0_px.width - 1;
78 db.Height = info->stencil_surf->logical_level0_px.height - 1;
79 } else {
80 db.SurfaceType = SURFTYPE_NULL;
81 db.SurfaceFormat = D32_FLOAT;
82 }
83
84 if (info->depth_surf || info->stencil_surf) {
85 /* These are based entirely on the view */
86 db.Depth = db.RenderTargetViewExtent = info->view->array_len - 1;
87 db.LOD = info->view->base_level;
88 db.MinimumArrayElement = info->view->base_array_layer;
89 }
90
91 if (info->depth_surf) {
92 #if GEN_GEN >= 7
93 db.DepthWriteEnable = true;
94 #endif
95 db.SurfaceBaseAddress = info->depth_address;
96 #if GEN_GEN >= 6
97 db.MOCS = info->mocs;
98 #endif
99
100 #if GEN_GEN <= 6
101 db.TiledSurface = info->depth_surf->tiling != ISL_TILING_LINEAR;
102 db.TileWalk = info->depth_surf->tiling == ISL_TILING_Y0 ? TILEWALK_YMAJOR :
103 TILEWALK_XMAJOR;
104 db.MIPMapLayoutMode = MIPLAYOUT_BELOW;
105 #endif
106
107 db.SurfacePitch = info->depth_surf->row_pitch_B - 1;
108 #if GEN_GEN >= 8
109 db.SurfaceQPitch =
110 isl_surf_get_array_pitch_el_rows(info->depth_surf) >> 2;
111 #endif
112 }
113
114 #if GEN_GEN == 5 || GEN_GEN == 6
115 const bool separate_stencil =
116 info->stencil_surf && info->stencil_surf->format == ISL_FORMAT_R8_UINT;
117 if (separate_stencil || info->hiz_usage == ISL_AUX_USAGE_HIZ) {
118 assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
119 db.SeparateStencilBufferEnable = true;
120 db.HierarchicalDepthBufferEnable = true;
121 }
122 #endif
123
124 #if GEN_GEN >= 6
125 struct GENX(3DSTATE_STENCIL_BUFFER) sb = {
126 GENX(3DSTATE_STENCIL_BUFFER_header),
127 };
128 #else
129 # define sb db
130 #endif
131
132 if (info->stencil_surf) {
133 #if GEN_GEN >= 7 && GEN_GEN < 12
134 db.StencilWriteEnable = true;
135 #endif
136 #if GEN_GEN >= 12
137 sb.StencilWriteEnable = true;
138 sb.SurfaceType = SURFTYPE_2D;
139 sb.Width = info->stencil_surf->logical_level0_px.width - 1;
140 sb.Height = info->stencil_surf->logical_level0_px.height - 1;
141 sb.Depth = sb.RenderTargetViewExtent = info->view->array_len - 1;
142 sb.SurfLOD = info->view->base_level;
143 sb.MinimumArrayElement = info->view->base_array_layer;
144 #elif GEN_GEN >= 8 || GEN_IS_HASWELL
145 sb.StencilBufferEnable = true;
146 #endif
147 sb.SurfaceBaseAddress = info->stencil_address;
148 #if GEN_GEN >= 6
149 sb.MOCS = info->mocs;
150 #endif
151 sb.SurfacePitch = info->stencil_surf->row_pitch_B - 1;
152 #if GEN_GEN >= 8
153 sb.SurfaceQPitch =
154 isl_surf_get_array_pitch_el_rows(info->stencil_surf) >> 2;
155 #endif
156 } else {
157 #if GEN_GEN >= 12
158 sb.SurfaceType = SURFTYPE_NULL;
159
160 /* The docs seem to indicate that if surf-type is null, then we may need
161 * to match the depth-buffer value for `Depth`. It may be a
162 * documentation bug, since the other fields don't require this.
163 *
164 * TODO: Confirm documentation and remove seeting of `Depth` if not
165 * required.
166 */
167 sb.Depth = db.Depth;
168 #endif
169 }
170
171 #if GEN_GEN >= 6
172 struct GENX(3DSTATE_HIER_DEPTH_BUFFER) hiz = {
173 GENX(3DSTATE_HIER_DEPTH_BUFFER_header),
174 };
175 struct GENX(3DSTATE_CLEAR_PARAMS) clear = {
176 GENX(3DSTATE_CLEAR_PARAMS_header),
177 };
178
179 assert(info->hiz_usage == ISL_AUX_USAGE_NONE ||
180 info->hiz_usage == ISL_AUX_USAGE_HIZ);
181 if (info->hiz_usage == ISL_AUX_USAGE_HIZ) {
182 db.HierarchicalDepthBufferEnable = true;
183
184 hiz.SurfaceBaseAddress = info->hiz_address;
185 hiz.MOCS = info->mocs;
186 hiz.SurfacePitch = info->hiz_surf->row_pitch_B - 1;
187 #if GEN_GEN >= 8
188 /* From the SKL PRM Vol2a:
189 *
190 * The interpretation of this field is dependent on Surface Type
191 * as follows:
192 * - SURFTYPE_1D: distance in pixels between array slices
193 * - SURFTYPE_2D/CUBE: distance in rows between array slices
194 * - SURFTYPE_3D: distance in rows between R - slices
195 *
196 * Unfortunately, the docs aren't 100% accurate here. They fail to
197 * mention that the 1-D rule only applies to linear 1-D images.
198 * Since depth and HiZ buffers are always tiled, they are treated as
199 * 2-D images. Prior to Sky Lake, this field is always in rows.
200 */
201 hiz.SurfaceQPitch =
202 isl_surf_get_array_pitch_sa_rows(info->hiz_surf) >> 2;
203 #endif
204
205 clear.DepthClearValueValid = true;
206 #if GEN_GEN >= 8
207 clear.DepthClearValue = info->depth_clear_value;
208 #else
209 switch (info->depth_surf->format) {
210 case ISL_FORMAT_R32_FLOAT: {
211 union { float f; uint32_t u; } fu;
212 fu.f = info->depth_clear_value;
213 clear.DepthClearValue = fu.u;
214 break;
215 }
216 case ISL_FORMAT_R24_UNORM_X8_TYPELESS:
217 clear.DepthClearValue = info->depth_clear_value * ((1u << 24) - 1);
218 break;
219 case ISL_FORMAT_R16_UNORM:
220 clear.DepthClearValue = info->depth_clear_value * ((1u << 16) - 1);
221 break;
222 default:
223 unreachable("Invalid depth type");
224 }
225 #endif
226 }
227 #endif /* GEN_GEN >= 6 */
228
229 /* Pack everything into the batch */
230 uint32_t *dw = batch;
231 GENX(3DSTATE_DEPTH_BUFFER_pack)(NULL, dw, &db);
232 dw += GENX(3DSTATE_DEPTH_BUFFER_length);
233
234 #if GEN_GEN >= 6
235 GENX(3DSTATE_STENCIL_BUFFER_pack)(NULL, dw, &sb);
236 dw += GENX(3DSTATE_STENCIL_BUFFER_length);
237
238 GENX(3DSTATE_HIER_DEPTH_BUFFER_pack)(NULL, dw, &hiz);
239 dw += GENX(3DSTATE_HIER_DEPTH_BUFFER_length);
240
241 GENX(3DSTATE_CLEAR_PARAMS_pack)(NULL, dw, &clear);
242 dw += GENX(3DSTATE_CLEAR_PARAMS_length);
243 #endif
244 }