src/intel/isl/isl_emit_depth_stencil.c

   1 /*
   2  * Copyright 2016 Intel Corporation
   3  *
   4  *  Permission is hereby granted, free of charge, to any person obtaining a
   5  *  copy of this software and associated documentation files (the "Software"),
   6  *  to deal in the Software without restriction, including without limitation
   7  *  the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  *  and/or sell copies of the Software, and to permit persons to whom the
   9  *  Software is furnished to do so, subject to the following conditions:
  10  *
  11  *  The above copyright notice and this permission notice (including the next
  12  *  paragraph) shall be included in all copies or substantial portions of the
  13  *  Software.
  14  *
  15  *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  *  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  *  IN THE SOFTWARE.
  22  */
  23
  24 #include <stdint.h>
  25
  26 #define __gen_address_type uint64_t
  27 #define __gen_user_data void
  28
  29 static uint64_t
  30 __gen_combine_address(__attribute__((unused)) void *data,
  31                       __attribute__((unused)) void *loc, uint64_t addr,
  32                       uint32_t delta)
  33 {
  34    return addr + delta;
  35 }
  36
  37 #include "genxml/gen_macros.h"
  38 #include "genxml/genX_pack.h"
  39
  40 #include "isl_priv.h"
  41
  42 static const uint32_t isl_to_gen_ds_surftype[] = {
  43 #if GEN_GEN >= 9
  44    /* From the SKL PRM, "3DSTATE_DEPTH_STENCIL::SurfaceType":
  45     *
  46     *    "If depth/stencil is enabled with 1D render target, depth/stencil
  47     *    surface type needs to be set to 2D surface type and height set to 1.
  48     *    Depth will use (legacy) TileY and stencil will use TileW. For this
  49     *    case only, the Surface Type of the depth buffer can be 2D while the
  50     *    Surface Type of the render target(s) are 1D, representing an
  51     *    exception to a programming note above.
  52     */
  53    [ISL_SURF_DIM_1D] = SURFTYPE_2D,
  54 #else
  55    [ISL_SURF_DIM_1D] = SURFTYPE_1D,
  56 #endif
  57    [ISL_SURF_DIM_2D] = SURFTYPE_2D,
  58    [ISL_SURF_DIM_3D] = SURFTYPE_3D,
  59 };
  60
  61 void
  62 isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
  63                                    const struct isl_depth_stencil_hiz_emit_info *restrict info)
  64 {
  65    struct GENX(3DSTATE_DEPTH_BUFFER) db = {
  66       GENX(3DSTATE_DEPTH_BUFFER_header),
  67    };
  68
  69    if (info->depth_surf) {
  70       db.SurfaceType = isl_to_gen_ds_surftype[info->depth_surf->dim];
  71       db.SurfaceFormat = isl_surf_get_depth_format(dev, info->depth_surf);
  72       db.Width = info->depth_surf->logical_level0_px.width - 1;
  73       db.Height = info->depth_surf->logical_level0_px.height - 1;
  74    } else if (info->stencil_surf) {
  75       db.SurfaceType = isl_to_gen_ds_surftype[info->stencil_surf->dim];
  76       db.SurfaceFormat = D32_FLOAT;
  77       db.Width = info->stencil_surf->logical_level0_px.width - 1;
  78       db.Height = info->stencil_surf->logical_level0_px.height - 1;
  79    } else {
  80       db.SurfaceType = SURFTYPE_NULL;
  81       db.SurfaceFormat = D32_FLOAT;
  82    }
  83
  84    if (info->depth_surf || info->stencil_surf) {
  85       /* These are based entirely on the view */
  86       db.Depth = db.RenderTargetViewExtent = info->view->array_len - 1;
  87       db.LOD                  = info->view->base_level;
  88       db.MinimumArrayElement  = info->view->base_array_layer;
  89    }
  90
  91    if (info->depth_surf) {
  92 #if GEN_GEN >= 7
  93       db.DepthWriteEnable = true;
  94 #endif
  95       db.SurfaceBaseAddress = info->depth_address;
  96 #if GEN_GEN >= 6
  97       db.MOCS = info->mocs;
  98 #endif
  99
 100 #if GEN_GEN <= 6
 101       db.TiledSurface = info->depth_surf->tiling != ISL_TILING_LINEAR;
 102       db.TileWalk = info->depth_surf->tiling == ISL_TILING_Y0 ? TILEWALK_YMAJOR :
 103                                                                 TILEWALK_XMAJOR;
 104       db.MIPMapLayoutMode = MIPLAYOUT_BELOW;
 105 #endif
 106
 107       db.SurfacePitch = info->depth_surf->row_pitch_B - 1;
 108 #if GEN_GEN >= 8
 109       db.SurfaceQPitch =
 110          isl_surf_get_array_pitch_el_rows(info->depth_surf) >> 2;
 111 #endif
 112
 113 #if GEN_GEN >= 12
 114       db.ControlSurfaceEnable = db.DepthBufferCompressionEnable =
 115          info->hiz_usage == ISL_AUX_USAGE_HIZ_CCS;
 116 #endif
 117    }
 118
 119 #if GEN_GEN == 5 || GEN_GEN == 6
 120    const bool separate_stencil =
 121       info->stencil_surf && info->stencil_surf->format == ISL_FORMAT_R8_UINT;
 122    if (separate_stencil || info->hiz_usage == ISL_AUX_USAGE_HIZ) {
 123       assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
 124       db.SeparateStencilBufferEnable = true;
 125       db.HierarchicalDepthBufferEnable = true;
 126    }
 127 #endif
 128
 129 #if GEN_GEN >= 6
 130    struct GENX(3DSTATE_STENCIL_BUFFER) sb = {
 131       GENX(3DSTATE_STENCIL_BUFFER_header),
 132    };
 133 #else
 134 #  define sb db
 135 #endif
 136
 137    if (info->stencil_surf) {
 138 #if GEN_GEN >= 7 && GEN_GEN < 12
 139       db.StencilWriteEnable = true;
 140 #endif
 141 #if GEN_GEN >= 12
 142       sb.StencilWriteEnable = true;
 143       sb.SurfaceType = SURFTYPE_2D;
 144       sb.Width = info->stencil_surf->logical_level0_px.width - 1;
 145       sb.Height = info->stencil_surf->logical_level0_px.height - 1;
 146       sb.Depth = sb.RenderTargetViewExtent = info->view->array_len - 1;
 147       sb.SurfLOD = info->view->base_level;
 148       sb.MinimumArrayElement = info->view->base_array_layer;
 149 #elif GEN_GEN >= 8 || GEN_IS_HASWELL
 150       sb.StencilBufferEnable = true;
 151 #endif
 152       sb.SurfaceBaseAddress = info->stencil_address;
 153 #if GEN_GEN >= 6
 154       sb.MOCS = info->mocs;
 155 #endif
 156       sb.SurfacePitch = info->stencil_surf->row_pitch_B - 1;
 157 #if GEN_GEN >= 8
 158       sb.SurfaceQPitch =
 159          isl_surf_get_array_pitch_el_rows(info->stencil_surf) >> 2;
 160 #endif
 161    } else {
 162 #if GEN_GEN >= 12
 163       sb.SurfaceType = SURFTYPE_NULL;
 164
 165       /* The docs seem to indicate that if surf-type is null, then we may need
 166        * to match the depth-buffer value for `Depth`. It may be a
 167        * documentation bug, since the other fields don't require this.
 168        *
 169        * TODO: Confirm documentation and remove seeting of `Depth` if not
 170        * required.
 171        */
 172       sb.Depth = db.Depth;
 173 #endif
 174    }
 175
 176 #if GEN_GEN >= 6
 177    struct GENX(3DSTATE_HIER_DEPTH_BUFFER) hiz = {
 178       GENX(3DSTATE_HIER_DEPTH_BUFFER_header),
 179    };
 180    struct GENX(3DSTATE_CLEAR_PARAMS) clear = {
 181       GENX(3DSTATE_CLEAR_PARAMS_header),
 182    };
 183
 184    assert(info->hiz_usage == ISL_AUX_USAGE_NONE ||
 185           info->hiz_usage == ISL_AUX_USAGE_HIZ ||
 186           info->hiz_usage == ISL_AUX_USAGE_HIZ_CCS);
 187    if (info->hiz_usage == ISL_AUX_USAGE_HIZ ||
 188        info->hiz_usage == ISL_AUX_USAGE_HIZ_CCS) {
 189       assert(GEN_GEN >= 12 || info->hiz_usage == ISL_AUX_USAGE_HIZ);
 190       db.HierarchicalDepthBufferEnable = true;
 191
 192       hiz.SurfaceBaseAddress = info->hiz_address;
 193       hiz.MOCS = info->mocs;
 194       hiz.SurfacePitch = info->hiz_surf->row_pitch_B - 1;
 195 #if GEN_GEN >= 8
 196       /* From the SKL PRM Vol2a:
 197        *
 198        *    The interpretation of this field is dependent on Surface Type
 199        *    as follows:
 200        *    - SURFTYPE_1D: distance in pixels between array slices
 201        *    - SURFTYPE_2D/CUBE: distance in rows between array slices
 202        *    - SURFTYPE_3D: distance in rows between R - slices
 203        *
 204        * Unfortunately, the docs aren't 100% accurate here.  They fail to
 205        * mention that the 1-D rule only applies to linear 1-D images.
 206        * Since depth and HiZ buffers are always tiled, they are treated as
 207        * 2-D images.  Prior to Sky Lake, this field is always in rows.
 208        */
 209       hiz.SurfaceQPitch =
 210          isl_surf_get_array_pitch_sa_rows(info->hiz_surf) >> 2;
 211 #endif
 212
 213       clear.DepthClearValueValid = true;
 214 #if GEN_GEN >= 8
 215       clear.DepthClearValue = info->depth_clear_value;
 216 #else
 217       switch (info->depth_surf->format) {
 218       case ISL_FORMAT_R32_FLOAT: {
 219          union { float f; uint32_t u; } fu;
 220          fu.f = info->depth_clear_value;
 221          clear.DepthClearValue = fu.u;
 222          break;
 223       }
 224       case ISL_FORMAT_R24_UNORM_X8_TYPELESS:
 225          clear.DepthClearValue = info->depth_clear_value * ((1u << 24) - 1);
 226          break;
 227       case ISL_FORMAT_R16_UNORM:
 228          clear.DepthClearValue = info->depth_clear_value * ((1u << 16) - 1);
 229          break;
 230       default:
 231          unreachable("Invalid depth type");
 232       }
 233 #endif
 234    }
 235 #endif /* GEN_GEN >= 6 */
 236
 237    /* Pack everything into the batch */
 238    uint32_t *dw = batch;
 239    GENX(3DSTATE_DEPTH_BUFFER_pack)(NULL, dw, &db);
 240    dw += GENX(3DSTATE_DEPTH_BUFFER_length);
 241
 242 #if GEN_GEN >= 6
 243    GENX(3DSTATE_STENCIL_BUFFER_pack)(NULL, dw, &sb);
 244    dw += GENX(3DSTATE_STENCIL_BUFFER_length);
 245
 246    GENX(3DSTATE_HIER_DEPTH_BUFFER_pack)(NULL, dw, &hiz);
 247    dw += GENX(3DSTATE_HIER_DEPTH_BUFFER_length);
 248
 249    GENX(3DSTATE_CLEAR_PARAMS_pack)(NULL, dw, &clear);
 250    dw += GENX(3DSTATE_CLEAR_PARAMS_length);
 251 #endif
 252 }