src/intel/perf/gen_perf.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_PERF_H
  25 #define GEN_PERF_H
  26
  27 #include <stdio.h>
  28 #include <stdint.h>
  29 #include <string.h>
  30
  31 #if defined(MAJOR_IN_SYSMACROS)
  32 #include <sys/sysmacros.h>
  33 #elif defined(MAJOR_IN_MKDEV)
  34 #include <sys/mkdev.h>
  35 #endif
  36
  37 #include "util/hash_table.h"
  38 #include "compiler/glsl/list.h"
  39 #include "util/ralloc.h"
  40
  41 #include "drm-uapi/i915_drm.h"
  42
  43 struct gen_device_info;
  44
  45 struct gen_perf_config;
  46 struct gen_perf_query_info;
  47
  48 enum gen_perf_counter_type {
  49    GEN_PERF_COUNTER_TYPE_EVENT,
  50    GEN_PERF_COUNTER_TYPE_DURATION_NORM,
  51    GEN_PERF_COUNTER_TYPE_DURATION_RAW,
  52    GEN_PERF_COUNTER_TYPE_THROUGHPUT,
  53    GEN_PERF_COUNTER_TYPE_RAW,
  54    GEN_PERF_COUNTER_TYPE_TIMESTAMP,
  55 };
  56
  57 enum gen_perf_counter_data_type {
  58    GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
  59    GEN_PERF_COUNTER_DATA_TYPE_UINT32,
  60    GEN_PERF_COUNTER_DATA_TYPE_UINT64,
  61    GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
  62    GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
  63 };
  64
  65 enum gen_perf_counter_units {
  66    /* size */
  67    GEN_PERF_COUNTER_UNITS_BYTES,
  68
  69    /* frequency */
  70    GEN_PERF_COUNTER_UNITS_HZ,
  71
  72    /* time */
  73    GEN_PERF_COUNTER_UNITS_NS,
  74    GEN_PERF_COUNTER_UNITS_US,
  75
  76    /**/
  77    GEN_PERF_COUNTER_UNITS_PIXELS,
  78    GEN_PERF_COUNTER_UNITS_TEXELS,
  79    GEN_PERF_COUNTER_UNITS_THREADS,
  80    GEN_PERF_COUNTER_UNITS_PERCENT,
  81
  82    /* events */
  83    GEN_PERF_COUNTER_UNITS_MESSAGES,
  84    GEN_PERF_COUNTER_UNITS_NUMBER,
  85    GEN_PERF_COUNTER_UNITS_CYCLES,
  86    GEN_PERF_COUNTER_UNITS_EVENTS,
  87    GEN_PERF_COUNTER_UNITS_UTILIZATION,
  88
  89    /**/
  90    GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
  91    GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
  92    GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
  93    GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
  94
  95    GEN_PERF_COUNTER_UNITS_MAX
  96 };
  97
  98 struct gen_pipeline_stat {
  99    uint32_t reg;
 100    uint32_t numerator;
 101    uint32_t denominator;
 102 };
 103
 104 /*
 105  * The largest OA formats we can use include:
 106  * For Haswell:
 107  *   1 timestamp, 45 A counters, 8 B counters and 8 C counters.
 108  * For Gen8+
 109  *   1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
 110  */
 111 #define MAX_OA_REPORT_COUNTERS 62
 112
 113 /*
 114  * When currently allocate only one page for pipeline statistics queries. Here
 115  * we derived the maximum number of counters for that amount.
 116  */
 117 #define STATS_BO_SIZE               4096
 118 #define STATS_BO_END_OFFSET_BYTES   (STATS_BO_SIZE / 2)
 119 #define MAX_STAT_COUNTERS           (STATS_BO_END_OFFSET_BYTES / 8)
 120
 121 #define I915_PERF_OA_SAMPLE_SIZE (8 +   /* drm_i915_perf_record_header */ \
 122                                   256)  /* OA counter report */
 123
 124 struct gen_perf_query_result {
 125    /**
 126     * Storage for the final accumulated OA counters.
 127     */
 128    uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
 129
 130    /**
 131     * Hw ID used by the context on which the query was running.
 132     */
 133    uint32_t hw_id;
 134
 135    /**
 136     * Number of reports accumulated to produce the results.
 137     */
 138    uint32_t reports_accumulated;
 139
 140    /**
 141     * Frequency in the slices of the GT at the begin and end of the
 142     * query.
 143     */
 144    uint64_t slice_frequency[2];
 145
 146    /**
 147     * Frequency in the unslice of the GT at the begin and end of the
 148     * query.
 149     */
 150    uint64_t unslice_frequency[2];
 151
 152    /**
 153     * Timestamp of the query.
 154     */
 155    uint64_t begin_timestamp;
 156
 157    /**
 158     * Whether the query was interrupted by another workload (aka preemption).
 159     */
 160    bool query_disjoint;
 161 };
 162
 163 struct gen_perf_query_counter {
 164    const char *name;
 165    const char *desc;
 166    const char *symbol_name;
 167    enum gen_perf_counter_type type;
 168    enum gen_perf_counter_data_type data_type;
 169    enum gen_perf_counter_units units;
 170    uint64_t raw_max;
 171    size_t offset;
 172    uint64_t query_mask;
 173
 174    union {
 175       uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
 176                                          const struct gen_perf_query_info *query,
 177                                          const uint64_t *accumulator);
 178       float (*oa_counter_read_float)(struct gen_perf_config *perf,
 179                                      const struct gen_perf_query_info *query,
 180                                      const uint64_t *accumulator);
 181       struct gen_pipeline_stat pipeline_stat;
 182    };
 183 };
 184
 185 struct gen_perf_query_register_prog {
 186    uint32_t reg;
 187    uint32_t val;
 188 };
 189
 190 /* Register programming for a given query */
 191 struct gen_perf_registers {
 192    struct gen_perf_query_register_prog *flex_regs;
 193    uint32_t n_flex_regs;
 194
 195    struct gen_perf_query_register_prog *mux_regs;
 196    uint32_t n_mux_regs;
 197
 198    struct gen_perf_query_register_prog *b_counter_regs;
 199    uint32_t n_b_counter_regs;
 200 };
 201
 202 struct gen_perf_query_info {
 203    enum gen_perf_query_type {
 204       GEN_PERF_QUERY_TYPE_OA,
 205       GEN_PERF_QUERY_TYPE_RAW,
 206       GEN_PERF_QUERY_TYPE_PIPELINE,
 207    } kind;
 208    const char *name;
 209    const char *guid;
 210    struct gen_perf_query_counter *counters;
 211    int n_counters;
 212    int max_counters;
 213    size_t data_size;
 214
 215    /* OA specific */
 216    uint64_t oa_metrics_set_id;
 217    int oa_format;
 218
 219    /* For indexing into the accumulator[] ... */
 220    int gpu_time_offset;
 221    int gpu_clock_offset;
 222    int a_offset;
 223    int b_offset;
 224    int c_offset;
 225
 226    struct gen_perf_registers config;
 227 };
 228
 229 struct gen_perf_config {
 230    /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
 231    bool i915_query_supported;
 232
 233    /* Version of the i915-perf subsystem, refer to i915_drm.h. */
 234    int i915_perf_version;
 235
 236    /* Powergating configuration for the running the query. */
 237    struct drm_i915_gem_context_param_sseu sseu;
 238
 239    struct gen_perf_query_info *queries;
 240    int n_queries;
 241
 242    struct gen_perf_query_counter **counters;
 243    int n_counters;
 244
 245    /* Variables referenced in the XML meta data for OA performance
 246     * counters, e.g in the normalization equations.
 247     *
 248     * All uint64_t for consistent operand types in generated code
 249     */
 250    struct {
 251       uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
 252       uint64_t n_eus;               /** $EuCoresTotalCount */
 253       uint64_t n_eu_slices;         /** $EuSlicesTotalCount */
 254       uint64_t n_eu_sub_slices;     /** $EuSubslicesTotalCount */
 255       uint64_t eu_threads_count;    /** $EuThreadsCount */
 256       uint64_t slice_mask;          /** $SliceMask */
 257       uint64_t subslice_mask;       /** $SubsliceMask */
 258       uint64_t gt_min_freq;         /** $GpuMinFrequency */
 259       uint64_t gt_max_freq;         /** $GpuMaxFrequency */
 260       uint64_t revision;            /** $SkuRevisionId */
 261    } sys_vars;
 262
 263    /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
 264     * cross-reference with the GUIDs of configs advertised by the kernel at
 265     * runtime
 266     */
 267    struct hash_table *oa_metrics_table;
 268
 269    /* Location of the device's sysfs entry. */
 270    char sysfs_dev_dir[256];
 271
 272    struct {
 273       void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
 274       void (*bo_unreference)(void *bo);
 275       void *(*bo_map)(void *ctx, void *bo, unsigned flags);
 276       void (*bo_unmap)(void *bo);
 277       bool (*batch_references)(void *batch, void *bo);
 278       void (*bo_wait_rendering)(void *bo);
 279       int (*bo_busy)(void *bo);
 280       void (*emit_stall_at_pixel_scoreboard)(void *ctx);
 281       void (*emit_mi_report_perf_count)(void *ctx,
 282                                         void *bo,
 283                                         uint32_t offset_in_bytes,
 284                                         uint32_t report_id);
 285       void (*batchbuffer_flush)(void *ctx,
 286                                 const char *file, int line);
 287       void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
 288
 289    } vtbl;
 290 };
 291
 292 struct gen_perf_counter_pass {
 293    struct gen_perf_query_info *query;
 294    struct gen_perf_query_counter *counter;
 295    uint32_t pass;
 296 };
 297
 298 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
 299                            const struct gen_device_info *devinfo,
 300                            int drm_fd,
 301                            bool include_pipeline_statistics);
 302
 303 /** Query i915 for a metric id using guid.
 304  */
 305 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
 306                              const char *guid,
 307                              uint64_t *metric_id);
 308
 309 /** Load a configuation's content from i915 using a guid.
 310  */
 311 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
 312                                                       int fd, const char *guid);
 313
 314 /** Store a configuration into i915 using guid and return a new metric id.
 315  *
 316  * If guid is NULL, then a generated one will be provided by hashing the
 317  * content of the configuration.
 318  */
 319 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
 320                                       const struct gen_perf_registers *config,
 321                                       const char *guid);
 322
 323 /** Read the slice/unslice frequency from 2 OA reports and store then into
 324  *  result.
 325  */
 326 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 327                                             const struct gen_device_info *devinfo,
 328                                             const uint32_t *start,
 329                                             const uint32_t *end);
 330 /** Accumulate the delta between 2 OA reports into result for a given query.
 331  */
 332 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 333                                       const struct gen_perf_query_info *query,
 334                                       const uint32_t *start,
 335                                       const uint32_t *end);
 336 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
 337
 338 static inline size_t
 339 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
 340 {
 341    switch (counter->data_type) {
 342    case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
 343       return sizeof(uint32_t);
 344    case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
 345       return sizeof(uint32_t);
 346    case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
 347       return sizeof(uint64_t);
 348    case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
 349       return sizeof(float);
 350    case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
 351       return sizeof(double);
 352    default:
 353       unreachable("invalid counter data type");
 354    }
 355 }
 356
 357 static inline struct gen_perf_config *
 358 gen_perf_new(void *ctx)
 359 {
 360    struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
 361    return perf;
 362 }
 363
 364 uint32_t gen_perf_get_n_passes(struct gen_perf_config *perf,
 365                                const uint32_t *counter_indices,
 366                                uint32_t counter_indices_count,
 367                                struct gen_perf_query_info **pass_queries);
 368 void gen_perf_get_counters_passes(struct gen_perf_config *perf,
 369                                   const uint32_t *counter_indices,
 370                                   uint32_t counter_indices_count,
 371                                   struct gen_perf_counter_pass *counter_pass);
 372
 373 #endif /* GEN_PERF_H */