anv/image: Get rid of the memset(aux, 0, sizeof(aux)) hack
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29 #include <sys/mman.h>
30
31 #include "anv_private.h"
32 #include "util/debug.h"
33
34 #include "vk_format_info.h"
35
36 /**
37 * Exactly one bit must be set in \a aspect.
38 */
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageUsageFlags vk_usage,
41 VkImageAspectFlags aspect)
42 {
43 isl_surf_usage_flags_t isl_usage = 0;
44
45 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
46 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
47
48 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
49 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
50
51 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
52 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
53
54 if (vk_usage & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
55 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
56
57 /* Even if we're only using it for transfer operations, clears to depth and
58 * stencil images happen as depth and stencil so they need the right ISL
59 * usage bits or else things will fall apart.
60 */
61 switch (aspect) {
62 case VK_IMAGE_ASPECT_DEPTH_BIT:
63 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
64 break;
65 case VK_IMAGE_ASPECT_STENCIL_BIT:
66 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
67 break;
68 case VK_IMAGE_ASPECT_COLOR_BIT:
69 break;
70 default:
71 unreachable("bad VkImageAspect");
72 }
73
74 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
75 /* blorp implements transfers by sampling from the source image. */
76 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
77 }
78
79 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
80 aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
81 /* blorp implements transfers by rendering into the destination image.
82 * Only request this with color images, as we deal with depth/stencil
83 * formats differently. */
84 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
85 }
86
87 return isl_usage;
88 }
89
90 /**
91 * Exactly one bit must be set in \a aspect.
92 */
93 static struct anv_surface *
94 get_surface(struct anv_image *image, VkImageAspectFlags aspect)
95 {
96 switch (aspect) {
97 default:
98 unreachable("bad VkImageAspect");
99 case VK_IMAGE_ASPECT_COLOR_BIT:
100 return &image->color_surface;
101 case VK_IMAGE_ASPECT_DEPTH_BIT:
102 return &image->depth_surface;
103 case VK_IMAGE_ASPECT_STENCIL_BIT:
104 return &image->stencil_surface;
105 }
106 }
107
108 static void
109 add_surface(struct anv_image *image, struct anv_surface *surf)
110 {
111 assert(surf->isl.size > 0); /* isl surface must be initialized */
112
113 surf->offset = align_u32(image->size, surf->isl.alignment);
114 image->size = surf->offset + surf->isl.size;
115 image->alignment = MAX2(image->alignment, surf->isl.alignment);
116 }
117
118 /**
119 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
120 * image's memory requirements (that is, the image's size and alignment).
121 *
122 * Exactly one bit must be set in \a aspect.
123 */
124 static VkResult
125 make_surface(const struct anv_device *dev,
126 struct anv_image *image,
127 const struct anv_image_create_info *anv_info,
128 VkImageAspectFlags aspect)
129 {
130 const VkImageCreateInfo *vk_info = anv_info->vk_info;
131 bool ok UNUSED;
132
133 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
134 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
135 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
136 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
137 };
138
139 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
140 * result with an optionally provided ISL tiling argument.
141 */
142 isl_tiling_flags_t tiling_flags =
143 (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
144 ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
145
146 if (anv_info->isl_tiling_flags)
147 tiling_flags &= anv_info->isl_tiling_flags;
148
149 assert(tiling_flags);
150
151 struct anv_surface *anv_surf = get_surface(image, aspect);
152
153 image->extent = anv_sanitize_image_extent(vk_info->imageType,
154 vk_info->extent);
155
156 enum isl_format format = anv_get_isl_format(&dev->info, vk_info->format,
157 aspect, vk_info->tiling);
158 assert(format != ISL_FORMAT_UNSUPPORTED);
159
160 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
161 .dim = vk_to_isl_surf_dim[vk_info->imageType],
162 .format = format,
163 .width = image->extent.width,
164 .height = image->extent.height,
165 .depth = image->extent.depth,
166 .levels = vk_info->mipLevels,
167 .array_len = vk_info->arrayLayers,
168 .samples = vk_info->samples,
169 .min_alignment = 0,
170 .row_pitch = anv_info->stride,
171 .usage = choose_isl_surf_usage(image->usage, aspect),
172 .tiling_flags = tiling_flags);
173
174 /* isl_surf_init() will fail only if provided invalid input. Invalid input
175 * is illegal in Vulkan.
176 */
177 assert(ok);
178
179 add_surface(image, anv_surf);
180
181 /* Add a HiZ surface to a depth buffer that will be used for rendering.
182 */
183 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
184 /* We don't advertise that depth buffers could be used as storage
185 * images.
186 */
187 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
188
189 /* Allow the user to control HiZ enabling. Disable by default on gen7
190 * because resolves are not currently implemented pre-BDW.
191 */
192 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
193 /* It will never be used as an attachment, HiZ is pointless. */
194 } else if (dev->info.gen == 7) {
195 anv_perf_warn("Implement gen7 HiZ");
196 } else if (vk_info->mipLevels > 1) {
197 anv_perf_warn("Enable multi-LOD HiZ");
198 } else if (vk_info->arrayLayers > 1) {
199 anv_perf_warn("Implement multi-arrayLayer HiZ clears and resolves");
200 } else if (dev->info.gen == 8 && vk_info->samples > 1) {
201 anv_perf_warn("Enable gen8 multisampled HiZ");
202 } else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
203 assert(image->aux_surface.isl.size == 0);
204 ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
205 &image->aux_surface.isl);
206 assert(ok);
207 add_surface(image, &image->aux_surface);
208 image->aux_usage = ISL_AUX_USAGE_HIZ;
209 }
210 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
211 if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
212 assert(image->aux_surface.isl.size == 0);
213 ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
214 &image->aux_surface.isl);
215 if (ok) {
216 add_surface(image, &image->aux_surface);
217
218 /* For images created without MUTABLE_FORMAT_BIT set, we know that
219 * they will always be used with the original format. In
220 * particular, they will always be used with a format that
221 * supports color compression. If it's never used as a storage
222 * image, then it will only be used through the sampler or the as
223 * a render target. This means that it's safe to just leave
224 * compression on at all times for these formats.
225 */
226 if (!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
227 !(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
228 isl_format_supports_ccs_e(&dev->info, format)) {
229 image->aux_usage = ISL_AUX_USAGE_CCS_E;
230 }
231 }
232 }
233 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples > 1) {
234 assert(image->aux_surface.isl.size == 0);
235 assert(!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT));
236 ok = isl_surf_get_mcs_surf(&dev->isl_dev, &anv_surf->isl,
237 &image->aux_surface.isl);
238 if (ok) {
239 add_surface(image, &image->aux_surface);
240 image->aux_usage = ISL_AUX_USAGE_MCS;
241 }
242 }
243
244 return VK_SUCCESS;
245 }
246
247 VkResult
248 anv_image_create(VkDevice _device,
249 const struct anv_image_create_info *create_info,
250 const VkAllocationCallbacks* alloc,
251 VkImage *pImage)
252 {
253 ANV_FROM_HANDLE(anv_device, device, _device);
254 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
255 struct anv_image *image = NULL;
256 VkResult r;
257
258 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
259
260 anv_assert(pCreateInfo->mipLevels > 0);
261 anv_assert(pCreateInfo->arrayLayers > 0);
262 anv_assert(pCreateInfo->samples > 0);
263 anv_assert(pCreateInfo->extent.width > 0);
264 anv_assert(pCreateInfo->extent.height > 0);
265 anv_assert(pCreateInfo->extent.depth > 0);
266
267 image = vk_alloc2(&device->alloc, alloc, sizeof(*image), 8,
268 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
269 if (!image)
270 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
271
272 memset(image, 0, sizeof(*image));
273 image->type = pCreateInfo->imageType;
274 image->extent = pCreateInfo->extent;
275 image->vk_format = pCreateInfo->format;
276 image->aspects = vk_format_aspects(image->vk_format);
277 image->levels = pCreateInfo->mipLevels;
278 image->array_size = pCreateInfo->arrayLayers;
279 image->samples = pCreateInfo->samples;
280 image->usage = pCreateInfo->usage;
281 image->tiling = pCreateInfo->tiling;
282 image->aux_usage = ISL_AUX_USAGE_NONE;
283
284 uint32_t b;
285 for_each_bit(b, image->aspects) {
286 r = make_surface(device, image, create_info, (1 << b));
287 if (r != VK_SUCCESS)
288 goto fail;
289 }
290
291 *pImage = anv_image_to_handle(image);
292
293 return VK_SUCCESS;
294
295 fail:
296 if (image)
297 vk_free2(&device->alloc, alloc, image);
298
299 return r;
300 }
301
302 VkResult
303 anv_CreateImage(VkDevice device,
304 const VkImageCreateInfo *pCreateInfo,
305 const VkAllocationCallbacks *pAllocator,
306 VkImage *pImage)
307 {
308 return anv_image_create(device,
309 &(struct anv_image_create_info) {
310 .vk_info = pCreateInfo,
311 },
312 pAllocator,
313 pImage);
314 }
315
316 void
317 anv_DestroyImage(VkDevice _device, VkImage _image,
318 const VkAllocationCallbacks *pAllocator)
319 {
320 ANV_FROM_HANDLE(anv_device, device, _device);
321 ANV_FROM_HANDLE(anv_image, image, _image);
322
323 if (!image)
324 return;
325
326 vk_free2(&device->alloc, pAllocator, image);
327 }
328
329 VkResult anv_BindImageMemory(
330 VkDevice _device,
331 VkImage _image,
332 VkDeviceMemory _memory,
333 VkDeviceSize memoryOffset)
334 {
335 ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
336 ANV_FROM_HANDLE(anv_image, image, _image);
337
338 if (mem == NULL) {
339 image->bo = NULL;
340 image->offset = 0;
341 return VK_SUCCESS;
342 }
343
344 image->bo = mem->bo;
345 image->offset = memoryOffset;
346
347 return VK_SUCCESS;
348 }
349
350 static void
351 anv_surface_get_subresource_layout(struct anv_image *image,
352 struct anv_surface *surface,
353 const VkImageSubresource *subresource,
354 VkSubresourceLayout *layout)
355 {
356 /* If we are on a non-zero mip level or array slice, we need to
357 * calculate a real offset.
358 */
359 anv_assert(subresource->mipLevel == 0);
360 anv_assert(subresource->arrayLayer == 0);
361
362 layout->offset = surface->offset;
363 layout->rowPitch = surface->isl.row_pitch;
364 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
365 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
366 layout->size = surface->isl.size;
367 }
368
369 void anv_GetImageSubresourceLayout(
370 VkDevice device,
371 VkImage _image,
372 const VkImageSubresource* pSubresource,
373 VkSubresourceLayout* pLayout)
374 {
375 ANV_FROM_HANDLE(anv_image, image, _image);
376
377 assert(__builtin_popcount(pSubresource->aspectMask) == 1);
378
379 switch (pSubresource->aspectMask) {
380 case VK_IMAGE_ASPECT_COLOR_BIT:
381 anv_surface_get_subresource_layout(image, &image->color_surface,
382 pSubresource, pLayout);
383 break;
384 case VK_IMAGE_ASPECT_DEPTH_BIT:
385 anv_surface_get_subresource_layout(image, &image->depth_surface,
386 pSubresource, pLayout);
387 break;
388 case VK_IMAGE_ASPECT_STENCIL_BIT:
389 anv_surface_get_subresource_layout(image, &image->stencil_surface,
390 pSubresource, pLayout);
391 break;
392 default:
393 assert(!"Invalid image aspect");
394 }
395 }
396
397 /**
398 * This function determines the optimal buffer to use for a given
399 * VkImageLayout and other pieces of information needed to make that
400 * determination. This does not determine the optimal buffer to use
401 * during a resolve operation.
402 *
403 * @param devinfo The device information of the Intel GPU.
404 * @param image The image that may contain a collection of buffers.
405 * @param aspects The aspect(s) of the image to be accessed.
406 * @param layout The current layout of the image aspect(s).
407 *
408 * @return The primary buffer that should be used for the given layout.
409 */
410 enum isl_aux_usage
411 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
412 const struct anv_image * const image,
413 const VkImageAspectFlags aspects,
414 const VkImageLayout layout)
415 {
416 /* Validate the inputs. */
417
418 /* The devinfo is needed as the optimal buffer varies across generations. */
419 assert(devinfo != NULL);
420
421 /* The layout of a NULL image is not properly defined. */
422 assert(image != NULL);
423
424 /* The aspects must be a subset of the image aspects. */
425 assert(aspects & image->aspects && aspects <= image->aspects);
426
427 /* Determine the optimal buffer. */
428
429 /* If there is no auxiliary surface allocated, we must use the one and only
430 * main buffer.
431 */
432 if (image->aux_surface.isl.size == 0)
433 return ISL_AUX_USAGE_NONE;
434
435 /* All images that use an auxiliary surface are required to be tiled. */
436 assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
437
438 /* On BDW+, when clearing the stencil aspect of a depth stencil image,
439 * the HiZ buffer allows us to record the clear with a relatively small
440 * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
441 * to the stencil aspect.
442 */
443 if (devinfo->gen < 8 && aspects == VK_IMAGE_ASPECT_STENCIL_BIT)
444 return ISL_AUX_USAGE_NONE;
445
446 const bool color_aspect = aspects == VK_IMAGE_ASPECT_COLOR_BIT;
447
448 /* The following switch currently only handles depth stencil aspects.
449 * TODO: Handle the color aspect.
450 */
451 if (color_aspect)
452 return image->aux_usage;
453
454 switch (layout) {
455
456 /* Invalid Layouts */
457 case VK_IMAGE_LAYOUT_RANGE_SIZE:
458 case VK_IMAGE_LAYOUT_MAX_ENUM:
459 unreachable("Invalid image layout.");
460
461 /* Undefined layouts
462 *
463 * The pre-initialized layout is equivalent to the undefined layout for
464 * optimally-tiled images. We can only do color compression (CCS or HiZ)
465 * on tiled images.
466 */
467 case VK_IMAGE_LAYOUT_UNDEFINED:
468 case VK_IMAGE_LAYOUT_PREINITIALIZED:
469 return ISL_AUX_USAGE_NONE;
470
471
472 /* Transfer Layouts
473 *
474 * This buffer could be a depth buffer used in a transfer operation. BLORP
475 * currently doesn't use HiZ for transfer operations so we must use the main
476 * buffer for this layout. TODO: Enable HiZ in BLORP.
477 */
478 case VK_IMAGE_LAYOUT_GENERAL:
479 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
480 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
481 return ISL_AUX_USAGE_NONE;
482
483
484 /* Sampling Layouts */
485 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
486 assert(!color_aspect);
487 /* Fall-through */
488 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
489 if (anv_can_sample_with_hiz(devinfo, aspects, image->samples))
490 return ISL_AUX_USAGE_HIZ;
491 else
492 return ISL_AUX_USAGE_NONE;
493
494 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
495 assert(color_aspect);
496
497 /* On SKL+, the render buffer can be decompressed by the presentation
498 * engine. Support for this feature has not yet landed in the wider
499 * ecosystem. TODO: Update this code when support lands.
500 *
501 * From the BDW PRM, Vol 7, Render Target Resolve:
502 *
503 * If the MCS is enabled on a non-multisampled render target, the
504 * render target must be resolved before being used for other
505 * purposes (display, texture, CPU lock) The clear value from
506 * SURFACE_STATE is written into pixels in the render target
507 * indicated as clear in the MCS.
508 *
509 * Pre-SKL, the render buffer must be resolved before being used for
510 * presentation. We can infer that the auxiliary buffer is not used.
511 */
512 return ISL_AUX_USAGE_NONE;
513
514
515 /* Rendering Layouts */
516 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
517 assert(color_aspect);
518 unreachable("Color images are not yet supported.");
519
520 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
521 assert(!color_aspect);
522 return ISL_AUX_USAGE_HIZ;
523 }
524
525 /* If the layout isn't recognized in the exhaustive switch above, the
526 * VkImageLayout value is not defined in vulkan.h.
527 */
528 unreachable("layout is not a VkImageLayout enumeration member.");
529 }
530
531
532 static struct anv_state
533 alloc_surface_state(struct anv_device *device)
534 {
535 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
536 }
537
538 static enum isl_channel_select
539 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
540 struct isl_swizzle format_swizzle)
541 {
542 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
543 swizzle = component;
544
545 switch (swizzle) {
546 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
547 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
548 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
549 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
550 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
551 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
552 default:
553 unreachable("Invalid swizzle");
554 }
555 }
556
557
558 VkResult
559 anv_CreateImageView(VkDevice _device,
560 const VkImageViewCreateInfo *pCreateInfo,
561 const VkAllocationCallbacks *pAllocator,
562 VkImageView *pView)
563 {
564 ANV_FROM_HANDLE(anv_device, device, _device);
565 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
566 struct anv_image_view *iview;
567
568 iview = vk_alloc2(&device->alloc, pAllocator, sizeof(*iview), 8,
569 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
570 if (iview == NULL)
571 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
572
573 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
574
575 assert(range->layerCount > 0);
576 assert(range->baseMipLevel < image->levels);
577 assert(image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
578 VK_IMAGE_USAGE_STORAGE_BIT |
579 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
580 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
581
582 switch (image->type) {
583 default:
584 unreachable("bad VkImageType");
585 case VK_IMAGE_TYPE_1D:
586 case VK_IMAGE_TYPE_2D:
587 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
588 break;
589 case VK_IMAGE_TYPE_3D:
590 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
591 <= anv_minify(image->extent.depth, range->baseMipLevel));
592 break;
593 }
594
595 const struct anv_surface *surface =
596 anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
597
598 iview->image = image;
599 iview->bo = image->bo;
600 iview->offset = image->offset + surface->offset;
601
602 iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
603 iview->vk_format = pCreateInfo->format;
604
605 struct anv_format format = anv_get_format(&device->info, pCreateInfo->format,
606 range->aspectMask, image->tiling);
607
608 iview->isl = (struct isl_view) {
609 .format = format.isl_format,
610 .base_level = range->baseMipLevel,
611 .levels = anv_get_levelCount(image, range),
612 .base_array_layer = range->baseArrayLayer,
613 .array_len = anv_get_layerCount(image, range),
614 .swizzle = {
615 .r = remap_swizzle(pCreateInfo->components.r,
616 VK_COMPONENT_SWIZZLE_R, format.swizzle),
617 .g = remap_swizzle(pCreateInfo->components.g,
618 VK_COMPONENT_SWIZZLE_G, format.swizzle),
619 .b = remap_swizzle(pCreateInfo->components.b,
620 VK_COMPONENT_SWIZZLE_B, format.swizzle),
621 .a = remap_swizzle(pCreateInfo->components.a,
622 VK_COMPONENT_SWIZZLE_A, format.swizzle),
623 },
624 };
625
626 iview->extent = (VkExtent3D) {
627 .width = anv_minify(image->extent.width , range->baseMipLevel),
628 .height = anv_minify(image->extent.height, range->baseMipLevel),
629 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
630 };
631
632 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
633 iview->isl.base_array_layer = 0;
634 iview->isl.array_len = iview->extent.depth;
635 }
636
637 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
638 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
639 iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT;
640 } else {
641 iview->isl.usage = 0;
642 }
643
644 /* Input attachment surfaces for color are allocated and filled
645 * out at BeginRenderPass time because they need compression information.
646 * Compression is not yet enabled for depth textures and stencil doesn't
647 * allow compression so we can just use the texture surface state from the
648 * view.
649 */
650 if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
651 (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
652 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
653 iview->sampler_surface_state = alloc_surface_state(device);
654 iview->no_aux_sampler_surface_state = alloc_surface_state(device);
655
656 /* Sampling is performed in one of two buffer configurations in anv: with
657 * an auxiliary buffer or without it. Sampler states aren't always needed
658 * for both configurations, but are currently created unconditionally for
659 * simplicity.
660 *
661 * TODO: Consider allocating each surface state only when necessary.
662 */
663
664 /* Create a sampler state with the optimal aux_usage for sampling. This
665 * may use the aux_buffer.
666 */
667 const enum isl_aux_usage surf_usage =
668 anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
669 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
670
671 /* If this is a HiZ buffer we can sample from with a programmable clear
672 * value (SKL+), define the clear value to the optimal constant.
673 */
674 const float red_clear_color = surf_usage == ISL_AUX_USAGE_HIZ &&
675 device->info.gen >= 9 ?
676 ANV_HZ_FC_VAL : 0.0f;
677
678 struct isl_view view = iview->isl;
679 view.usage |= ISL_SURF_USAGE_TEXTURE_BIT;
680 isl_surf_fill_state(&device->isl_dev,
681 iview->sampler_surface_state.map,
682 .surf = &surface->isl,
683 .view = &view,
684 .clear_color.f32 = { red_clear_color,},
685 .aux_surf = &image->aux_surface.isl,
686 .aux_usage = surf_usage,
687 .mocs = device->default_mocs);
688
689 /* Create a sampler state that only uses the main buffer. */
690 isl_surf_fill_state(&device->isl_dev,
691 iview->no_aux_sampler_surface_state.map,
692 .surf = &surface->isl,
693 .view = &view,
694 .mocs = device->default_mocs);
695
696 anv_state_flush(device, iview->sampler_surface_state);
697 anv_state_flush(device, iview->no_aux_sampler_surface_state);
698 } else {
699 iview->sampler_surface_state.alloc_size = 0;
700 iview->no_aux_sampler_surface_state.alloc_size = 0;
701 }
702
703 /* NOTE: This one needs to go last since it may stomp isl_view.format */
704 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
705 iview->storage_surface_state = alloc_surface_state(device);
706 iview->writeonly_storage_surface_state = alloc_surface_state(device);
707
708 struct isl_view view = iview->isl;
709 view.usage |= ISL_SURF_USAGE_STORAGE_BIT;
710
711 /* Write-only accesses always used a typed write instruction and should
712 * therefore use the real format.
713 */
714 isl_surf_fill_state(&device->isl_dev,
715 iview->writeonly_storage_surface_state.map,
716 .surf = &surface->isl,
717 .view = &view,
718 .aux_surf = &image->aux_surface.isl,
719 .aux_usage = image->aux_usage,
720 .mocs = device->default_mocs);
721
722 if (isl_has_matching_typed_storage_image_format(&device->info,
723 format.isl_format)) {
724 /* Typed surface reads support a very limited subset of the shader
725 * image formats. Translate it into the closest format the hardware
726 * supports.
727 */
728 view.format = isl_lower_storage_image_format(&device->info,
729 format.isl_format);
730
731 isl_surf_fill_state(&device->isl_dev,
732 iview->storage_surface_state.map,
733 .surf = &surface->isl,
734 .view = &view,
735 .aux_surf = &image->aux_surface.isl,
736 .aux_usage = image->aux_usage,
737 .mocs = device->default_mocs);
738 } else {
739 anv_fill_buffer_surface_state(device, iview->storage_surface_state,
740 ISL_FORMAT_RAW,
741 iview->offset,
742 iview->bo->size - iview->offset, 1);
743 }
744
745 isl_surf_fill_image_param(&device->isl_dev,
746 &iview->storage_image_param,
747 &surface->isl, &iview->isl);
748
749 anv_state_flush(device, iview->storage_surface_state);
750 anv_state_flush(device, iview->writeonly_storage_surface_state);
751 } else {
752 iview->storage_surface_state.alloc_size = 0;
753 iview->writeonly_storage_surface_state.alloc_size = 0;
754 }
755
756 *pView = anv_image_view_to_handle(iview);
757
758 return VK_SUCCESS;
759 }
760
761 void
762 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
763 const VkAllocationCallbacks *pAllocator)
764 {
765 ANV_FROM_HANDLE(anv_device, device, _device);
766 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
767
768 if (!iview)
769 return;
770
771 if (iview->sampler_surface_state.alloc_size > 0) {
772 anv_state_pool_free(&device->surface_state_pool,
773 iview->sampler_surface_state);
774 }
775
776 if (iview->storage_surface_state.alloc_size > 0) {
777 anv_state_pool_free(&device->surface_state_pool,
778 iview->storage_surface_state);
779 }
780
781 if (iview->writeonly_storage_surface_state.alloc_size > 0) {
782 anv_state_pool_free(&device->surface_state_pool,
783 iview->writeonly_storage_surface_state);
784 }
785
786 vk_free2(&device->alloc, pAllocator, iview);
787 }
788
789
790 VkResult
791 anv_CreateBufferView(VkDevice _device,
792 const VkBufferViewCreateInfo *pCreateInfo,
793 const VkAllocationCallbacks *pAllocator,
794 VkBufferView *pView)
795 {
796 ANV_FROM_HANDLE(anv_device, device, _device);
797 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
798 struct anv_buffer_view *view;
799
800 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
801 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
802 if (!view)
803 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
804
805 /* TODO: Handle the format swizzle? */
806
807 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
808 VK_IMAGE_ASPECT_COLOR_BIT,
809 VK_IMAGE_TILING_LINEAR);
810 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
811 view->bo = buffer->bo;
812 view->offset = buffer->offset + pCreateInfo->offset;
813 view->range = anv_buffer_get_range(buffer, pCreateInfo->offset,
814 pCreateInfo->range);
815 view->range = align_down_npot_u32(view->range, format_bs);
816
817 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
818 view->surface_state = alloc_surface_state(device);
819
820 anv_fill_buffer_surface_state(device, view->surface_state,
821 view->format,
822 view->offset, view->range, format_bs);
823 } else {
824 view->surface_state = (struct anv_state){ 0 };
825 }
826
827 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
828 view->storage_surface_state = alloc_surface_state(device);
829 view->writeonly_storage_surface_state = alloc_surface_state(device);
830
831 enum isl_format storage_format =
832 isl_has_matching_typed_storage_image_format(&device->info,
833 view->format) ?
834 isl_lower_storage_image_format(&device->info, view->format) :
835 ISL_FORMAT_RAW;
836
837 anv_fill_buffer_surface_state(device, view->storage_surface_state,
838 storage_format,
839 view->offset, view->range,
840 (storage_format == ISL_FORMAT_RAW ? 1 :
841 isl_format_get_layout(storage_format)->bpb / 8));
842
843 /* Write-only accesses should use the original format. */
844 anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
845 view->format,
846 view->offset, view->range,
847 isl_format_get_layout(view->format)->bpb / 8);
848
849 isl_buffer_fill_image_param(&device->isl_dev,
850 &view->storage_image_param,
851 view->format, view->range);
852 } else {
853 view->storage_surface_state = (struct anv_state){ 0 };
854 view->writeonly_storage_surface_state = (struct anv_state){ 0 };
855 }
856
857 *pView = anv_buffer_view_to_handle(view);
858
859 return VK_SUCCESS;
860 }
861
862 void
863 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
864 const VkAllocationCallbacks *pAllocator)
865 {
866 ANV_FROM_HANDLE(anv_device, device, _device);
867 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
868
869 if (!view)
870 return;
871
872 if (view->surface_state.alloc_size > 0)
873 anv_state_pool_free(&device->surface_state_pool,
874 view->surface_state);
875
876 if (view->storage_surface_state.alloc_size > 0)
877 anv_state_pool_free(&device->surface_state_pool,
878 view->storage_surface_state);
879
880 if (view->writeonly_storage_surface_state.alloc_size > 0)
881 anv_state_pool_free(&device->surface_state_pool,
882 view->writeonly_storage_surface_state);
883
884 vk_free2(&device->alloc, pAllocator, view);
885 }
886
887 const struct anv_surface *
888 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
889 VkImageAspectFlags aspect_mask)
890 {
891 switch (aspect_mask) {
892 case VK_IMAGE_ASPECT_COLOR_BIT:
893 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
894 return &image->color_surface;
895 case VK_IMAGE_ASPECT_DEPTH_BIT:
896 assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
897 return &image->depth_surface;
898 case VK_IMAGE_ASPECT_STENCIL_BIT:
899 assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
900 return &image->stencil_surface;
901 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
902 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
903 * combined depth stencil formats. Specifically, it states:
904 *
905 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
906 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
907 *
908 * Image views with both depth and stencil aspects are only valid for
909 * render target attachments, in which case
910 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
911 * stencil surfaces from the underlying surface.
912 */
913 if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
914 return &image->depth_surface;
915 } else {
916 assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
917 return &image->stencil_surface;
918 }
919 default:
920 unreachable("image does not have aspect");
921 return NULL;
922 }
923 }