anv/query: Use a variable-length slot size
[mesa.git] / src / intel / vulkan / genX_query.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "genxml/gen_macros.h"
33 #include "genxml/genX_pack.h"
34
35 VkResult genX(CreateQueryPool)(
36 VkDevice _device,
37 const VkQueryPoolCreateInfo* pCreateInfo,
38 const VkAllocationCallbacks* pAllocator,
39 VkQueryPool* pQueryPool)
40 {
41 ANV_FROM_HANDLE(anv_device, device, _device);
42 struct anv_query_pool *pool;
43 VkResult result;
44
45 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
46
47 /* Query pool slots are made up of some number of 64-bit values packed
48 * tightly together. The first 64-bit value is always the "available" bit
49 * which is 0 when the query is unavailable and 1 when it is available.
50 * The 64-bit values that follow are determined by the type of query.
51 */
52 uint32_t uint64s_per_slot = 1;
53
54 switch (pCreateInfo->queryType) {
55 case VK_QUERY_TYPE_OCCLUSION:
56 /* Occlusion queries have two values: begin and end. */
57 uint64s_per_slot += 2;
58 break;
59 case VK_QUERY_TYPE_TIMESTAMP:
60 /* Timestamps just have the one timestamp value */
61 uint64s_per_slot += 1;
62 break;
63 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
64 return VK_ERROR_INCOMPATIBLE_DRIVER;
65 default:
66 assert(!"Invalid query type");
67 }
68
69 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
70 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
71 if (pool == NULL)
72 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
73
74 pool->type = pCreateInfo->queryType;
75 pool->stride = uint64s_per_slot * sizeof(uint64_t);
76 pool->slots = pCreateInfo->queryCount;
77
78 uint64_t size = pool->slots * pool->stride;
79 result = anv_bo_init_new(&pool->bo, device, size);
80 if (result != VK_SUCCESS)
81 goto fail;
82
83 pool->bo.map = anv_gem_mmap(device, pool->bo.gem_handle, 0, size, 0);
84
85 *pQueryPool = anv_query_pool_to_handle(pool);
86
87 return VK_SUCCESS;
88
89 fail:
90 vk_free2(&device->alloc, pAllocator, pool);
91
92 return result;
93 }
94
95 void genX(DestroyQueryPool)(
96 VkDevice _device,
97 VkQueryPool _pool,
98 const VkAllocationCallbacks* pAllocator)
99 {
100 ANV_FROM_HANDLE(anv_device, device, _device);
101 ANV_FROM_HANDLE(anv_query_pool, pool, _pool);
102
103 if (!pool)
104 return;
105
106 anv_gem_munmap(pool->bo.map, pool->bo.size);
107 anv_gem_close(device, pool->bo.gem_handle);
108 vk_free2(&device->alloc, pAllocator, pool);
109 }
110
111 VkResult genX(GetQueryPoolResults)(
112 VkDevice _device,
113 VkQueryPool queryPool,
114 uint32_t firstQuery,
115 uint32_t queryCount,
116 size_t dataSize,
117 void* pData,
118 VkDeviceSize stride,
119 VkQueryResultFlags flags)
120 {
121 ANV_FROM_HANDLE(anv_device, device, _device);
122 ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
123 int64_t timeout = INT64_MAX;
124 uint64_t result;
125 int ret;
126
127 assert(pool->type == VK_QUERY_TYPE_OCCLUSION ||
128 pool->type == VK_QUERY_TYPE_TIMESTAMP);
129
130 if (pData == NULL)
131 return VK_SUCCESS;
132
133 if (flags & VK_QUERY_RESULT_WAIT_BIT) {
134 ret = anv_gem_wait(device, pool->bo.gem_handle, &timeout);
135 if (ret == -1) {
136 /* We don't know the real error. */
137 return vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY,
138 "gem_wait failed %m");
139 }
140 }
141
142 void *data_end = pData + dataSize;
143
144 if (!device->info.has_llc) {
145 uint64_t offset = firstQuery * pool->stride;
146 uint64_t size = queryCount * pool->stride;
147 anv_invalidate_range(pool->bo.map + offset,
148 MIN2(size, pool->bo.size - offset));
149 }
150
151 VkResult status = VK_SUCCESS;
152 for (uint32_t i = 0; i < queryCount; i++) {
153 uint64_t *slot = pool->bo.map + (firstQuery + i) * pool->stride;
154
155 /* Availability is always at the start of the slot */
156 bool available = slot[0];
157
158 /* From the Vulkan 1.0.42 spec:
159 *
160 * "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are
161 * both not set then no result values are written to pData for
162 * queries that are in the unavailable state at the time of the call,
163 * and vkGetQueryPoolResults returns VK_NOT_READY. However,
164 * availability state is still written to pData for those queries if
165 * VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set."
166 */
167 bool write_results = available || (flags & VK_QUERY_RESULT_PARTIAL_BIT);
168
169 if (write_results) {
170 switch (pool->type) {
171 case VK_QUERY_TYPE_OCCLUSION: {
172 result = slot[2] - slot[1];
173 break;
174 }
175 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
176 unreachable("pipeline stats not supported");
177 case VK_QUERY_TYPE_TIMESTAMP: {
178 result = slot[1];
179 break;
180 }
181 default:
182 unreachable("invalid pool type");
183 }
184 } else {
185 status = VK_NOT_READY;
186 }
187
188 if (flags & VK_QUERY_RESULT_64_BIT) {
189 uint64_t *dst = pData;
190 if (write_results)
191 dst[0] = result;
192 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT)
193 dst[1] = available;
194 } else {
195 uint32_t *dst = pData;
196 if (write_results)
197 dst[0] = result;
198 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT)
199 dst[1] = available;
200 }
201
202 pData += stride;
203 if (pData >= data_end)
204 break;
205 }
206
207 return status;
208 }
209
210 static void
211 emit_ps_depth_count(struct anv_cmd_buffer *cmd_buffer,
212 struct anv_bo *bo, uint32_t offset)
213 {
214 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
215 pc.DestinationAddressType = DAT_PPGTT;
216 pc.PostSyncOperation = WritePSDepthCount;
217 pc.DepthStallEnable = true;
218 pc.Address = (struct anv_address) { bo, offset };
219
220 if (GEN_GEN == 9 && cmd_buffer->device->info.gt == 4)
221 pc.CommandStreamerStallEnable = true;
222 }
223 }
224
225 static void
226 emit_query_availability(struct anv_cmd_buffer *cmd_buffer,
227 struct anv_bo *bo, uint32_t offset)
228 {
229 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
230 pc.DestinationAddressType = DAT_PPGTT;
231 pc.PostSyncOperation = WriteImmediateData;
232 pc.Address = (struct anv_address) { bo, offset };
233 pc.ImmediateData = 1;
234 }
235 }
236
237 void genX(CmdResetQueryPool)(
238 VkCommandBuffer commandBuffer,
239 VkQueryPool queryPool,
240 uint32_t firstQuery,
241 uint32_t queryCount)
242 {
243 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
244 ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
245
246 for (uint32_t i = 0; i < queryCount; i++) {
247 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdm) {
248 sdm.Address = (struct anv_address) {
249 .bo = &pool->bo,
250 .offset = (firstQuery + i) * pool->stride,
251 };
252 sdm.DataDWord0 = 0;
253 sdm.DataDWord1 = 0;
254 }
255 }
256 }
257
258 void genX(CmdBeginQuery)(
259 VkCommandBuffer commandBuffer,
260 VkQueryPool queryPool,
261 uint32_t query,
262 VkQueryControlFlags flags)
263 {
264 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
265 ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
266
267 /* Workaround: When meta uses the pipeline with the VS disabled, it seems
268 * that the pipelining of the depth write breaks. What we see is that
269 * samples from the render pass clear leaks into the first query
270 * immediately after the clear. Doing a pipecontrol with a post-sync
271 * operation and DepthStallEnable seems to work around the issue.
272 */
273 if (cmd_buffer->state.need_query_wa) {
274 cmd_buffer->state.need_query_wa = false;
275 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
276 pc.DepthCacheFlushEnable = true;
277 pc.DepthStallEnable = true;
278 }
279 }
280
281 switch (pool->type) {
282 case VK_QUERY_TYPE_OCCLUSION:
283 emit_ps_depth_count(cmd_buffer, &pool->bo, query * pool->stride + 8);
284 break;
285
286 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
287 default:
288 unreachable("");
289 }
290 }
291
292 void genX(CmdEndQuery)(
293 VkCommandBuffer commandBuffer,
294 VkQueryPool queryPool,
295 uint32_t query)
296 {
297 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
298 ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
299
300 switch (pool->type) {
301 case VK_QUERY_TYPE_OCCLUSION:
302 emit_ps_depth_count(cmd_buffer, &pool->bo, query * pool->stride + 16);
303 emit_query_availability(cmd_buffer, &pool->bo, query * pool->stride);
304 break;
305
306 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
307 default:
308 unreachable("");
309 }
310 }
311
312 #define TIMESTAMP 0x2358
313
314 void genX(CmdWriteTimestamp)(
315 VkCommandBuffer commandBuffer,
316 VkPipelineStageFlagBits pipelineStage,
317 VkQueryPool queryPool,
318 uint32_t query)
319 {
320 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
321 ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
322 uint32_t offset = query * pool->stride;
323
324 assert(pool->type == VK_QUERY_TYPE_TIMESTAMP);
325
326 switch (pipelineStage) {
327 case VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT:
328 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), srm) {
329 srm.RegisterAddress = TIMESTAMP;
330 srm.MemoryAddress = (struct anv_address) { &pool->bo, offset + 8 };
331 }
332 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), srm) {
333 srm.RegisterAddress = TIMESTAMP + 4;
334 srm.MemoryAddress = (struct anv_address) { &pool->bo, offset + 12 };
335 }
336 break;
337
338 default:
339 /* Everything else is bottom-of-pipe */
340 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
341 pc.DestinationAddressType = DAT_PPGTT;
342 pc.PostSyncOperation = WriteTimestamp;
343 pc.Address = (struct anv_address) { &pool->bo, offset + 8 };
344
345 if (GEN_GEN == 9 && cmd_buffer->device->info.gt == 4)
346 pc.CommandStreamerStallEnable = true;
347 }
348 break;
349 }
350
351 emit_query_availability(cmd_buffer, &pool->bo, offset);
352 }
353
354 #if GEN_GEN > 7 || GEN_IS_HASWELL
355
356 #define alu_opcode(v) __gen_uint((v), 20, 31)
357 #define alu_operand1(v) __gen_uint((v), 10, 19)
358 #define alu_operand2(v) __gen_uint((v), 0, 9)
359 #define alu(opcode, operand1, operand2) \
360 alu_opcode(opcode) | alu_operand1(operand1) | alu_operand2(operand2)
361
362 #define OPCODE_NOOP 0x000
363 #define OPCODE_LOAD 0x080
364 #define OPCODE_LOADINV 0x480
365 #define OPCODE_LOAD0 0x081
366 #define OPCODE_LOAD1 0x481
367 #define OPCODE_ADD 0x100
368 #define OPCODE_SUB 0x101
369 #define OPCODE_AND 0x102
370 #define OPCODE_OR 0x103
371 #define OPCODE_XOR 0x104
372 #define OPCODE_STORE 0x180
373 #define OPCODE_STOREINV 0x580
374
375 #define OPERAND_R0 0x00
376 #define OPERAND_R1 0x01
377 #define OPERAND_R2 0x02
378 #define OPERAND_R3 0x03
379 #define OPERAND_R4 0x04
380 #define OPERAND_SRCA 0x20
381 #define OPERAND_SRCB 0x21
382 #define OPERAND_ACCU 0x31
383 #define OPERAND_ZF 0x32
384 #define OPERAND_CF 0x33
385
386 #define CS_GPR(n) (0x2600 + (n) * 8)
387
388 static void
389 emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg,
390 struct anv_bo *bo, uint32_t offset)
391 {
392 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) {
393 lrm.RegisterAddress = reg,
394 lrm.MemoryAddress = (struct anv_address) { bo, offset };
395 }
396 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) {
397 lrm.RegisterAddress = reg + 4;
398 lrm.MemoryAddress = (struct anv_address) { bo, offset + 4 };
399 }
400 }
401
402 static void
403 store_query_result(struct anv_batch *batch, uint32_t reg,
404 struct anv_bo *bo, uint32_t offset, VkQueryResultFlags flags)
405 {
406 anv_batch_emit(batch, GENX(MI_STORE_REGISTER_MEM), srm) {
407 srm.RegisterAddress = reg;
408 srm.MemoryAddress = (struct anv_address) { bo, offset };
409 }
410
411 if (flags & VK_QUERY_RESULT_64_BIT) {
412 anv_batch_emit(batch, GENX(MI_STORE_REGISTER_MEM), srm) {
413 srm.RegisterAddress = reg + 4;
414 srm.MemoryAddress = (struct anv_address) { bo, offset + 4 };
415 }
416 }
417 }
418
419 void genX(CmdCopyQueryPoolResults)(
420 VkCommandBuffer commandBuffer,
421 VkQueryPool queryPool,
422 uint32_t firstQuery,
423 uint32_t queryCount,
424 VkBuffer destBuffer,
425 VkDeviceSize destOffset,
426 VkDeviceSize destStride,
427 VkQueryResultFlags flags)
428 {
429 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
430 ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
431 ANV_FROM_HANDLE(anv_buffer, buffer, destBuffer);
432 uint32_t slot_offset, dst_offset;
433
434 if (flags & VK_QUERY_RESULT_WAIT_BIT) {
435 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
436 pc.CommandStreamerStallEnable = true;
437 pc.StallAtPixelScoreboard = true;
438 }
439 }
440
441 dst_offset = buffer->offset + destOffset;
442 for (uint32_t i = 0; i < queryCount; i++) {
443
444 slot_offset = (firstQuery + i) * pool->stride;
445 switch (pool->type) {
446 case VK_QUERY_TYPE_OCCLUSION:
447 emit_load_alu_reg_u64(&cmd_buffer->batch,
448 CS_GPR(0), &pool->bo, slot_offset + 8);
449 emit_load_alu_reg_u64(&cmd_buffer->batch,
450 CS_GPR(1), &pool->bo, slot_offset + 16);
451
452 /* FIXME: We need to clamp the result for 32 bit. */
453
454 uint32_t *dw = anv_batch_emitn(&cmd_buffer->batch, 5, GENX(MI_MATH));
455 dw[1] = alu(OPCODE_LOAD, OPERAND_SRCA, OPERAND_R1);
456 dw[2] = alu(OPCODE_LOAD, OPERAND_SRCB, OPERAND_R0);
457 dw[3] = alu(OPCODE_SUB, 0, 0);
458 dw[4] = alu(OPCODE_STORE, OPERAND_R2, OPERAND_ACCU);
459 break;
460
461 case VK_QUERY_TYPE_TIMESTAMP:
462 emit_load_alu_reg_u64(&cmd_buffer->batch,
463 CS_GPR(2), &pool->bo, slot_offset + 8);
464 break;
465
466 default:
467 unreachable("unhandled query type");
468 }
469
470 store_query_result(&cmd_buffer->batch,
471 CS_GPR(2), buffer->bo, dst_offset, flags);
472
473 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
474 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(0),
475 &pool->bo, slot_offset);
476 if (flags & VK_QUERY_RESULT_64_BIT)
477 store_query_result(&cmd_buffer->batch,
478 CS_GPR(0), buffer->bo, dst_offset + 8, flags);
479 else
480 store_query_result(&cmd_buffer->batch,
481 CS_GPR(0), buffer->bo, dst_offset + 4, flags);
482 }
483
484 dst_offset += destStride;
485 }
486 }
487
488 #else
489 void genX(CmdCopyQueryPoolResults)(
490 VkCommandBuffer commandBuffer,
491 VkQueryPool queryPool,
492 uint32_t firstQuery,
493 uint32_t queryCount,
494 VkBuffer destBuffer,
495 VkDeviceSize destOffset,
496 VkDeviceSize destStride,
497 VkQueryResultFlags flags)
498 {
499 anv_finishme("Queries not yet supported on Ivy Bridge");
500 }
501 #endif