Merge branch 'mesa_7_7_branch'
[mesa.git] / src / mesa / drivers / dri / i810 / i810render.c
1 /*
2 * Intel i810 DRI driver for Mesa 3.5
3 *
4 * Copyright (C) 1999-2000 Keith Whitwell All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL KEITH WHITWELL BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
21 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Author:
25 * Keith Whitwell <keith@tungstengraphics.com>
26 */
27
28
29 /*
30 * Render unclipped vertex buffers by emitting vertices directly to
31 * dma buffers. Use strip/fan hardware acceleration where possible.
32 *
33 */
34 #include "main/glheader.h"
35 #include "main/context.h"
36 #include "main/macros.h"
37 #include "main/imports.h"
38 #include "main/mtypes.h"
39
40 #include "tnl/t_context.h"
41
42 #include "i810screen.h"
43 #include "i810_dri.h"
44
45 #include "i810context.h"
46 #include "i810tris.h"
47 #include "i810vb.h"
48 #include "i810ioctl.h"
49
50 /*
51 * Render unclipped vertex buffers by emitting vertices directly to
52 * dma buffers. Use strip/fan hardware primitives where possible.
53 * Try to simulate missing primitives with indexed vertices.
54 */
55 #define HAVE_POINTS 0
56 #define HAVE_LINES 1
57 #define HAVE_LINE_STRIPS 1
58 #define HAVE_TRIANGLES 1
59 #define HAVE_TRI_STRIPS 1
60 #define HAVE_TRI_STRIP_1 0 /* has it, template can't use it yet */
61 #define HAVE_TRI_FANS 1
62 #define HAVE_POLYGONS 1
63 #define HAVE_QUADS 0
64 #define HAVE_QUAD_STRIPS 0
65
66 #define HAVE_ELTS 0
67
68
69 static GLuint hw_prim[GL_POLYGON+1] = {
70 0,
71 PR_LINES,
72 0,
73 PR_LINESTRIP,
74 PR_TRIANGLES,
75 PR_TRISTRIP_0,
76 PR_TRIFAN,
77 0,
78 0,
79 PR_POLYGON
80 };
81
82 static const GLenum reduced_prim[GL_POLYGON+1] = {
83 GL_POINTS,
84 GL_LINES,
85 GL_LINES,
86 GL_LINES,
87 GL_TRIANGLES,
88 GL_TRIANGLES,
89 GL_TRIANGLES,
90 GL_TRIANGLES,
91 GL_TRIANGLES,
92 GL_TRIANGLES
93 };
94
95
96
97
98 #define LOCAL_VARS i810ContextPtr imesa = I810_CONTEXT(ctx)
99 #define INIT( prim ) do { \
100 I810_STATECHANGE(imesa, 0); \
101 i810RasterPrimitive( ctx, reduced_prim[prim], hw_prim[prim] ); \
102 } while (0)
103 #define GET_CURRENT_VB_MAX_VERTS() \
104 (((int)imesa->vertex_high - (int)imesa->vertex_low) / (imesa->vertex_size*4))
105 #define GET_SUBSEQUENT_VB_MAX_VERTS() \
106 (I810_DMA_BUF_SZ-4) / (imesa->vertex_size * 4)
107
108 #define ALLOC_VERTS( nr ) \
109 i810AllocDmaLow( imesa, (nr) * imesa->vertex_size * 4)
110 #define EMIT_VERTS( ctx, j, nr, buf ) \
111 i810_emit_contiguous_verts(ctx, j, (j)+(nr), buf)
112
113 #define FLUSH() I810_FIREVERTICES( imesa )
114
115
116 #define TAG(x) i810_##x
117 #include "tnl_dd/t_dd_dmatmp.h"
118
119
120 /**********************************************************************/
121 /* Render pipeline stage */
122 /**********************************************************************/
123
124
125 static GLboolean i810_run_render( GLcontext *ctx,
126 struct tnl_pipeline_stage *stage )
127 {
128 i810ContextPtr imesa = I810_CONTEXT(ctx);
129 TNLcontext *tnl = TNL_CONTEXT(ctx);
130 struct vertex_buffer *VB = &tnl->vb;
131 GLuint i;
132
133 /* Don't handle clipping or indexed vertices.
134 */
135 if (imesa->RenderIndex != 0 ||
136 !i810_validate_render( ctx, VB )) {
137 return GL_TRUE;
138 }
139
140 imesa->SetupNewInputs = VERT_BIT_POS;
141
142 tnl->Driver.Render.Start( ctx );
143
144 for (i = 0 ; i < VB->PrimitiveCount ; i++)
145 {
146 GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
147 GLuint start = VB->Primitive[i].start;
148 GLuint length = VB->Primitive[i].count;
149
150 if (!length)
151 continue;
152
153 i810_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
154 prim );
155 }
156
157 tnl->Driver.Render.Finish( ctx );
158
159 return GL_FALSE; /* finished the pipe */
160 }
161
162
163
164 const struct tnl_pipeline_stage _i810_render_stage =
165 {
166 "i810 render",
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 i810_run_render /* run */
172 };