src/mesa/drivers/dri/i915/i915_context.h

   1  /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef I915CONTEXT_INC
  29 #define I915CONTEXT_INC
  30
  31 #include "intel_context.h"
  32 #include "i915_reg.h"
  33
  34 #define I915_FALLBACK_TEXTURE            0x1000
  35 #define I915_FALLBACK_COLORMASK          0x2000
  36 #define I915_FALLBACK_STENCIL            0x4000
  37 #define I915_FALLBACK_STIPPLE            0x8000
  38 #define I915_FALLBACK_PROGRAM            0x10000
  39 #define I915_FALLBACK_LOGICOP            0x20000
  40 #define I915_FALLBACK_POLYGON_SMOOTH     0x40000
  41 #define I915_FALLBACK_POINT_SMOOTH       0x80000
  42
  43 #define I915_UPLOAD_CTX              0x1
  44 #define I915_UPLOAD_BUFFERS          0x2
  45 #define I915_UPLOAD_STIPPLE          0x4
  46 #define I915_UPLOAD_PROGRAM          0x8
  47 #define I915_UPLOAD_CONSTANTS        0x10
  48 #define I915_UPLOAD_FOG              0x20
  49 #define I915_UPLOAD_INVARIENT        0x40
  50 #define I915_UPLOAD_DEFAULTS         0x80
  51 #define I915_UPLOAD_RASTER_RULES     0x100
  52 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
  53 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
  54 #define I915_UPLOAD_TEX_0_SHIFT      16
  55
  56
  57 /* State structure offsets - these will probably disappear.
  58  */
  59 #define I915_DESTREG_CBUFADDR0 0
  60 #define I915_DESTREG_CBUFADDR1 1
  61 #define I915_DESTREG_DBUFADDR0 3
  62 #define I915_DESTREG_DBUFADDR1 4
  63 #define I915_DESTREG_DV0 6
  64 #define I915_DESTREG_DV1 7
  65 #define I915_DESTREG_SENABLE 8
  66 #define I915_DESTREG_SR0 9
  67 #define I915_DESTREG_SR1 10
  68 #define I915_DESTREG_SR2 11
  69 #define I915_DESTREG_DRAWRECT0 12
  70 #define I915_DESTREG_DRAWRECT1 13
  71 #define I915_DESTREG_DRAWRECT2 14
  72 #define I915_DESTREG_DRAWRECT3 15
  73 #define I915_DESTREG_DRAWRECT4 16
  74 #define I915_DESTREG_DRAWRECT5 17
  75 #define I915_DEST_SETUP_SIZE 18
  76
  77 #define I915_CTXREG_STATE4              0
  78 #define I915_CTXREG_LI                  1
  79 #define I915_CTXREG_LIS2                        2
  80 #define I915_CTXREG_LIS4                        3
  81 #define I915_CTXREG_LIS5                        4
  82 #define I915_CTXREG_LIS6                        5
  83 #define I915_CTXREG_IAB                 6
  84 #define I915_CTXREG_BLENDCOLOR0         7
  85 #define I915_CTXREG_BLENDCOLOR1         8
  86 #define I915_CTXREG_BF_STENCIL_OPS      9
  87 #define I915_CTXREG_BF_STENCIL_MASKS    10
  88 #define I915_CTX_SETUP_SIZE             11
  89
  90 #define I915_FOGREG_COLOR               0
  91 #define I915_FOGREG_MODE0               1
  92 #define I915_FOGREG_MODE1               2
  93 #define I915_FOGREG_MODE2               3
  94 #define I915_FOGREG_MODE3               4
  95 #define I915_FOG_SETUP_SIZE             5
  96
  97 #define I915_STPREG_ST0        0
  98 #define I915_STPREG_ST1        1
  99 #define I915_STP_SETUP_SIZE    2
 100
 101 #define I915_TEXREG_MS3        1
 102 #define I915_TEXREG_MS4        2
 103 #define I915_TEXREG_SS2        3
 104 #define I915_TEXREG_SS3        4
 105 #define I915_TEXREG_SS4        5
 106 #define I915_TEX_SETUP_SIZE    6
 107
 108 #define I915_DEFREG_C0    0
 109 #define I915_DEFREG_C1    1
 110 #define I915_DEFREG_S0    2
 111 #define I915_DEFREG_S1    3
 112 #define I915_DEFREG_Z0    4
 113 #define I915_DEFREG_Z1    5
 114 #define I915_DEF_SETUP_SIZE    6
 115
 116 enum {
 117    I915_RASTER_RULES,
 118    I915_RASTER_RULES_SETUP_SIZE,
 119 };
 120
 121 #define I915_MAX_CONSTANT      32
 122 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 123
 124 #define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
 125                                 I915_MAX_TEX_INSN + \
 126                                 I915_MAX_ALU_INSN)
 127
 128 /* Maximum size of the program packet, which matches the limits on
 129  * decl, tex, and ALU instructions.
 130  */
 131 #define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
 132
 133 /* Hardware version of a parsed fragment program.  "Derived" from the
 134  * mesa fragment_program struct.
 135  */
 136 struct i915_fragment_program
 137 {
 138    struct gl_fragment_program FragProg;
 139
 140    GLboolean translated;
 141    GLboolean params_uptodate;
 142    GLboolean on_hardware;
 143    GLboolean error;             /* If program is malformed for any reason. */
 144
 145    /** Record of which phases R registers were last written in. */
 146    GLuint register_phases[16];
 147    GLuint indirections;
 148    GLuint nr_tex_indirect;
 149    GLuint nr_tex_insn;
 150    GLuint nr_alu_insn;
 151    GLuint nr_decl_insn;
 152
 153
 154
 155
 156    /* TODO: split between the stored representation of a program and
 157     * the state used to build that representation.
 158     */
 159    GLcontext *ctx;
 160
 161    /* declarations contains the packet header. */
 162    GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
 163    GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
 164
 165    GLfloat constant[I915_MAX_CONSTANT][4];
 166    GLuint constant_flags[I915_MAX_CONSTANT];
 167    GLuint nr_constants;
 168
 169    GLuint *csr;                 /* Cursor, points into program.
 170                                  */
 171
 172    GLuint *decl;                /* Cursor, points into declarations.
 173                                  */
 174
 175    GLuint decl_s;               /* flags for which s regs need to be decl'd */
 176    GLuint decl_t;               /* flags for which t regs need to be decl'd */
 177
 178    GLuint temp_flag;            /* Tracks temporary regs which are in
 179                                  * use.
 180                                  */
 181
 182    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
 183                                  * use.
 184                                  */
 185
 186
 187    /* Track which R registers are "live" for each instruction.
 188     * A register is live between the time it's written to and the last time
 189     * it's read. */
 190    GLuint usedRegs[I915_MAX_INSN];
 191
 192    /* Helpers for i915_fragprog.c:
 193     */
 194    GLuint wpos_tex;
 195    GLboolean depth_written;
 196
 197    struct
 198    {
 199       GLuint reg;               /* Hardware constant idx */
 200       const GLfloat *values;    /* Pointer to tracked values */
 201    } param[I915_MAX_CONSTANT];
 202    GLuint nr_params;
 203 };
 204
 205
 206
 207
 208
 209
 210
 211 #define I915_TEX_UNITS 8
 212
 213
 214 struct i915_hw_state
 215 {
 216    GLuint Ctx[I915_CTX_SETUP_SIZE];
 217    GLuint Buffer[I915_DEST_SETUP_SIZE];
 218    GLuint Stipple[I915_STP_SETUP_SIZE];
 219    GLuint Fog[I915_FOG_SETUP_SIZE];
 220    GLuint Defaults[I915_DEF_SETUP_SIZE];
 221    GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
 222    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
 223    GLuint Constant[I915_CONSTANT_SIZE];
 224    GLuint ConstantSize;
 225    GLuint Program[I915_PROGRAM_SIZE];
 226    GLuint ProgramSize;
 227
 228    /* Region pointers for relocation:
 229     */
 230    struct intel_region *draw_region;
 231    struct intel_region *depth_region;
 232 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
 233
 234    /* Regions aren't actually that appropriate here as the memory may
 235     * be from a PBO or FBO.  Will have to do this for draw and depth for
 236     * FBO's...
 237     */
 238    dri_bo *tex_buffer[I915_TEX_UNITS];
 239    GLuint tex_offset[I915_TEX_UNITS];
 240
 241
 242    GLuint active;               /* I915_UPLOAD_* */
 243    GLuint emitted;              /* I915_UPLOAD_* */
 244 };
 245
 246 #define I915_FOG_PIXEL  2
 247 #define I915_FOG_VERTEX 1
 248 #define I915_FOG_NONE   0
 249
 250 struct i915_context
 251 {
 252    struct intel_context intel;
 253
 254    GLuint last_ReallyEnabled;
 255    GLuint vertex_fog;
 256    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
 257
 258
 259    struct i915_fragment_program *current_program;
 260
 261    struct i915_hw_state meta, initial, state, *current;
 262 };
 263
 264
 265 #define I915_STATECHANGE(i915, flag)                                    \
 266 do {                                                                    \
 267    INTEL_FIREVERTICES( &(i915)->intel );                                        \
 268    (i915)->state.emitted &= ~(flag);                                    \
 269 } while (0)
 270
 271 #define I915_ACTIVESTATE(i915, flag, mode)                      \
 272 do {                                                            \
 273    INTEL_FIREVERTICES( &(i915)->intel );                                \
 274    if (mode)                                                    \
 275       (i915)->state.active |= (flag);                           \
 276    else                                                         \
 277       (i915)->state.active &= ~(flag);                          \
 278 } while (0)
 279
 280
 281 /*======================================================================
 282  * i915_vtbl.c
 283  */
 284 extern void i915InitVtbl(struct i915_context *i915);
 285
 286 extern void
 287 i915_state_draw_region(struct intel_context *intel,
 288                        struct i915_hw_state *state,
 289                        struct intel_region *color_region,
 290                        struct intel_region *depth_region);
 291
 292
 293
 294 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
 295 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
 296 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )                                \
 297 do {                                                                    \
 298    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);       \
 299    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);      \
 300    s4 |= S4;                                                            \
 301    intel->vertex_attr_count++;                                          \
 302    offset += (SZ);                                                      \
 303 } while (0)
 304
 305 #define EMIT_PAD( N )                                                   \
 306 do {                                                                    \
 307    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;            \
 308    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;     \
 309    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);          \
 310    intel->vertex_attr_count++;                                          \
 311    offset += (N);                                                       \
 312 } while (0)
 313
 314
 315
 316 /*======================================================================
 317  * i915_context.c
 318  */
 319 extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
 320                                    __DRIcontextPrivate * driContextPriv,
 321                                    void *sharedContextPrivate);
 322
 323
 324 /*======================================================================
 325  * i915_debug.c
 326  */
 327 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
 328 extern void i915_print_ureg(const char *msg, GLuint ureg);
 329
 330
 331 /*======================================================================
 332  * i915_state.c
 333  */
 334 extern void i915InitStateFunctions(struct dd_function_table *functions);
 335 extern void i915InitState(struct i915_context *i915);
 336 extern void i915_update_fog(GLcontext * ctx);
 337 extern void i915_update_stencil(GLcontext * ctx);
 338 extern void i915_update_provoking_vertex(GLcontext *ctx);
 339
 340
 341 /*======================================================================
 342  * i915_tex.c
 343  */
 344 extern void i915UpdateTextureState(struct intel_context *intel);
 345 extern void i915InitTextureFuncs(struct dd_function_table *functions);
 346
 347 /*======================================================================
 348  * i915_metaops.c
 349  */
 350 void i915InitMetaFuncs(struct i915_context *i915);
 351
 352
 353 /*======================================================================
 354  * i915_fragprog.c
 355  */
 356 extern void i915ValidateFragmentProgram(struct i915_context *i915);
 357 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
 358
 359 /*======================================================================
 360  * Inline conversion functions.  These are better-typed than the
 361  * macros used previously:
 362  */
 363 static INLINE struct i915_context *
 364 i915_context(GLcontext * ctx)
 365 {
 366    return (struct i915_context *) ctx;
 367 }
 368
 369
 370
 371 #define I915_CONTEXT(ctx)       i915_context(ctx)
 372
 373
 374
 375 #endif