Merge branch 'mesa_7_5_branch'
[mesa.git] / src / mesa / drivers / dri / i915 / i915_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef I915CONTEXT_INC
29 #define I915CONTEXT_INC
30
31 #include "intel_context.h"
32 #include "i915_reg.h"
33
34 #define I915_FALLBACK_TEXTURE 0x1000
35 #define I915_FALLBACK_COLORMASK 0x2000
36 #define I915_FALLBACK_STENCIL 0x4000
37 #define I915_FALLBACK_STIPPLE 0x8000
38 #define I915_FALLBACK_PROGRAM 0x10000
39 #define I915_FALLBACK_LOGICOP 0x20000
40 #define I915_FALLBACK_POLYGON_SMOOTH 0x40000
41 #define I915_FALLBACK_POINT_SMOOTH 0x80000
42
43 #define I915_UPLOAD_CTX 0x1
44 #define I915_UPLOAD_BUFFERS 0x2
45 #define I915_UPLOAD_STIPPLE 0x4
46 #define I915_UPLOAD_PROGRAM 0x8
47 #define I915_UPLOAD_CONSTANTS 0x10
48 #define I915_UPLOAD_FOG 0x20
49 #define I915_UPLOAD_INVARIENT 0x40
50 #define I915_UPLOAD_DEFAULTS 0x80
51 #define I915_UPLOAD_RASTER_RULES 0x100
52 #define I915_UPLOAD_TEX(i) (0x00010000<<(i))
53 #define I915_UPLOAD_TEX_ALL (0x00ff0000)
54 #define I915_UPLOAD_TEX_0_SHIFT 16
55
56
57 /* State structure offsets - these will probably disappear.
58 */
59 #define I915_DESTREG_CBUFADDR0 0
60 #define I915_DESTREG_CBUFADDR1 1
61 #define I915_DESTREG_DBUFADDR0 3
62 #define I915_DESTREG_DBUFADDR1 4
63 #define I915_DESTREG_DV0 6
64 #define I915_DESTREG_DV1 7
65 #define I915_DESTREG_SENABLE 8
66 #define I915_DESTREG_SR0 9
67 #define I915_DESTREG_SR1 10
68 #define I915_DESTREG_SR2 11
69 #define I915_DESTREG_DRAWRECT0 12
70 #define I915_DESTREG_DRAWRECT1 13
71 #define I915_DESTREG_DRAWRECT2 14
72 #define I915_DESTREG_DRAWRECT3 15
73 #define I915_DESTREG_DRAWRECT4 16
74 #define I915_DESTREG_DRAWRECT5 17
75 #define I915_DEST_SETUP_SIZE 18
76
77 #define I915_CTXREG_STATE4 0
78 #define I915_CTXREG_LI 1
79 #define I915_CTXREG_LIS2 2
80 #define I915_CTXREG_LIS4 3
81 #define I915_CTXREG_LIS5 4
82 #define I915_CTXREG_LIS6 5
83 #define I915_CTXREG_IAB 6
84 #define I915_CTXREG_BLENDCOLOR0 7
85 #define I915_CTXREG_BLENDCOLOR1 8
86 #define I915_CTXREG_BF_STENCIL_OPS 9
87 #define I915_CTXREG_BF_STENCIL_MASKS 10
88 #define I915_CTX_SETUP_SIZE 11
89
90 #define I915_FOGREG_COLOR 0
91 #define I915_FOGREG_MODE0 1
92 #define I915_FOGREG_MODE1 2
93 #define I915_FOGREG_MODE2 3
94 #define I915_FOGREG_MODE3 4
95 #define I915_FOG_SETUP_SIZE 5
96
97 #define I915_STPREG_ST0 0
98 #define I915_STPREG_ST1 1
99 #define I915_STP_SETUP_SIZE 2
100
101 #define I915_TEXREG_MS3 1
102 #define I915_TEXREG_MS4 2
103 #define I915_TEXREG_SS2 3
104 #define I915_TEXREG_SS3 4
105 #define I915_TEXREG_SS4 5
106 #define I915_TEX_SETUP_SIZE 6
107
108 #define I915_DEFREG_C0 0
109 #define I915_DEFREG_C1 1
110 #define I915_DEFREG_S0 2
111 #define I915_DEFREG_S1 3
112 #define I915_DEFREG_Z0 4
113 #define I915_DEFREG_Z1 5
114 #define I915_DEF_SETUP_SIZE 6
115
116 enum {
117 I915_RASTER_RULES,
118 I915_RASTER_RULES_SETUP_SIZE,
119 };
120
121 #define I915_MAX_CONSTANT 32
122 #define I915_CONSTANT_SIZE (2+(4*I915_MAX_CONSTANT))
123
124
125 #define I915_PROGRAM_SIZE 192
126
127 #define I915_MAX_INSN (I915_MAX_TEX_INSN+I915_MAX_ALU_INSN)
128
129 /* Hardware version of a parsed fragment program. "Derived" from the
130 * mesa fragment_program struct.
131 */
132 struct i915_fragment_program
133 {
134 struct gl_fragment_program FragProg;
135
136 GLboolean translated;
137 GLboolean params_uptodate;
138 GLboolean on_hardware;
139 GLboolean error; /* If program is malformed for any reason. */
140
141 /** Record of which phases R registers were last written in. */
142 GLuint register_phases[16];
143 GLuint indirections;
144 GLuint nr_tex_indirect;
145 GLuint nr_tex_insn;
146 GLuint nr_alu_insn;
147 GLuint nr_decl_insn;
148
149
150
151
152 /* TODO: split between the stored representation of a program and
153 * the state used to build that representation.
154 */
155 GLcontext *ctx;
156
157 GLuint declarations[I915_PROGRAM_SIZE];
158 GLuint program[I915_PROGRAM_SIZE];
159
160 GLfloat constant[I915_MAX_CONSTANT][4];
161 GLuint constant_flags[I915_MAX_CONSTANT];
162 GLuint nr_constants;
163
164 GLuint *csr; /* Cursor, points into program.
165 */
166
167 GLuint *decl; /* Cursor, points into declarations.
168 */
169
170 GLuint decl_s; /* flags for which s regs need to be decl'd */
171 GLuint decl_t; /* flags for which t regs need to be decl'd */
172
173 GLuint temp_flag; /* Tracks temporary regs which are in
174 * use.
175 */
176
177 GLuint utemp_flag; /* Tracks TYPE_U temporary regs which are in
178 * use.
179 */
180
181
182 /* Track which R registers are "live" for each instruction.
183 * A register is live between the time it's written to and the last time
184 * it's read. */
185 GLuint usedRegs[I915_MAX_INSN];
186
187 /* Helpers for i915_fragprog.c:
188 */
189 GLuint wpos_tex;
190 GLboolean depth_written;
191
192 struct
193 {
194 GLuint reg; /* Hardware constant idx */
195 const GLfloat *values; /* Pointer to tracked values */
196 } param[I915_MAX_CONSTANT];
197 GLuint nr_params;
198 };
199
200
201
202
203
204
205
206 #define I915_TEX_UNITS 8
207
208
209 struct i915_hw_state
210 {
211 GLuint Ctx[I915_CTX_SETUP_SIZE];
212 GLuint Buffer[I915_DEST_SETUP_SIZE];
213 GLuint Stipple[I915_STP_SETUP_SIZE];
214 GLuint Fog[I915_FOG_SETUP_SIZE];
215 GLuint Defaults[I915_DEF_SETUP_SIZE];
216 GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
217 GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
218 GLuint Constant[I915_CONSTANT_SIZE];
219 GLuint ConstantSize;
220 GLuint Program[I915_PROGRAM_SIZE];
221 GLuint ProgramSize;
222
223 /* Region pointers for relocation:
224 */
225 struct intel_region *draw_region;
226 struct intel_region *depth_region;
227 /* struct intel_region *tex_region[I915_TEX_UNITS]; */
228
229 /* Regions aren't actually that appropriate here as the memory may
230 * be from a PBO or FBO. Will have to do this for draw and depth for
231 * FBO's...
232 */
233 dri_bo *tex_buffer[I915_TEX_UNITS];
234 GLuint tex_offset[I915_TEX_UNITS];
235
236
237 GLuint active; /* I915_UPLOAD_* */
238 GLuint emitted; /* I915_UPLOAD_* */
239 };
240
241 #define I915_FOG_PIXEL 2
242 #define I915_FOG_VERTEX 1
243 #define I915_FOG_NONE 0
244
245 struct i915_context
246 {
247 struct intel_context intel;
248
249 GLuint last_ReallyEnabled;
250 GLuint vertex_fog;
251 GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
252
253
254 struct i915_fragment_program *current_program;
255
256 struct i915_hw_state meta, initial, state, *current;
257 };
258
259
260 #define I915_STATECHANGE(i915, flag) \
261 do { \
262 INTEL_FIREVERTICES( &(i915)->intel ); \
263 (i915)->state.emitted &= ~(flag); \
264 } while (0)
265
266 #define I915_ACTIVESTATE(i915, flag, mode) \
267 do { \
268 INTEL_FIREVERTICES( &(i915)->intel ); \
269 if (mode) \
270 (i915)->state.active |= (flag); \
271 else \
272 (i915)->state.active &= ~(flag); \
273 } while (0)
274
275
276 /*======================================================================
277 * i915_vtbl.c
278 */
279 extern void i915InitVtbl(struct i915_context *i915);
280
281 extern void
282 i915_state_draw_region(struct intel_context *intel,
283 struct i915_hw_state *state,
284 struct intel_region *color_region,
285 struct intel_region *depth_region);
286
287
288
289 #define SZ_TO_HW(sz) ((sz-2)&0x3)
290 #define EMIT_SZ(sz) (EMIT_1F + (sz) - 1)
291 #define EMIT_ATTR( ATTR, STYLE, S4, SZ ) \
292 do { \
293 intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR); \
294 intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE); \
295 s4 |= S4; \
296 intel->vertex_attr_count++; \
297 offset += (SZ); \
298 } while (0)
299
300 #define EMIT_PAD( N ) \
301 do { \
302 intel->vertex_attrs[intel->vertex_attr_count].attrib = 0; \
303 intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD; \
304 intel->vertex_attrs[intel->vertex_attr_count].offset = (N); \
305 intel->vertex_attr_count++; \
306 offset += (N); \
307 } while (0)
308
309
310
311 /*======================================================================
312 * i915_context.c
313 */
314 extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
315 __DRIcontextPrivate * driContextPriv,
316 void *sharedContextPrivate);
317
318
319 /*======================================================================
320 * i915_debug.c
321 */
322 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
323 extern void i915_print_ureg(const char *msg, GLuint ureg);
324
325
326 /*======================================================================
327 * i915_state.c
328 */
329 extern void i915InitStateFunctions(struct dd_function_table *functions);
330 extern void i915InitState(struct i915_context *i915);
331 extern void i915_update_fog(GLcontext * ctx);
332 extern void i915_update_stencil(GLcontext * ctx);
333 extern void i915_update_provoking_vertex(GLcontext *ctx);
334
335
336 /*======================================================================
337 * i915_tex.c
338 */
339 extern void i915UpdateTextureState(struct intel_context *intel);
340 extern void i915InitTextureFuncs(struct dd_function_table *functions);
341
342 /*======================================================================
343 * i915_metaops.c
344 */
345 void i915InitMetaFuncs(struct i915_context *i915);
346
347
348 /*======================================================================
349 * i915_fragprog.c
350 */
351 extern void i915ValidateFragmentProgram(struct i915_context *i915);
352 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
353
354 /*======================================================================
355 * Inline conversion functions. These are better-typed than the
356 * macros used previously:
357 */
358 static INLINE struct i915_context *
359 i915_context(GLcontext * ctx)
360 {
361 return (struct i915_context *) ctx;
362 }
363
364
365
366 #define I915_CONTEXT(ctx) i915_context(ctx)
367
368
369
370 #endif