src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "drivers/common/driverfuncs.h"
  40
  41 #include "intel_fbo.h"
  42 #include "intel_screen.h"
  43 #include "intel_batchbuffer.h"
  44 #include "intel_buffers.h"
  45
  46 #include "i915_context.h"
  47 #include "i915_reg.h"
  48
  49 #define FILE_DEBUG_FLAG DEBUG_STATE
  50
  51 void
  52 i915_update_stencil(struct gl_context * ctx)
  53 {
  54    struct i915_context *i915 = I915_CONTEXT(ctx);
  55    GLuint front_ref, front_writemask, front_mask;
  56    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  57    GLuint back_ref, back_writemask, back_mask;
  58    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  59
  60    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  61
  62    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  63     * appropriately.
  64     */
  65    /* _NEW_POLYGON | _NEW_STENCIL */
  66    if (ctx->Polygon.FrontFace == GL_CW) {
  67       front_ref = ctx->Stencil.Ref[0];
  68       front_mask = ctx->Stencil.ValueMask[0];
  69       front_writemask = ctx->Stencil.WriteMask[0];
  70       front_func = ctx->Stencil.Function[0];
  71       front_fail = ctx->Stencil.FailFunc[0];
  72       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  73       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  74       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  75       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  76       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  77       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  78       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  79       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  80       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  81    } else {
  82       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  83       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  84       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  85       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  86       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  87       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  88       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  89       back_ref = ctx->Stencil.Ref[0];
  90       back_mask = ctx->Stencil.ValueMask[0];
  91       back_writemask = ctx->Stencil.WriteMask[0];
  92       back_func = ctx->Stencil.Function[0];
  93       back_fail = ctx->Stencil.FailFunc[0];
  94       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  95       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  96    }
  97
  98    /* Set front state. */
  99    i915->state.Ctx[I915_CTXREG_STATE4] &= ~(MODE4_ENABLE_STENCIL_TEST_MASK |
 100                                             MODE4_ENABLE_STENCIL_WRITE_MASK);
 101    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
 102                                            ENABLE_STENCIL_WRITE_MASK |
 103                                            STENCIL_TEST_MASK(front_mask) |
 104                                            STENCIL_WRITE_MASK(front_writemask));
 105
 106    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
 107                                           S5_STENCIL_TEST_FUNC_MASK |
 108                                           S5_STENCIL_FAIL_MASK |
 109                                           S5_STENCIL_PASS_Z_FAIL_MASK |
 110                                           S5_STENCIL_PASS_Z_PASS_MASK);
 111
 112    i915->state.Ctx[I915_CTXREG_LIS5] |=
 113       (front_ref << S5_STENCIL_REF_SHIFT) |
 114       (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 115       (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 116       (intel_translate_stencil_op(front_pass_z_fail) <<
 117        S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 118       (intel_translate_stencil_op(front_pass_z_pass) <<
 119        S5_STENCIL_PASS_Z_PASS_SHIFT);
 120
 121    /* Set back state if different from front. */
 122    if (ctx->Stencil._TestTwoSide) {
 123       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] &=
 124          ~(BFO_STENCIL_REF_MASK |
 125            BFO_STENCIL_TEST_MASK |
 126            BFO_STENCIL_FAIL_MASK |
 127            BFO_STENCIL_PASS_Z_FAIL_MASK |
 128            BFO_STENCIL_PASS_Z_PASS_MASK);
 129       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] |= BFO_STENCIL_TWO_SIDE |
 130          (back_ref << BFO_STENCIL_REF_SHIFT) |
 131          (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 132          (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 133          (intel_translate_stencil_op(back_pass_z_fail) <<
 134           BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 135          (intel_translate_stencil_op(back_pass_z_pass) <<
 136           BFO_STENCIL_PASS_Z_PASS_SHIFT);
 137
 138       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] &=
 139          ~(BFM_STENCIL_TEST_MASK_MASK |
 140            BFM_STENCIL_WRITE_MASK_MASK);
 141       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] |=
 142          BFM_STENCIL_TEST_MASK(back_mask) |
 143          BFM_STENCIL_WRITE_MASK(back_writemask);
 144    } else {
 145       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] &= ~BFO_STENCIL_TWO_SIDE;
 146    }
 147 }
 148
 149 static void
 150 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 151                         GLuint mask)
 152 {
 153 }
 154
 155 static void
 156 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 157 {
 158 }
 159
 160 static void
 161 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 162                       GLenum zpass)
 163 {
 164 }
 165
 166 static void
 167 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 168 {
 169    struct i915_context *i915 = I915_CONTEXT(ctx);
 170    int test = intel_translate_compare_func(func);
 171    GLubyte refByte;
 172
 173    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 174
 175    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 176    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
 177                                           S6_ALPHA_REF_MASK);
 178    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 179                                          (((GLuint) refByte) <<
 180                                           S6_ALPHA_REF_SHIFT));
 181 }
 182
 183 /* This function makes sure that the proper enables are
 184  * set for LogicOp, Independant Alpha Blend, and Blending.
 185  * It needs to be called from numerous places where we
 186  * could change the LogicOp or Independant Alpha Blend without subsequent
 187  * calls to glEnable.
 188  */
 189 static void
 190 i915EvalLogicOpBlendState(struct gl_context * ctx)
 191 {
 192    struct i915_context *i915 = I915_CONTEXT(ctx);
 193
 194    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 195
 196    if (RGBA_LOGICOP_ENABLED(ctx)) {
 197       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
 198       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 199    }
 200    else {
 201       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 202
 203       if (ctx->Color.BlendEnabled) {
 204          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
 205       }
 206       else {
 207          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 208       }
 209    }
 210 }
 211
 212 static void
 213 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 214 {
 215    struct i915_context *i915 = I915_CONTEXT(ctx);
 216    GLubyte r, g, b, a;
 217
 218    DBG("%s\n", __FUNCTION__);
 219
 220    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 221    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 222    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 223    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 224
 225    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 226    i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
 227       (a << 24) | (r << 16) | (g << 8) | b;
 228 }
 229
 230
 231 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 232 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 233 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 234 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 235
 236
 237
 238 static GLuint
 239 translate_blend_equation(GLenum mode)
 240 {
 241    switch (mode) {
 242    case GL_FUNC_ADD:
 243       return BLENDFUNC_ADD;
 244    case GL_MIN:
 245       return BLENDFUNC_MIN;
 246    case GL_MAX:
 247       return BLENDFUNC_MAX;
 248    case GL_FUNC_SUBTRACT:
 249       return BLENDFUNC_SUBTRACT;
 250    case GL_FUNC_REVERSE_SUBTRACT:
 251       return BLENDFUNC_REVERSE_SUBTRACT;
 252    default:
 253       return 0;
 254    }
 255 }
 256
 257 static void
 258 i915UpdateBlendState(struct gl_context * ctx)
 259 {
 260    struct i915_context *i915 = I915_CONTEXT(ctx);
 261    GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
 262                  ~(IAB_SRC_FACTOR_MASK |
 263                    IAB_DST_FACTOR_MASK |
 264                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 265
 266    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 267                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 268                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 269
 270    GLuint eqRGB = ctx->Color.BlendEquationRGB;
 271    GLuint eqA = ctx->Color.BlendEquationA;
 272    GLuint srcRGB = ctx->Color.BlendSrcRGB;
 273    GLuint dstRGB = ctx->Color.BlendDstRGB;
 274    GLuint srcA = ctx->Color.BlendSrcA;
 275    GLuint dstA = ctx->Color.BlendDstA;
 276
 277    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 278       srcRGB = dstRGB = GL_ONE;
 279    }
 280
 281    if (eqA == GL_MIN || eqA == GL_MAX) {
 282       srcA = dstA = GL_ONE;
 283    }
 284
 285    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 286    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 287    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 288
 289    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 290    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 291    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 292
 293    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 294       iab |= IAB_ENABLE;
 295
 296    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
 297        lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 298       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 299       i915->state.Ctx[I915_CTXREG_IAB] = iab;
 300       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 301    }
 302
 303    /* This will catch a logicop blend equation */
 304    i915EvalLogicOpBlendState(ctx);
 305 }
 306
 307
 308 static void
 309 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 310                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 311 {
 312    i915UpdateBlendState(ctx);
 313 }
 314
 315
 316 static void
 317 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 318 {
 319    i915UpdateBlendState(ctx);
 320 }
 321
 322
 323 static void
 324 i915DepthFunc(struct gl_context * ctx, GLenum func)
 325 {
 326    struct i915_context *i915 = I915_CONTEXT(ctx);
 327    int test = intel_translate_compare_func(func);
 328
 329    DBG("%s\n", __FUNCTION__);
 330
 331    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 332    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
 333    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 334 }
 335
 336 static void
 337 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 338 {
 339    struct i915_context *i915 = I915_CONTEXT(ctx);
 340
 341    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 342
 343    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 344
 345    if (flag && ctx->Depth.Test)
 346       i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
 347    else
 348       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
 349 }
 350
 351
 352
 353 /**
 354  * Update the viewport transformation matrix.  Depends on:
 355  *  - viewport pos/size
 356  *  - depthrange
 357  *  - window pos/size or FBO size
 358  */
 359 void
 360 intelCalcViewport(struct gl_context * ctx)
 361 {
 362    struct intel_context *intel = intel_context(ctx);
 363    const GLfloat *v = ctx->Viewport._WindowMap.m;
 364    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 365    GLfloat *m = intel->ViewportMatrix.m;
 366    GLfloat yScale, yBias;
 367
 368    if (ctx->DrawBuffer->Name) {
 369       /* User created FBO */
 370       /* y=0=bottom */
 371       yScale = 1.0;
 372       yBias = 0.0;
 373    }
 374    else {
 375       /* window buffer, y=0=top */
 376       yScale = -1.0;
 377       yBias = ctx->DrawBuffer->Height;
 378    }
 379
 380    m[MAT_SX] = v[MAT_SX];
 381    m[MAT_TX] = v[MAT_TX];
 382
 383    m[MAT_SY] = v[MAT_SY] * yScale;
 384    m[MAT_TY] = v[MAT_TY] * yScale + yBias;
 385
 386    m[MAT_SZ] = v[MAT_SZ] * depthScale;
 387    m[MAT_TZ] = v[MAT_TZ] * depthScale;
 388 }
 389
 390
 391 /** Called from ctx->Driver.Viewport() */
 392 static void
 393 i915Viewport(struct gl_context * ctx,
 394               GLint x, GLint y, GLsizei width, GLsizei height)
 395 {
 396    intelCalcViewport(ctx);
 397 }
 398
 399
 400 /** Called from ctx->Driver.DepthRange() */
 401 static void
 402 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
 403 {
 404    intelCalcViewport(ctx);
 405 }
 406
 407
 408 /* =============================================================
 409  * Polygon stipple
 410  *
 411  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 412  * Fortunately stipple is usually a repeating pattern.
 413  */
 414 static void
 415 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 416 {
 417    struct i915_context *i915 = I915_CONTEXT(ctx);
 418    const GLubyte *m;
 419    GLubyte p[4];
 420    int i, j, k;
 421    int active = (ctx->Polygon.StippleFlag &&
 422                  i915->intel.reduced_primitive == GL_TRIANGLES);
 423    GLuint newMask;
 424
 425    if (active) {
 426       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 427       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 428    }
 429
 430    /* Use the already unpacked stipple data from the context rather than the
 431     * uninterpreted mask passed in.
 432     */
 433    mask = (const GLubyte *)ctx->PolygonStipple;
 434    m = mask;
 435
 436    p[0] = mask[12] & 0xf;
 437    p[0] |= p[0] << 4;
 438    p[1] = mask[8] & 0xf;
 439    p[1] |= p[1] << 4;
 440    p[2] = mask[4] & 0xf;
 441    p[2] |= p[2] << 4;
 442    p[3] = mask[0] & 0xf;
 443    p[3] |= p[3] << 4;
 444
 445    for (k = 0; k < 8; k++)
 446       for (j = 3; j >= 0; j--)
 447          for (i = 0; i < 4; i++, m++)
 448             if (*m != p[j]) {
 449                i915->intel.hw_stipple = 0;
 450                return;
 451             }
 452
 453    newMask = (((p[0] & 0xf) << 0) |
 454               ((p[1] & 0xf) << 4) |
 455               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 456
 457
 458    if (newMask == 0xffff || newMask == 0x0) {
 459       /* this is needed to make conform pass */
 460       i915->intel.hw_stipple = 0;
 461       return;
 462    }
 463
 464    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 465    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 466    i915->intel.hw_stipple = 1;
 467
 468    if (active)
 469       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 470 }
 471
 472
 473 /* =============================================================
 474  * Hardware clipping
 475  */
 476 static void
 477 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 478 {
 479    struct i915_context *i915 = I915_CONTEXT(ctx);
 480    int x1, y1, x2, y2;
 481
 482    if (!ctx->DrawBuffer)
 483       return;
 484
 485    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 486
 487    if (ctx->DrawBuffer->Name == 0) {
 488       x1 = x;
 489       y1 = ctx->DrawBuffer->Height - (y + h);
 490       x2 = x + w - 1;
 491       y2 = y1 + h - 1;
 492       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 493    }
 494    else {
 495       /* FBO - not inverted
 496        */
 497       x1 = x;
 498       y1 = y;
 499       x2 = x + w - 1;
 500       y2 = y + h - 1;
 501       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 502    }
 503
 504    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 505    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 506    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 507    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 508
 509    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 510
 511    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 512    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 513    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 514 }
 515
 516 static void
 517 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 518 {
 519    struct i915_context *i915 = I915_CONTEXT(ctx);
 520    int tmp = intel_translate_logic_op(opcode);
 521
 522    DBG("%s\n", __FUNCTION__);
 523
 524    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 525    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 526    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 527 }
 528
 529
 530
 531 static void
 532 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 533 {
 534    struct i915_context *i915 = I915_CONTEXT(ctx);
 535    GLuint mode;
 536
 537    DBG("%s %d\n", __FUNCTION__,
 538        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 539
 540    if (!ctx->Polygon.CullFlag) {
 541       mode = S4_CULLMODE_NONE;
 542    }
 543    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 544       mode = S4_CULLMODE_CW;
 545
 546       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 547          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 548       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 549          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 550       if (ctx->Polygon.FrontFace != GL_CCW)
 551          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 552    }
 553    else {
 554       mode = S4_CULLMODE_BOTH;
 555    }
 556
 557    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 558    i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
 559    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 560 }
 561
 562 static void
 563 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 564 {
 565    struct i915_context *i915 = I915_CONTEXT(ctx);
 566    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 567    int width;
 568
 569    DBG("%s\n", __FUNCTION__);
 570
 571    width = (int) (widthf * 2);
 572    width = CLAMP(width, 1, 0xf);
 573    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 574
 575    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 576       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 577       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 578    }
 579 }
 580
 581 static void
 582 i915PointSize(struct gl_context * ctx, GLfloat size)
 583 {
 584    struct i915_context *i915 = I915_CONTEXT(ctx);
 585    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 586    GLint point_size = (int) round(size);
 587
 588    DBG("%s\n", __FUNCTION__);
 589
 590    point_size = CLAMP(point_size, 1, 255);
 591    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 592
 593    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 594       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 595       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 596    }
 597 }
 598
 599
 600 static void
 601 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 602 {
 603    struct i915_context *i915 = I915_CONTEXT(ctx);
 604
 605    switch (pname) {
 606    case GL_POINT_SPRITE_COORD_ORIGIN:
 607       /* This could be supported, but it would require modifying the fragment
 608        * program to invert the y component of the texture coordinate by
 609        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 610        */
 611       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 612                (params[0] != GL_UPPER_LEFT));
 613       break;
 614    }
 615 }
 616
 617
 618 /* =============================================================
 619  * Color masks
 620  */
 621
 622 static void
 623 i915ColorMask(struct gl_context * ctx,
 624               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 625 {
 626    struct i915_context *i915 = I915_CONTEXT(ctx);
 627    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 628
 629    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 630        a);
 631
 632    if (!r)
 633       tmp |= S5_WRITEDISABLE_RED;
 634    if (!g)
 635       tmp |= S5_WRITEDISABLE_GREEN;
 636    if (!b)
 637       tmp |= S5_WRITEDISABLE_BLUE;
 638    if (!a)
 639       tmp |= S5_WRITEDISABLE_ALPHA;
 640
 641    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 642       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 643       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 644    }
 645 }
 646
 647 static void
 648 update_specular(struct gl_context * ctx)
 649 {
 650    /* A hack to trigger the rebuild of the fragment program.
 651     */
 652    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 653 }
 654
 655 static void
 656 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 657 {
 658    DBG("%s\n", __FUNCTION__);
 659
 660    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 661       update_specular(ctx);
 662    }
 663 }
 664
 665 static void
 666 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 667 {
 668    struct i915_context *i915 = I915_CONTEXT(ctx);
 669    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 670
 671    if (mode == GL_SMOOTH) {
 672       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 673                                              S4_FLATSHADE_COLOR |
 674                                              S4_FLATSHADE_SPECULAR);
 675    }
 676    else {
 677       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 678                                             S4_FLATSHADE_COLOR |
 679                                             S4_FLATSHADE_SPECULAR);
 680    }
 681 }
 682
 683 /* =============================================================
 684  * Fog
 685  */
 686 void
 687 i915_update_fog(struct gl_context * ctx)
 688 {
 689    struct i915_context *i915 = I915_CONTEXT(ctx);
 690    GLenum mode;
 691    GLboolean enabled;
 692    GLboolean try_pixel_fog;
 693
 694    if (ctx->FragmentProgram._Current) {
 695       /* Pull in static fog state from program */
 696       mode = ctx->FragmentProgram._Current->FogOption;
 697       enabled = (mode != GL_NONE);
 698       try_pixel_fog = 0;
 699    }
 700    else {
 701       enabled = ctx->Fog.Enabled;
 702       mode = ctx->Fog.Mode;
 703 #if 0
 704       /* XXX - DISABLED -- Need ortho fallback */
 705       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
 706                        && ctx->Hint.Fog == GL_NICEST);
 707 #else
 708       try_pixel_fog = 0;
 709 #endif
 710    }
 711
 712    if (!enabled) {
 713       i915->vertex_fog = I915_FOG_NONE;
 714    }
 715    else if (try_pixel_fog) {
 716       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 717       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 718       i915->vertex_fog = I915_FOG_PIXEL;
 719
 720       switch (mode) {
 721       case GL_LINEAR:
 722          if (ctx->Fog.End <= ctx->Fog.Start) {
 723             /* XXX - this won't work with fragment programs.  Need to
 724              * either fallback or append fog instructions to end of
 725              * program in the case of linear fog.
 726              */
 727             printf("vertex fog!\n");
 728             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 729             i915->vertex_fog = I915_FOG_VERTEX;
 730          }
 731          else {
 732             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 733             GLfloat c1 = ctx->Fog.End * c2;
 734
 735             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 736             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 737             i915->state.Fog[I915_FOGREG_MODE1] |=
 738                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 739
 740             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 741                i915->state.Fog[I915_FOGREG_MODE2]
 742                   = (GLuint) (c2 * FMC2_C2_ONE);
 743             }
 744             else {
 745                fi_type fi;
 746                fi.f = c2;
 747                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 748             }
 749          }
 750          break;
 751       case GL_EXP:
 752          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 753          break;
 754       case GL_EXP2:
 755          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 756          break;
 757       default:
 758          break;
 759       }
 760    }
 761    else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 762       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 763       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 764       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 765       i915->vertex_fog = I915_FOG_VERTEX;
 766    }
 767
 768    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 769    I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 770    if (enabled)
 771       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
 772    else
 773       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
 774
 775    /* Always enable pixel fog.  Vertex fog using fog coord will conflict
 776     * with fog code appended onto fragment program.
 777     */
 778     _tnl_allow_vertex_fog( ctx, 0 );
 779     _tnl_allow_pixel_fog( ctx, 1 );
 780 }
 781
 782 static void
 783 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 784 {
 785    struct i915_context *i915 = I915_CONTEXT(ctx);
 786
 787    switch (pname) {
 788    case GL_FOG_COORDINATE_SOURCE_EXT:
 789    case GL_FOG_MODE:
 790    case GL_FOG_START:
 791    case GL_FOG_END:
 792       break;
 793
 794    case GL_FOG_DENSITY:
 795       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 796
 797       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 798          i915->state.Fog[I915_FOGREG_MODE3] =
 799             (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
 800       }
 801       else {
 802          fi_type fi;
 803          fi.f = ctx->Fog.Density;
 804          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 805       }
 806       break;
 807
 808    case GL_FOG_COLOR:
 809       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 810       i915->state.Fog[I915_FOGREG_COLOR] =
 811          (_3DSTATE_FOG_COLOR_CMD |
 812           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 813           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 814           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 815       break;
 816
 817    default:
 818       break;
 819    }
 820 }
 821
 822 static void
 823 i915Hint(struct gl_context * ctx, GLenum target, GLenum state)
 824 {
 825    switch (target) {
 826    case GL_FOG_HINT:
 827       break;
 828    default:
 829       break;
 830    }
 831 }
 832
 833 /* =============================================================
 834  */
 835
 836 static void
 837 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 838 {
 839    struct i915_context *i915 = I915_CONTEXT(ctx);
 840
 841    switch (cap) {
 842    case GL_TEXTURE_2D:
 843       break;
 844
 845    case GL_LIGHTING:
 846    case GL_COLOR_SUM:
 847       update_specular(ctx);
 848       break;
 849
 850    case GL_ALPHA_TEST:
 851       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 852       if (state)
 853          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
 854       else
 855          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
 856       break;
 857
 858    case GL_BLEND:
 859       i915EvalLogicOpBlendState(ctx);
 860       break;
 861
 862    case GL_COLOR_LOGIC_OP:
 863       i915EvalLogicOpBlendState(ctx);
 864
 865       /* Logicop doesn't seem to work at 16bpp:
 866        */
 867       if (ctx->Visual.rgbBits == 16)
 868          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 869       break;
 870
 871    case GL_FRAGMENT_PROGRAM_ARB:
 872       break;
 873
 874    case GL_DITHER:
 875       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 876       if (state)
 877          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 878       else
 879          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
 880       break;
 881
 882    case GL_DEPTH_TEST:
 883       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 884       if (state)
 885          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
 886       else
 887          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 888
 889       i915DepthMask(ctx, ctx->Depth.Mask);
 890       break;
 891
 892    case GL_SCISSOR_TEST:
 893       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 894       if (state)
 895          i915->state.Buffer[I915_DESTREG_SENABLE] =
 896             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 897       else
 898          i915->state.Buffer[I915_DESTREG_SENABLE] =
 899             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 900       break;
 901
 902    case GL_LINE_SMOOTH:
 903       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 904       if (state)
 905          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
 906       else
 907          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
 908       break;
 909
 910    case GL_FOG:
 911       break;
 912
 913    case GL_CULL_FACE:
 914       i915CullFaceFrontFace(ctx, 0);
 915       break;
 916
 917    case GL_STENCIL_TEST:
 918       {
 919          GLboolean hw_stencil = GL_FALSE;
 920          if (ctx->DrawBuffer) {
 921             struct intel_renderbuffer *irbStencil
 922                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 923             hw_stencil = (irbStencil && irbStencil->region);
 924          }
 925          if (hw_stencil) {
 926             I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 927             if (state)
 928                i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
 929                                                      S5_STENCIL_WRITE_ENABLE);
 930             else
 931                i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
 932                                                       S5_STENCIL_WRITE_ENABLE);
 933          }
 934          else {
 935             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 936          }
 937       }
 938       break;
 939
 940    case GL_POLYGON_STIPPLE:
 941       /* The stipple command worked on my 855GM box, but not my 845G.
 942        * I'll do more testing later to find out exactly which hardware
 943        * supports it.  Disabled for now.
 944        */
 945       if (i915->intel.hw_stipple &&
 946           i915->intel.reduced_primitive == GL_TRIANGLES) {
 947          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 948          if (state)
 949             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 950          else
 951             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 952       }
 953       break;
 954
 955    case GL_POLYGON_SMOOTH:
 956       break;
 957
 958    case GL_POINT_SPRITE:
 959       /* This state change is handled in i915_reduced_primitive_state because
 960        * the hardware bit should only be set when rendering points.
 961        */
 962       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 963       if (state)
 964          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_SPRITE_POINT_ENABLE;
 965       else
 966          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_SPRITE_POINT_ENABLE;
 967       break;
 968
 969    case GL_POINT_SMOOTH:
 970       break;
 971
 972    default:
 973       ;
 974    }
 975 }
 976
 977
 978 static void
 979 i915_init_packets(struct i915_context *i915)
 980 {
 981    /* Zero all state */
 982    memset(&i915->state, 0, sizeof(i915->state));
 983
 984
 985    {
 986       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 987       /* Probably don't want to upload all this stuff every time one
 988        * piece changes.
 989        */
 990       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 991                                          I1_LOAD_S(2) |
 992                                          I1_LOAD_S(4) |
 993                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 994       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 995       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 996       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 997
 998       if (i915->intel.ctx.Visual.rgbBits == 16)
 999          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
1000
1001
1002       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
1003                                            (2 << S6_TRISTRIP_PV_SHIFT));
1004
1005       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1006                                              ENABLE_LOGIC_OP_FUNC |
1007                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
1008                                              ENABLE_STENCIL_TEST_MASK |
1009                                              STENCIL_TEST_MASK(0xff) |
1010                                              ENABLE_STENCIL_WRITE_MASK |
1011                                              STENCIL_WRITE_MASK(0xff));
1012
1013       i915->state.Ctx[I915_CTXREG_IAB] =
1014          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
1015           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
1016
1017       i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
1018          _3DSTATE_CONST_BLEND_COLOR_CMD;
1019       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
1020
1021       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
1022          _3DSTATE_BACKFACE_STENCIL_MASKS |
1023          BFM_ENABLE_STENCIL_TEST_MASK |
1024          BFM_ENABLE_STENCIL_WRITE_MASK |
1025          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
1026          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
1027       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
1028          _3DSTATE_BACKFACE_STENCIL_OPS |
1029          BFO_ENABLE_STENCIL_REF |
1030          BFO_ENABLE_STENCIL_FUNCS |
1031          BFO_ENABLE_STENCIL_TWO_SIDE;
1032    }
1033
1034    {
1035       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
1036       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
1037    }
1038
1039
1040    {
1041       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
1042       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
1043       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
1044                                             FMC1_FOGFUNC_VERTEX |
1045                                             FMC1_FOGINDEX_MODIFY_ENABLE |
1046                                             FMC1_FOGINDEX_W |
1047                                             FMC1_C1_C2_MODIFY_ENABLE |
1048                                             FMC1_DENSITY_MODIFY_ENABLE);
1049       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
1050    }
1051
1052    {
1053       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1054
1055       /* scissor */
1056       i915->state.Buffer[I915_DESTREG_SENABLE] =
1057          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
1058       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1059       i915->state.Buffer[I915_DESTREG_SR1] = 0;
1060       i915->state.Buffer[I915_DESTREG_SR2] = 0;
1061    }
1062
1063    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
1064       ENABLE_POINT_RASTER_RULE |
1065       OGL_POINT_RASTER_RULE |
1066       ENABLE_LINE_STRIP_PROVOKE_VRTX |
1067       ENABLE_TRI_FAN_PROVOKE_VRTX |
1068       LINE_STRIP_PROVOKE_VRTX(1) |
1069       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
1070
1071 #if 0
1072    {
1073       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
1074       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
1075       i915->state.Default[I915_DEFREG_C1] = 0;
1076       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
1077       i915->state.Default[I915_DEFREG_S1] = 0;
1078       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1079       i915->state.Default[I915_DEFREG_Z1] = 0;
1080    }
1081 #endif
1082
1083
1084    /* These will be emitted every at the head of every buffer, unless
1085     * we get hardware contexts working.
1086     */
1087    i915->state.active = (I915_UPLOAD_PROGRAM |
1088                          I915_UPLOAD_STIPPLE |
1089                          I915_UPLOAD_CTX |
1090                          I915_UPLOAD_BUFFERS |
1091                          I915_UPLOAD_INVARIENT |
1092                          I915_UPLOAD_RASTER_RULES);
1093 }
1094
1095 void
1096 i915_update_provoking_vertex(struct gl_context * ctx)
1097 {
1098    struct i915_context *i915 = I915_CONTEXT(ctx);
1099
1100    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1101    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1102
1103    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1104    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1105                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1106
1107    /* _NEW_LIGHT */
1108    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1109       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1110                                                      TRI_FAN_PROVOKE_VRTX(2));
1111       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1112    } else {
1113       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1114                                                      TRI_FAN_PROVOKE_VRTX(1));
1115       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1116     }
1117 }
1118
1119 void
1120 i915InitStateFunctions(struct dd_function_table *functions)
1121 {
1122    functions->AlphaFunc = i915AlphaFunc;
1123    functions->BlendColor = i915BlendColor;
1124    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1125    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1126    functions->ColorMask = i915ColorMask;
1127    functions->CullFace = i915CullFaceFrontFace;
1128    functions->DepthFunc = i915DepthFunc;
1129    functions->DepthMask = i915DepthMask;
1130    functions->Enable = i915Enable;
1131    functions->Fogfv = i915Fogfv;
1132    functions->FrontFace = i915CullFaceFrontFace;
1133    functions->Hint = i915Hint;
1134    functions->LightModelfv = i915LightModelfv;
1135    functions->LineWidth = i915LineWidth;
1136    functions->LogicOpcode = i915LogicOp;
1137    functions->PointSize = i915PointSize;
1138    functions->PointParameterfv = i915PointParameterfv;
1139    functions->PolygonStipple = i915PolygonStipple;
1140    functions->Scissor = i915Scissor;
1141    functions->ShadeModel = i915ShadeModel;
1142    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1143    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1144    functions->StencilOpSeparate = i915StencilOpSeparate;
1145    functions->DepthRange = i915DepthRange;
1146    functions->Viewport = i915Viewport;
1147 }
1148
1149
1150 void
1151 i915InitState(struct i915_context *i915)
1152 {
1153    struct gl_context *ctx = &i915->intel.ctx;
1154
1155    i915_init_packets(i915);
1156
1157    _mesa_init_driver_state(ctx);
1158 }