2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
37 #include "main/macros.h"
38 #include "main/stencil.h"
39 #include "intel_batchbuffer.h"
42 brw_upload_cc_vp(struct brw_context
*brw
)
44 struct gl_context
*ctx
= &brw
->ctx
;
45 struct brw_cc_viewport
*ccv
;
47 ccv
= brw_state_batch(brw
, AUB_TRACE_CC_VP_STATE
,
48 sizeof(*ccv
) * ctx
->Const
.MaxViewports
, 32,
52 for (unsigned i
= 0; i
< ctx
->Const
.MaxViewports
; i
++) {
53 if (ctx
->Transform
.DepthClamp
) {
55 ccv
[i
].min_depth
= MIN2(ctx
->ViewportArray
[i
].Near
,
56 ctx
->ViewportArray
[i
].Far
);
57 ccv
[i
].max_depth
= MAX2(ctx
->ViewportArray
[i
].Near
,
58 ctx
->ViewportArray
[i
].Far
);
60 ccv
[i
].min_depth
= 0.0;
61 ccv
[i
].max_depth
= 1.0;
65 SET_DIRTY_BIT(cache
, CACHE_NEW_CC_VP
);
68 const struct brw_tracked_state brw_cc_vp
= {
70 .mesa
= _NEW_VIEWPORT
| _NEW_TRANSFORM
,
74 .emit
= brw_upload_cc_vp
78 * Modify blend function to force destination alpha to 1.0
80 * If \c function specifies a blend function that uses destination alpha,
81 * replace it with a function that hard-wires destination alpha to 1.0. This
82 * is used when rendering to xRGB targets.
85 brw_fix_xRGB_alpha(GLenum function
)
91 case GL_ONE_MINUS_DST_ALPHA
:
92 case GL_SRC_ALPHA_SATURATE
:
100 * Creates a CC unit packet from the current blend state.
102 static void upload_cc_unit(struct brw_context
*brw
)
104 struct gl_context
*ctx
= &brw
->ctx
;
105 struct brw_cc_unit_state
*cc
;
107 cc
= brw_state_batch(brw
, AUB_TRACE_CC_STATE
,
108 sizeof(*cc
), 64, &brw
->cc
.state_offset
);
109 memset(cc
, 0, sizeof(*cc
));
111 /* _NEW_STENCIL | _NEW_BUFFERS */
112 if (ctx
->Stencil
._Enabled
) {
113 const unsigned back
= ctx
->Stencil
._BackFace
;
115 cc
->cc0
.stencil_enable
= 1;
116 cc
->cc0
.stencil_func
=
117 intel_translate_compare_func(ctx
->Stencil
.Function
[0]);
118 cc
->cc0
.stencil_fail_op
=
119 intel_translate_stencil_op(ctx
->Stencil
.FailFunc
[0]);
120 cc
->cc0
.stencil_pass_depth_fail_op
=
121 intel_translate_stencil_op(ctx
->Stencil
.ZFailFunc
[0]);
122 cc
->cc0
.stencil_pass_depth_pass_op
=
123 intel_translate_stencil_op(ctx
->Stencil
.ZPassFunc
[0]);
124 cc
->cc1
.stencil_ref
= _mesa_get_stencil_ref(ctx
, 0);
125 cc
->cc1
.stencil_write_mask
= ctx
->Stencil
.WriteMask
[0];
126 cc
->cc1
.stencil_test_mask
= ctx
->Stencil
.ValueMask
[0];
128 if (ctx
->Stencil
._TestTwoSide
) {
129 cc
->cc0
.bf_stencil_enable
= 1;
130 cc
->cc0
.bf_stencil_func
=
131 intel_translate_compare_func(ctx
->Stencil
.Function
[back
]);
132 cc
->cc0
.bf_stencil_fail_op
=
133 intel_translate_stencil_op(ctx
->Stencil
.FailFunc
[back
]);
134 cc
->cc0
.bf_stencil_pass_depth_fail_op
=
135 intel_translate_stencil_op(ctx
->Stencil
.ZFailFunc
[back
]);
136 cc
->cc0
.bf_stencil_pass_depth_pass_op
=
137 intel_translate_stencil_op(ctx
->Stencil
.ZPassFunc
[back
]);
138 cc
->cc1
.bf_stencil_ref
= _mesa_get_stencil_ref(ctx
, back
);
139 cc
->cc2
.bf_stencil_write_mask
= ctx
->Stencil
.WriteMask
[back
];
140 cc
->cc2
.bf_stencil_test_mask
= ctx
->Stencil
.ValueMask
[back
];
143 /* Not really sure about this:
145 if (ctx
->Stencil
.WriteMask
[0] ||
146 (ctx
->Stencil
._TestTwoSide
&& ctx
->Stencil
.WriteMask
[back
]))
147 cc
->cc0
.stencil_write_enable
= 1;
151 if (ctx
->Color
.ColorLogicOpEnabled
&& ctx
->Color
.LogicOp
!= GL_COPY
) {
152 cc
->cc2
.logicop_enable
= 1;
153 cc
->cc5
.logicop_func
= intel_translate_logic_op(ctx
->Color
.LogicOp
);
154 } else if (ctx
->Color
.BlendEnabled
) {
155 GLenum eqRGB
= ctx
->Color
.Blend
[0].EquationRGB
;
156 GLenum eqA
= ctx
->Color
.Blend
[0].EquationA
;
157 GLenum srcRGB
= ctx
->Color
.Blend
[0].SrcRGB
;
158 GLenum dstRGB
= ctx
->Color
.Blend
[0].DstRGB
;
159 GLenum srcA
= ctx
->Color
.Blend
[0].SrcA
;
160 GLenum dstA
= ctx
->Color
.Blend
[0].DstA
;
162 /* If the renderbuffer is XRGB, we have to frob the blend function to
163 * force the destination alpha to 1.0. This means replacing GL_DST_ALPHA
164 * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO.
166 if (ctx
->DrawBuffer
->Visual
.alphaBits
== 0) {
167 srcRGB
= brw_fix_xRGB_alpha(srcRGB
);
168 srcA
= brw_fix_xRGB_alpha(srcA
);
169 dstRGB
= brw_fix_xRGB_alpha(dstRGB
);
170 dstA
= brw_fix_xRGB_alpha(dstA
);
173 if (eqRGB
== GL_MIN
|| eqRGB
== GL_MAX
) {
174 srcRGB
= dstRGB
= GL_ONE
;
177 if (eqA
== GL_MIN
|| eqA
== GL_MAX
) {
178 srcA
= dstA
= GL_ONE
;
181 cc
->cc6
.dest_blend_factor
= brw_translate_blend_factor(dstRGB
);
182 cc
->cc6
.src_blend_factor
= brw_translate_blend_factor(srcRGB
);
183 cc
->cc6
.blend_function
= brw_translate_blend_equation(eqRGB
);
185 cc
->cc5
.ia_dest_blend_factor
= brw_translate_blend_factor(dstA
);
186 cc
->cc5
.ia_src_blend_factor
= brw_translate_blend_factor(srcA
);
187 cc
->cc5
.ia_blend_function
= brw_translate_blend_equation(eqA
);
189 cc
->cc3
.blend_enable
= 1;
190 cc
->cc3
.ia_blend_enable
= (srcA
!= srcRGB
||
196 if (ctx
->Color
.AlphaEnabled
&& ctx
->DrawBuffer
->_NumColorDrawBuffers
<= 1) {
197 cc
->cc3
.alpha_test
= 1;
198 cc
->cc3
.alpha_test_func
=
199 intel_translate_compare_func(ctx
->Color
.AlphaFunc
);
200 cc
->cc3
.alpha_test_format
= BRW_ALPHATEST_FORMAT_UNORM8
;
202 UNCLAMPED_FLOAT_TO_UBYTE(cc
->cc7
.alpha_ref
.ub
[0], ctx
->Color
.AlphaRef
);
205 if (ctx
->Color
.DitherFlag
) {
206 cc
->cc5
.dither_enable
= 1;
207 cc
->cc6
.y_dither_offset
= 0;
208 cc
->cc6
.x_dither_offset
= 0;
212 if (ctx
->Depth
.Test
) {
213 cc
->cc2
.depth_test
= 1;
214 cc
->cc2
.depth_test_function
=
215 intel_translate_compare_func(ctx
->Depth
.Func
);
216 cc
->cc2
.depth_write_enable
= ctx
->Depth
.Mask
;
219 if (brw
->stats_wm
|| unlikely(INTEL_DEBUG
& DEBUG_STATS
))
220 cc
->cc5
.statistics_enable
= 1;
222 /* CACHE_NEW_CC_VP */
223 cc
->cc4
.cc_viewport_state_offset
= (brw
->batch
.bo
->offset64
+
224 brw
->cc
.vp_offset
) >> 5; /* reloc */
226 SET_DIRTY_BIT(cache
, CACHE_NEW_CC_UNIT
);
228 /* Emit CC viewport relocation */
229 drm_intel_bo_emit_reloc(brw
->batch
.bo
,
230 (brw
->cc
.state_offset
+
231 offsetof(struct brw_cc_unit_state
, cc4
)),
232 brw
->batch
.bo
, brw
->cc
.vp_offset
,
233 I915_GEM_DOMAIN_INSTRUCTION
, 0);
236 const struct brw_tracked_state brw_cc_unit
= {
238 .mesa
= _NEW_STENCIL
| _NEW_COLOR
| _NEW_DEPTH
| _NEW_BUFFERS
,
239 .brw
= BRW_NEW_BATCH
| BRW_NEW_STATS_WM
,
240 .cache
= CACHE_NEW_CC_VP
242 .emit
= upload_cc_unit
,
245 static void upload_blend_constant_color(struct brw_context
*brw
)
247 struct gl_context
*ctx
= &brw
->ctx
;
250 OUT_BATCH(_3DSTATE_BLEND_CONSTANT_COLOR
<< 16 | (5-2));
251 OUT_BATCH_F(ctx
->Color
.BlendColorUnclamped
[0]);
252 OUT_BATCH_F(ctx
->Color
.BlendColorUnclamped
[1]);
253 OUT_BATCH_F(ctx
->Color
.BlendColorUnclamped
[2]);
254 OUT_BATCH_F(ctx
->Color
.BlendColorUnclamped
[3]);
258 const struct brw_tracked_state brw_blend_constant_color
= {
261 .brw
= BRW_NEW_CONTEXT
,
264 .emit
= upload_blend_constant_color