Merge commit 'origin/gallium-draw-retval'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_line.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35 #include "shader/program.h"
36
37 #include "intel_batchbuffer.h"
38
39 #include "brw_defines.h"
40 #include "brw_context.h"
41 #include "brw_eu.h"
42 #include "brw_util.h"
43 #include "brw_clip.h"
44
45
46
47 static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
48 {
49 struct intel_context *intel = &c->func.brw->intel;
50 GLuint i = 0,j;
51
52 /* Register usage is static, precompute here:
53 */
54 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
55
56 if (c->key.nr_userclip) {
57 c->reg.fixed_planes = brw_vec4_grf(i, 0);
58 i += (6 + c->key.nr_userclip + 1) / 2;
59
60 c->prog_data.curb_read_length = (6 + c->key.nr_userclip + 1) / 2;
61 }
62 else
63 c->prog_data.curb_read_length = 0;
64
65
66 /* Payload vertices plus space for more generated vertices:
67 */
68 for (j = 0; j < 4; j++) {
69 c->reg.vertex[j] = brw_vec4_grf(i, 0);
70 i += c->nr_regs;
71 }
72
73 c->reg.t = brw_vec1_grf(i, 0);
74 c->reg.t0 = brw_vec1_grf(i, 1);
75 c->reg.t1 = brw_vec1_grf(i, 2);
76 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
77 c->reg.plane_equation = brw_vec4_grf(i, 4);
78 i++;
79
80 c->reg.dp0 = brw_vec1_grf(i, 0); /* fixme - dp4 will clobber r.1,2,3 */
81 c->reg.dp1 = brw_vec1_grf(i, 4);
82 i++;
83
84 if (!c->key.nr_userclip) {
85 c->reg.fixed_planes = brw_vec8_grf(i, 0);
86 i++;
87 }
88
89 if (intel->needs_ff_sync) {
90 c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
91 i++;
92 }
93
94 c->first_tmp = i;
95 c->last_tmp = i;
96
97 c->prog_data.urb_read_length = c->nr_regs; /* ? */
98 c->prog_data.total_grf = i;
99 }
100
101
102
103 /* Line clipping, more or less following the following algorithm:
104 *
105 * for (p=0;p<MAX_PLANES;p++) {
106 * if (clipmask & (1 << p)) {
107 * GLfloat dp0 = DOTPROD( vtx0, plane[p] );
108 * GLfloat dp1 = DOTPROD( vtx1, plane[p] );
109 *
110 * if (IS_NEGATIVE(dp1)) {
111 * GLfloat t = dp1 / (dp1 - dp0);
112 * if (t > t1) t1 = t;
113 * } else {
114 * GLfloat t = dp0 / (dp0 - dp1);
115 * if (t > t0) t0 = t;
116 * }
117 *
118 * if (t0 + t1 >= 1.0)
119 * return;
120 * }
121 * }
122 *
123 * interp( ctx, newvtx0, vtx0, vtx1, t0 );
124 * interp( ctx, newvtx1, vtx1, vtx0, t1 );
125 *
126 */
127 static void clip_and_emit_line( struct brw_clip_compile *c )
128 {
129 struct brw_compile *p = &c->func;
130 struct brw_context *brw = p->brw;
131 struct brw_indirect vtx0 = brw_indirect(0, 0);
132 struct brw_indirect vtx1 = brw_indirect(1, 0);
133 struct brw_indirect newvtx0 = brw_indirect(2, 0);
134 struct brw_indirect newvtx1 = brw_indirect(3, 0);
135 struct brw_indirect plane_ptr = brw_indirect(4, 0);
136 struct brw_instruction *plane_loop;
137 struct brw_instruction *plane_active;
138 struct brw_instruction *is_negative;
139 struct brw_instruction *is_neg2 = NULL;
140 struct brw_instruction *not_culled;
141 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
142
143 brw_MOV(p, get_addr_reg(vtx0), brw_address(c->reg.vertex[0]));
144 brw_MOV(p, get_addr_reg(vtx1), brw_address(c->reg.vertex[1]));
145 brw_MOV(p, get_addr_reg(newvtx0), brw_address(c->reg.vertex[2]));
146 brw_MOV(p, get_addr_reg(newvtx1), brw_address(c->reg.vertex[3]));
147 brw_MOV(p, get_addr_reg(plane_ptr), brw_clip_plane0_address(c));
148
149 /* Note: init t0, t1 together:
150 */
151 brw_MOV(p, vec2(c->reg.t0), brw_imm_f(0));
152
153 brw_clip_init_planes(c);
154 brw_clip_init_clipmask(c);
155
156 /* -ve rhw workaround */
157 if (brw->has_negative_rhw_bug) {
158 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
159 brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
160 brw_imm_ud(1<<20));
161 brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
162 }
163
164 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
165
166 plane_loop = brw_DO(p, BRW_EXECUTE_1);
167 {
168 /* if (planemask & 1)
169 */
170 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
171 brw_AND(p, v1_null_ud, c->reg.planemask, brw_imm_ud(1));
172
173 plane_active = brw_IF(p, BRW_EXECUTE_1);
174 {
175 if (c->key.nr_userclip)
176 brw_MOV(p, c->reg.plane_equation, deref_4f(plane_ptr, 0));
177 else
178 brw_MOV(p, c->reg.plane_equation, deref_4b(plane_ptr, 0));
179
180 /* dp = DP4(vtx->position, plane)
181 */
182 brw_DP4(p, vec4(c->reg.dp0), deref_4f(vtx0, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
183
184 /* if (IS_NEGATIVE(dp1))
185 */
186 brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
187 brw_DP4(p, vec4(c->reg.dp1), deref_4f(vtx1, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
188 is_negative = brw_IF(p, BRW_EXECUTE_1);
189 {
190 /*
191 * Both can be negative on GM965/G965 due to RHW workaround
192 * if so, this object should be rejected.
193 */
194 if (brw->has_negative_rhw_bug) {
195 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0));
196 is_neg2 = brw_IF(p, BRW_EXECUTE_1);
197 {
198 brw_clip_kill_thread(c);
199 }
200 brw_ENDIF(p, is_neg2);
201 }
202
203 brw_ADD(p, c->reg.t, c->reg.dp1, negate(c->reg.dp0));
204 brw_math_invert(p, c->reg.t, c->reg.t);
205 brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp1);
206
207 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
208 brw_MOV(p, c->reg.t1, c->reg.t);
209 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
210 }
211 is_negative = brw_ELSE(p, is_negative);
212 {
213 /* Coming back in. We know that both cannot be negative
214 * because the line would have been culled in that case.
215 */
216
217 /* If both are positive, do nothing */
218 /* Only on GM965/G965 */
219 if (brw->has_negative_rhw_bug) {
220 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
221 is_neg2 = brw_IF(p, BRW_EXECUTE_1);
222 }
223
224 {
225 brw_ADD(p, c->reg.t, c->reg.dp0, negate(c->reg.dp1));
226 brw_math_invert(p, c->reg.t, c->reg.t);
227 brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
228
229 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
230 brw_MOV(p, c->reg.t0, c->reg.t);
231 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
232 }
233
234 if (brw->has_negative_rhw_bug) {
235 brw_ENDIF(p, is_neg2);
236 }
237 }
238 brw_ENDIF(p, is_negative);
239 }
240 brw_ENDIF(p, plane_active);
241
242 /* plane_ptr++;
243 */
244 brw_ADD(p, get_addr_reg(plane_ptr), get_addr_reg(plane_ptr), brw_clip_plane_stride(c));
245
246 /* while (planemask>>=1) != 0
247 */
248 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
249 brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
250 }
251 brw_WHILE(p, plane_loop);
252
253 brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1);
254 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
255 not_culled = brw_IF(p, BRW_EXECUTE_1);
256 {
257 brw_clip_interp_vertex(c, newvtx0, vtx0, vtx1, c->reg.t0, GL_FALSE);
258 brw_clip_interp_vertex(c, newvtx1, vtx1, vtx0, c->reg.t1, GL_FALSE);
259
260 brw_clip_emit_vue(c, newvtx0, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_START);
261 brw_clip_emit_vue(c, newvtx1, 0, 1, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_END);
262 }
263 brw_ENDIF(p, not_culled);
264 brw_clip_kill_thread(c);
265 }
266
267
268
269 void brw_emit_line_clip( struct brw_clip_compile *c )
270 {
271 brw_clip_line_alloc_regs(c);
272 brw_clip_init_ff_sync(c);
273
274 if (c->key.do_flat_shading) {
275 if (c->key.pv_first)
276 brw_clip_copy_colors(c, 1, 0);
277 else
278 brw_clip_copy_colors(c, 0, 1);
279 }
280
281 clip_and_emit_line(c);
282 }