i965: Don't leak blorp on Gen4-5.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c
1 /*
2 Copyright 2003 VMware, Inc.
3 Copyright (C) Intel Corp. 2006. All Rights Reserved.
4 Intel funded Tungsten Graphics to
5 develop this 3D driver.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **********************************************************************/
28 /*
29 * Authors:
30 * Keith Whitwell <keithw@vmware.com>
31 */
32
33
34 #include "compiler/nir/nir.h"
35 #include "main/api_exec.h"
36 #include "main/context.h"
37 #include "main/fbobject.h"
38 #include "main/extensions.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/points.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 #include "main/texobj.h"
45 #include "main/framebuffer.h"
46 #include "main/stencil.h"
47 #include "main/state.h"
48
49 #include "vbo/vbo.h"
50
51 #include "drivers/common/driverfuncs.h"
52 #include "drivers/common/meta.h"
53 #include "utils.h"
54
55 #include "brw_context.h"
56 #include "brw_defines.h"
57 #include "brw_blorp.h"
58 #include "brw_draw.h"
59 #include "brw_state.h"
60
61 #include "intel_batchbuffer.h"
62 #include "intel_buffer_objects.h"
63 #include "intel_buffers.h"
64 #include "intel_fbo.h"
65 #include "intel_mipmap_tree.h"
66 #include "intel_pixel.h"
67 #include "intel_image.h"
68 #include "intel_tex.h"
69 #include "intel_tex_obj.h"
70
71 #include "swrast_setup/swrast_setup.h"
72 #include "tnl/tnl.h"
73 #include "tnl/t_pipeline.h"
74 #include "util/ralloc.h"
75 #include "util/debug.h"
76 #include "util/disk_cache.h"
77 #include "isl/isl.h"
78
79 #include "common/gen_defines.h"
80
81 #include "compiler/spirv/nir_spirv.h"
82 /***************************************
83 * Mesa's Driver Functions
84 ***************************************/
85
86 const char *const brw_vendor_string = "Intel Open Source Technology Center";
87
88 static const char *
89 get_bsw_model(const struct intel_screen *screen)
90 {
91 switch (screen->eu_total) {
92 case 16:
93 return "405";
94 case 12:
95 return "400";
96 default:
97 return " ";
98 }
99 }
100
101 const char *
102 brw_get_renderer_string(const struct intel_screen *screen)
103 {
104 const char *chipset;
105 static char buffer[128];
106 char *bsw = NULL;
107
108 switch (screen->deviceID) {
109 #undef CHIPSET
110 #define CHIPSET(id, symbol, str) case id: chipset = str; break;
111 #include "pci_ids/i965_pci_ids.h"
112 default:
113 chipset = "Unknown Intel Chipset";
114 break;
115 }
116
117 /* Braswell branding is funny, so we have to fix it up here */
118 if (screen->deviceID == 0x22B1) {
119 bsw = strdup(chipset);
120 char *needle = strstr(bsw, "XXX");
121 if (needle) {
122 memcpy(needle, get_bsw_model(screen), 3);
123 chipset = bsw;
124 }
125 }
126
127 (void) driGetRendererString(buffer, chipset, 0);
128 free(bsw);
129 return buffer;
130 }
131
132 static const GLubyte *
133 intel_get_string(struct gl_context * ctx, GLenum name)
134 {
135 const struct brw_context *const brw = brw_context(ctx);
136
137 switch (name) {
138 case GL_VENDOR:
139 return (GLubyte *) brw_vendor_string;
140
141 case GL_RENDERER:
142 return
143 (GLubyte *) brw_get_renderer_string(brw->screen);
144
145 default:
146 return NULL;
147 }
148 }
149
150 static void
151 intel_viewport(struct gl_context *ctx)
152 {
153 struct brw_context *brw = brw_context(ctx);
154 __DRIcontext *driContext = brw->driContext;
155
156 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
157 if (driContext->driDrawablePriv)
158 dri2InvalidateDrawable(driContext->driDrawablePriv);
159 if (driContext->driReadablePriv)
160 dri2InvalidateDrawable(driContext->driReadablePriv);
161 }
162 }
163
164 static void
165 intel_update_framebuffer(struct gl_context *ctx,
166 struct gl_framebuffer *fb)
167 {
168 struct brw_context *brw = brw_context(ctx);
169
170 /* Quantize the derived default number of samples
171 */
172 fb->DefaultGeometry._NumSamples =
173 intel_quantize_num_samples(brw->screen,
174 fb->DefaultGeometry.NumSamples);
175 }
176
177 static void
178 intel_update_state(struct gl_context * ctx)
179 {
180 GLuint new_state = ctx->NewState;
181 struct brw_context *brw = brw_context(ctx);
182
183 if (ctx->swrast_context)
184 _swrast_InvalidateState(ctx, new_state);
185
186 brw->NewGLState |= new_state;
187
188 if (new_state & (_NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT))
189 _mesa_update_draw_buffer_bounds(ctx, ctx->DrawBuffer);
190
191 if (new_state & (_NEW_STENCIL | _NEW_BUFFERS)) {
192 brw->stencil_enabled = _mesa_stencil_is_enabled(ctx);
193 brw->stencil_two_sided = _mesa_stencil_is_two_sided(ctx);
194 brw->stencil_write_enabled =
195 _mesa_stencil_is_write_enabled(ctx, brw->stencil_two_sided);
196 }
197
198 if (new_state & _NEW_POLYGON)
199 brw->polygon_front_bit = _mesa_polygon_get_front_bit(ctx);
200
201 if (new_state & _NEW_BUFFERS) {
202 intel_update_framebuffer(ctx, ctx->DrawBuffer);
203 if (ctx->DrawBuffer != ctx->ReadBuffer)
204 intel_update_framebuffer(ctx, ctx->ReadBuffer);
205 }
206 }
207
208 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
209
210 static void
211 intel_flush_front(struct gl_context *ctx)
212 {
213 struct brw_context *brw = brw_context(ctx);
214 __DRIcontext *driContext = brw->driContext;
215 __DRIdrawable *driDrawable = driContext->driDrawablePriv;
216 __DRIscreen *const dri_screen = brw->screen->driScrnPriv;
217
218 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
219 if (flushFront(dri_screen) && driDrawable &&
220 driDrawable->loaderPrivate) {
221
222 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
223 *
224 * This potentially resolves both front and back buffer. It
225 * is unnecessary to resolve the back, but harms nothing except
226 * performance. And no one cares about front-buffer render
227 * performance.
228 */
229 intel_resolve_for_dri2_flush(brw, driDrawable);
230 intel_batchbuffer_flush(brw);
231
232 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
233
234 /* We set the dirty bit in intel_prepare_render() if we're
235 * front buffer rendering once we get there.
236 */
237 brw->front_buffer_dirty = false;
238 }
239 }
240 }
241
242 static void
243 intel_glFlush(struct gl_context *ctx)
244 {
245 struct brw_context *brw = brw_context(ctx);
246
247 intel_batchbuffer_flush(brw);
248 intel_flush_front(ctx);
249
250 brw->need_flush_throttle = true;
251 }
252
253 static void
254 intel_finish(struct gl_context * ctx)
255 {
256 struct brw_context *brw = brw_context(ctx);
257
258 intel_glFlush(ctx);
259
260 if (brw->batch.last_bo)
261 brw_bo_wait_rendering(brw->batch.last_bo);
262 }
263
264 static void
265 brw_init_driver_functions(struct brw_context *brw,
266 struct dd_function_table *functions)
267 {
268 const struct gen_device_info *devinfo = &brw->screen->devinfo;
269
270 _mesa_init_driver_functions(functions);
271
272 /* GLX uses DRI2 invalidate events to handle window resizing.
273 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib),
274 * which doesn't provide a mechanism for snooping the event queues.
275 *
276 * So EGL still relies on viewport hacks to handle window resizing.
277 * This should go away with DRI3000.
278 */
279 if (!brw->driContext->driScreenPriv->dri2.useInvalidate)
280 functions->Viewport = intel_viewport;
281
282 functions->Flush = intel_glFlush;
283 functions->Finish = intel_finish;
284 functions->GetString = intel_get_string;
285 functions->UpdateState = intel_update_state;
286
287 brw_init_draw_functions(functions);
288 intelInitTextureFuncs(functions);
289 intelInitTextureImageFuncs(functions);
290 intelInitTextureCopyImageFuncs(functions);
291 intelInitCopyImageFuncs(functions);
292 intelInitClearFuncs(functions);
293 intelInitBufferFuncs(functions);
294 intelInitPixelFuncs(functions);
295 intelInitBufferObjectFuncs(functions);
296 brw_init_syncobj_functions(functions);
297 brw_init_object_purgeable_functions(functions);
298
299 brwInitFragProgFuncs( functions );
300 brw_init_common_queryobj_functions(functions);
301 if (devinfo->gen >= 8 || devinfo->is_haswell)
302 hsw_init_queryobj_functions(functions);
303 else if (devinfo->gen >= 6)
304 gen6_init_queryobj_functions(functions);
305 else
306 gen4_init_queryobj_functions(functions);
307 brw_init_compute_functions(functions);
308 brw_init_conditional_render_functions(functions);
309
310 functions->GenerateMipmap = brw_generate_mipmap;
311
312 functions->QueryInternalFormat = brw_query_internal_format;
313
314 functions->NewTransformFeedback = brw_new_transform_feedback;
315 functions->DeleteTransformFeedback = brw_delete_transform_feedback;
316 if (can_do_mi_math_and_lrr(brw->screen)) {
317 functions->BeginTransformFeedback = hsw_begin_transform_feedback;
318 functions->EndTransformFeedback = hsw_end_transform_feedback;
319 functions->PauseTransformFeedback = hsw_pause_transform_feedback;
320 functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
321 } else if (devinfo->gen >= 7) {
322 functions->BeginTransformFeedback = gen7_begin_transform_feedback;
323 functions->EndTransformFeedback = gen7_end_transform_feedback;
324 functions->PauseTransformFeedback = gen7_pause_transform_feedback;
325 functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
326 functions->GetTransformFeedbackVertexCount =
327 brw_get_transform_feedback_vertex_count;
328 } else {
329 functions->BeginTransformFeedback = brw_begin_transform_feedback;
330 functions->EndTransformFeedback = brw_end_transform_feedback;
331 functions->PauseTransformFeedback = brw_pause_transform_feedback;
332 functions->ResumeTransformFeedback = brw_resume_transform_feedback;
333 functions->GetTransformFeedbackVertexCount =
334 brw_get_transform_feedback_vertex_count;
335 }
336
337 if (devinfo->gen >= 6)
338 functions->GetSamplePosition = gen6_get_sample_position;
339
340 /* GL_ARB_get_program_binary */
341 brw_program_binary_init(brw->screen->deviceID);
342 functions->GetProgramBinaryDriverSHA1 = brw_get_program_binary_driver_sha1;
343 functions->ProgramBinarySerializeDriverBlob = brw_program_serialize_nir;
344 functions->ProgramBinaryDeserializeDriverBlob =
345 brw_deserialize_program_binary;
346 }
347
348 static void
349 brw_initialize_spirv_supported_capabilities(struct brw_context *brw)
350 {
351 const struct gen_device_info *devinfo = &brw->screen->devinfo;
352 struct gl_context *ctx = &brw->ctx;
353
354 /* The following SPIR-V capabilities are only supported on gen7+. In theory
355 * you should enable the extension only on gen7+, but just in case let's
356 * assert it.
357 */
358 assert(devinfo->gen >= 7);
359
360 ctx->Const.SpirVCapabilities.float64 = devinfo->gen >= 8;
361 ctx->Const.SpirVCapabilities.int64 = devinfo->gen >= 8;
362 ctx->Const.SpirVCapabilities.tessellation = true;
363 ctx->Const.SpirVCapabilities.draw_parameters = true;
364 ctx->Const.SpirVCapabilities.image_write_without_format = true;
365 ctx->Const.SpirVCapabilities.variable_pointers = true;
366 }
367
368 static void
369 brw_initialize_context_constants(struct brw_context *brw)
370 {
371 const struct gen_device_info *devinfo = &brw->screen->devinfo;
372 struct gl_context *ctx = &brw->ctx;
373 const struct brw_compiler *compiler = brw->screen->compiler;
374
375 const bool stage_exists[MESA_SHADER_STAGES] = {
376 [MESA_SHADER_VERTEX] = true,
377 [MESA_SHADER_TESS_CTRL] = devinfo->gen >= 7,
378 [MESA_SHADER_TESS_EVAL] = devinfo->gen >= 7,
379 [MESA_SHADER_GEOMETRY] = devinfo->gen >= 6,
380 [MESA_SHADER_FRAGMENT] = true,
381 [MESA_SHADER_COMPUTE] =
382 (_mesa_is_desktop_gl(ctx) &&
383 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
384 (ctx->API == API_OPENGLES2 &&
385 ctx->Const.MaxComputeWorkGroupSize[0] >= 128),
386 };
387
388 unsigned num_stages = 0;
389 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
390 if (stage_exists[i])
391 num_stages++;
392 }
393
394 unsigned max_samplers =
395 devinfo->gen >= 8 || devinfo->is_haswell ? BRW_MAX_TEX_UNIT : 16;
396
397 ctx->Const.MaxDualSourceDrawBuffers = 1;
398 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
399 ctx->Const.MaxCombinedShaderOutputResources =
400 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
401
402 /* The timestamp register we can read for glGetTimestamp() is
403 * sometimes only 32 bits, before scaling to nanoseconds (depending
404 * on kernel).
405 *
406 * Once scaled to nanoseconds the timestamp would roll over at a
407 * non-power-of-two, so an application couldn't use
408 * GL_QUERY_COUNTER_BITS to handle rollover correctly. Instead, we
409 * report 36 bits and truncate at that (rolling over 5 times as
410 * often as the HW counter), and when the 32-bit counter rolls
411 * over, it happens to also be at a rollover in the reported value
412 * from near (1<<36) to 0.
413 *
414 * The low 32 bits rolls over in ~343 seconds. Our 36-bit result
415 * rolls over every ~69 seconds.
416 */
417 ctx->Const.QueryCounterBits.Timestamp = 36;
418
419 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
420 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
421 if (devinfo->gen >= 7) {
422 ctx->Const.MaxRenderbufferSize = 16384;
423 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS);
424 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */
425 } else {
426 ctx->Const.MaxRenderbufferSize = 8192;
427 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
428 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
429 }
430 ctx->Const.Max3DTextureLevels = 12; /* 2048 */
431 ctx->Const.MaxArrayTextureLayers = devinfo->gen >= 7 ? 2048 : 512;
432 ctx->Const.MaxTextureMbytes = 1536;
433 ctx->Const.MaxTextureRectSize = devinfo->gen >= 7 ? 16384 : 8192;
434 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
435 ctx->Const.MaxTextureLodBias = 15.0;
436 ctx->Const.StripTextureBorder = true;
437 if (devinfo->gen >= 7) {
438 ctx->Const.MaxProgramTextureGatherComponents = 4;
439 ctx->Const.MinProgramTextureGatherOffset = -32;
440 ctx->Const.MaxProgramTextureGatherOffset = 31;
441 } else if (devinfo->gen == 6) {
442 ctx->Const.MaxProgramTextureGatherComponents = 1;
443 ctx->Const.MinProgramTextureGatherOffset = -8;
444 ctx->Const.MaxProgramTextureGatherOffset = 7;
445 }
446
447 ctx->Const.MaxUniformBlockSize = 65536;
448
449 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
450 struct gl_program_constants *prog = &ctx->Const.Program[i];
451
452 if (!stage_exists[i])
453 continue;
454
455 prog->MaxTextureImageUnits = max_samplers;
456
457 prog->MaxUniformBlocks = BRW_MAX_UBO;
458 prog->MaxCombinedUniformComponents =
459 prog->MaxUniformComponents +
460 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
461
462 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
463 prog->MaxAtomicBuffers = BRW_MAX_ABO;
464 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
465 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
466 }
467
468 ctx->Const.MaxTextureUnits =
469 MIN2(ctx->Const.MaxTextureCoordUnits,
470 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
471
472 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
473 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
474 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
475 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
476 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
477 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
478 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
479
480
481 /* Hardware only supports a limited number of transform feedback buffers.
482 * So we need to override the Mesa default (which is based only on software
483 * limits).
484 */
485 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS;
486
487 /* On Gen6, in the worst case, we use up one binding table entry per
488 * transform feedback component (see comments above the definition of
489 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value
490 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to
491 * BRW_MAX_SOL_BINDINGS.
492 *
493 * In "separate components" mode, we need to divide this value by
494 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries
495 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS.
496 */
497 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS;
498 ctx->Const.MaxTransformFeedbackSeparateComponents =
499 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
500
501 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
502 !can_do_mi_math_and_lrr(brw->screen);
503
504 int max_samples;
505 const int *msaa_modes = intel_supported_msaa_modes(brw->screen);
506 const int clamp_max_samples =
507 driQueryOptioni(&brw->optionCache, "clamp_max_samples");
508
509 if (clamp_max_samples < 0) {
510 max_samples = msaa_modes[0];
511 } else {
512 /* Select the largest supported MSAA mode that does not exceed
513 * clamp_max_samples.
514 */
515 max_samples = 0;
516 for (int i = 0; msaa_modes[i] != 0; ++i) {
517 if (msaa_modes[i] <= clamp_max_samples) {
518 max_samples = msaa_modes[i];
519 break;
520 }
521 }
522 }
523
524 ctx->Const.MaxSamples = max_samples;
525 ctx->Const.MaxColorTextureSamples = max_samples;
526 ctx->Const.MaxDepthTextureSamples = max_samples;
527 ctx->Const.MaxIntegerSamples = max_samples;
528 ctx->Const.MaxImageSamples = 0;
529
530 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
531 * to map indices of rectangular grid to sample numbers within a pixel.
532 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled
533 * extension implementation. For more details see the comment above
534 * gen6_set_sample_maps() definition.
535 */
536 gen6_set_sample_maps(ctx);
537
538 ctx->Const.MinLineWidth = 1.0;
539 ctx->Const.MinLineWidthAA = 1.0;
540 if (devinfo->gen >= 6) {
541 ctx->Const.MaxLineWidth = 7.375;
542 ctx->Const.MaxLineWidthAA = 7.375;
543 ctx->Const.LineWidthGranularity = 0.125;
544 } else {
545 ctx->Const.MaxLineWidth = 7.0;
546 ctx->Const.MaxLineWidthAA = 7.0;
547 ctx->Const.LineWidthGranularity = 0.5;
548 }
549
550 /* For non-antialiased lines, we have to round the line width to the
551 * nearest whole number. Make sure that we don't advertise a line
552 * width that, when rounded, will be beyond the actual hardware
553 * maximum.
554 */
555 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
556
557 ctx->Const.MinPointSize = 1.0;
558 ctx->Const.MinPointSizeAA = 1.0;
559 ctx->Const.MaxPointSize = 255.0;
560 ctx->Const.MaxPointSizeAA = 255.0;
561 ctx->Const.PointSizeGranularity = 1.0;
562
563 if (devinfo->gen >= 5 || devinfo->is_g4x)
564 ctx->Const.MaxClipPlanes = 8;
565
566 ctx->Const.GLSLTessLevelsAsInputs = true;
567 ctx->Const.PrimitiveRestartForPatches = true;
568
569 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
570 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
571 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
572 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0;
573 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0;
574 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0;
575 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0;
576 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16;
577 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256;
578 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
579 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024;
580 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams =
581 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters,
582 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams);
583
584 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024;
585 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024;
586 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024;
587 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024;
588 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12;
589 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256;
590 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0;
591 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024;
592 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams =
593 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters,
594 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams);
595
596 /* Fragment shaders use real, 32-bit twos-complement integers for all
597 * integer types.
598 */
599 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31;
600 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30;
601 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0;
602 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
603 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt;
604
605 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31;
606 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30;
607 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0;
608 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
609 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
610
611 /* Gen6 converts quads to polygon in beginning of 3D pipeline,
612 * but we're not sure how it's actually done for vertex order,
613 * that affect provoking vertex decision. Always use last vertex
614 * convention for quad primitive which works as expected for now.
615 */
616 if (devinfo->gen >= 6)
617 ctx->Const.QuadsFollowProvokingVertexConvention = false;
618
619 ctx->Const.NativeIntegers = true;
620
621 /* Regarding the CMP instruction, the Ivybridge PRM says:
622 *
623 * "For each enabled channel 0b or 1b is assigned to the appropriate flag
624 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord
625 * 0xFFFFFFFF) is assigned to dst."
626 *
627 * but PRMs for earlier generations say
628 *
629 * "In dword format, one GRF may store up to 8 results. When the register
630 * is used later as a vector of Booleans, as only LSB at each channel
631 * contains meaning [sic] data, software should make sure all higher bits
632 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)."
633 *
634 * We select the representation of a true boolean uniform to be ~0, and fix
635 * the results of Gen <= 5 CMP instruction's with -(result & 1).
636 */
637 ctx->Const.UniformBooleanTrue = ~0;
638
639 /* From the gen4 PRM, volume 4 page 127:
640 *
641 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies
642 * the base address of the first element of the surface, computed in
643 * software by adding the surface base address to the byte offset of
644 * the element in the buffer."
645 *
646 * However, unaligned accesses are slower, so enforce buffer alignment.
647 *
648 * In order to push UBO data, 3DSTATE_CONSTANT_XS imposes an additional
649 * restriction: the start of the buffer needs to be 32B aligned.
650 */
651 ctx->Const.UniformBufferOffsetAlignment = 32;
652
653 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
654 * that we can safely have the CPU and GPU writing the same SSBO on
655 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
656 * writes, so there's no problem. For an SSBO, the GPU and the CPU can
657 * be updating disjoint regions of the buffer simultaneously and that will
658 * break if the regions overlap the same cacheline.
659 */
660 ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
661 ctx->Const.TextureBufferOffsetAlignment = 16;
662 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
663
664 if (devinfo->gen >= 6) {
665 ctx->Const.MaxVarying = 32;
666 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128;
667 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents =
668 compiler->scalar_stage[MESA_SHADER_GEOMETRY] ? 128 : 64;
669 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
670 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
671 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
672 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
673 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
674 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
675 }
676
677 /* We want the GLSL compiler to emit code that uses condition codes */
678 for (int i = 0; i < MESA_SHADER_STAGES; i++) {
679 ctx->Const.ShaderCompilerOptions[i] =
680 brw->screen->compiler->glsl_compiler_options[i];
681 }
682
683 if (devinfo->gen >= 7) {
684 ctx->Const.MaxViewportWidth = 32768;
685 ctx->Const.MaxViewportHeight = 32768;
686 }
687
688 /* ARB_viewport_array, OES_viewport_array */
689 if (devinfo->gen >= 6) {
690 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
691 ctx->Const.ViewportSubpixelBits = 0;
692
693 /* Cast to float before negating because MaxViewportWidth is unsigned.
694 */
695 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
696 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
697 }
698
699 /* ARB_gpu_shader5 */
700 if (devinfo->gen >= 7)
701 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
702
703 /* ARB_framebuffer_no_attachments */
704 ctx->Const.MaxFramebufferWidth = 16384;
705 ctx->Const.MaxFramebufferHeight = 16384;
706 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
707 ctx->Const.MaxFramebufferSamples = max_samples;
708
709 /* OES_primitive_bounding_box */
710 ctx->Const.NoPrimitiveBoundingBoxOutput = true;
711
712 /* TODO: We should be able to use STD430 packing by default on all hardware
713 * but some piglit tests [1] currently fail on SNB when this is enabled.
714 * The problem is the messages we're using for doing uniform pulls
715 * in the vec4 back-end on SNB is the OWORD block load instruction, which
716 * takes its offset in units of OWORDS (16 bytes). On IVB+, we use the
717 * sampler which doesn't have these restrictions.
718 *
719 * In the scalar back-end, we use the sampler for dynamic uniform loads and
720 * pull an entire cache line at a time for constant offset loads both of
721 * which support almost any alignment.
722 *
723 * [1] glsl-1.40/uniform_buffer/vs-float-array-variable-index.shader_test
724 */
725 if (devinfo->gen >= 7)
726 ctx->Const.UseSTD430AsDefaultPacking = true;
727
728 if (!(ctx->Const.ContextFlags & GL_CONTEXT_FLAG_DEBUG_BIT))
729 ctx->Const.AllowMappedBuffersDuringExecution = true;
730
731 /* GL_ARB_get_program_binary */
732 ctx->Const.NumProgramBinaryFormats = 1;
733 }
734
735 static void
736 brw_initialize_cs_context_constants(struct brw_context *brw)
737 {
738 struct gl_context *ctx = &brw->ctx;
739 const struct intel_screen *screen = brw->screen;
740 struct gen_device_info *devinfo = &brw->screen->devinfo;
741
742 /* FINISHME: Do this for all platforms that the kernel supports */
743 if (devinfo->is_cherryview &&
744 screen->subslice_total > 0 && screen->eu_total > 0) {
745 /* Logical CS threads = EUs per subslice * 7 threads per EU */
746 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7;
747
748 /* Fuse configurations may give more threads than expected, never less. */
749 if (max_cs_threads > devinfo->max_cs_threads)
750 devinfo->max_cs_threads = max_cs_threads;
751 }
752
753 /* Maximum number of scalar compute shader invocations that can be run in
754 * parallel in the same subslice assuming SIMD32 dispatch.
755 *
756 * We don't advertise more than 64 threads, because we are limited to 64 by
757 * our usage of thread_width_max in the gpgpu walker command. This only
758 * currently impacts Haswell, which otherwise might be able to advertise 70
759 * threads. With SIMD32 and 64 threads, Haswell still provides twice the
760 * required the number of invocation needed for ARB_compute_shader.
761 */
762 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads);
763 const uint32_t max_invocations = 32 * max_threads;
764 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
765 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
766 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
767 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
768 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
769 }
770
771 /**
772 * Process driconf (drirc) options, setting appropriate context flags.
773 *
774 * intelInitExtensions still pokes at optionCache directly, in order to
775 * avoid advertising various extensions. No flags are set, so it makes
776 * sense to continue doing that there.
777 */
778 static void
779 brw_process_driconf_options(struct brw_context *brw)
780 {
781 const struct gen_device_info *devinfo = &brw->screen->devinfo;
782 struct gl_context *ctx = &brw->ctx;
783
784 driOptionCache *options = &brw->optionCache;
785 driParseConfigFiles(options, &brw->screen->optionCache,
786 brw->driContext->driScreenPriv->myNum, "i965");
787
788 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse");
789 switch (bo_reuse_mode) {
790 case DRI_CONF_BO_REUSE_DISABLED:
791 break;
792 case DRI_CONF_BO_REUSE_ALL:
793 brw_bufmgr_enable_reuse(brw->bufmgr);
794 break;
795 }
796
797 if (INTEL_DEBUG & DEBUG_NO_HIZ) {
798 brw->has_hiz = false;
799 /* On gen6, you can only do separate stencil with HIZ. */
800 if (devinfo->gen == 6)
801 brw->has_separate_stencil = false;
802 }
803
804 if (driQueryOptionb(options, "mesa_no_error"))
805 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_NO_ERROR_BIT_KHR;
806
807 if (driQueryOptionb(options, "always_flush_batch")) {
808 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
809 brw->always_flush_batch = true;
810 }
811
812 if (driQueryOptionb(options, "always_flush_cache")) {
813 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
814 brw->always_flush_cache = true;
815 }
816
817 if (driQueryOptionb(options, "disable_throttling")) {
818 fprintf(stderr, "disabling flush throttling\n");
819 brw->disable_throttling = true;
820 }
821
822 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
823
824 if (driQueryOptionb(&brw->optionCache, "precise_trig"))
825 brw->screen->compiler->precise_trig = true;
826
827 ctx->Const.ForceGLSLExtensionsWarn =
828 driQueryOptionb(options, "force_glsl_extensions_warn");
829
830 ctx->Const.ForceGLSLVersion =
831 driQueryOptioni(options, "force_glsl_version");
832
833 ctx->Const.DisableGLSLLineContinuations =
834 driQueryOptionb(options, "disable_glsl_line_continuations");
835
836 ctx->Const.AllowGLSLExtensionDirectiveMidShader =
837 driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
838
839 ctx->Const.AllowGLSLBuiltinVariableRedeclaration =
840 driQueryOptionb(options, "allow_glsl_builtin_variable_redeclaration");
841
842 ctx->Const.AllowHigherCompatVersion =
843 driQueryOptionb(options, "allow_higher_compat_version");
844
845 ctx->Const.ForceGLSLAbsSqrt =
846 driQueryOptionb(options, "force_glsl_abs_sqrt");
847
848 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init");
849
850 brw->dual_color_blend_by_location =
851 driQueryOptionb(options, "dual_color_blend_by_location");
852
853 ctx->Const.AllowGLSLCrossStageInterpolationMismatch =
854 driQueryOptionb(options, "allow_glsl_cross_stage_interpolation_mismatch");
855
856 ctx->Const.dri_config_options_sha1 = ralloc_array(brw, unsigned char, 20);
857 driComputeOptionsSha1(&brw->screen->optionCache,
858 ctx->Const.dri_config_options_sha1);
859 }
860
861 GLboolean
862 brwCreateContext(gl_api api,
863 const struct gl_config *mesaVis,
864 __DRIcontext *driContextPriv,
865 const struct __DriverContextConfig *ctx_config,
866 unsigned *dri_ctx_error,
867 void *sharedContextPrivate)
868 {
869 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
870 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
871 const struct gen_device_info *devinfo = &screen->devinfo;
872 struct dd_function_table functions;
873
874 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
875 * provides us with context reset notifications.
876 */
877 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG |
878 __DRI_CTX_FLAG_FORWARD_COMPATIBLE |
879 __DRI_CTX_FLAG_NO_ERROR;
880
881 if (screen->has_context_reset_notification)
882 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
883
884 if (ctx_config->flags & ~allowed_flags) {
885 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
886 return false;
887 }
888
889 if (ctx_config->attribute_mask &
890 ~(__DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY |
891 __DRIVER_CONTEXT_ATTRIB_PRIORITY)) {
892 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
893 return false;
894 }
895
896 bool notify_reset =
897 ((ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY) &&
898 ctx_config->reset_strategy != __DRI_CTX_RESET_NO_NOTIFICATION);
899
900 struct brw_context *brw = rzalloc(NULL, struct brw_context);
901 if (!brw) {
902 fprintf(stderr, "%s: failed to alloc context\n", __func__);
903 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
904 return false;
905 }
906
907 driContextPriv->driverPrivate = brw;
908 brw->driContext = driContextPriv;
909 brw->screen = screen;
910 brw->bufmgr = screen->bufmgr;
911
912 brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
913 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
914
915 brw->has_swizzling = screen->hw_has_swizzling;
916
917 brw->isl_dev = screen->isl_dev;
918
919 brw->vs.base.stage = MESA_SHADER_VERTEX;
920 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
921 brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
922 brw->gs.base.stage = MESA_SHADER_GEOMETRY;
923 brw->wm.base.stage = MESA_SHADER_FRAGMENT;
924 brw->cs.base.stage = MESA_SHADER_COMPUTE;
925 if (devinfo->gen >= 8) {
926 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
927 } else if (devinfo->gen >= 7) {
928 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
929 } else if (devinfo->gen >= 6) {
930 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz;
931 } else {
932 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
933 }
934
935 brw_init_driver_functions(brw, &functions);
936
937 if (notify_reset)
938 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status;
939
940 struct gl_context *ctx = &brw->ctx;
941
942 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
943 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
944 fprintf(stderr, "%s: failed to init mesa context\n", __func__);
945 intelDestroyContext(driContextPriv);
946 return false;
947 }
948
949 driContextSetFlags(ctx, ctx_config->flags);
950
951 /* Initialize the software rasterizer and helper modules.
952 *
953 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
954 * software fallbacks (which we have to support on legacy GL to do weird
955 * glDrawPixels(), glBitmap(), and other functions).
956 */
957 if (api != API_OPENGL_CORE && api != API_OPENGLES2) {
958 _swrast_CreateContext(ctx);
959 }
960
961 _vbo_CreateContext(ctx);
962 if (ctx->swrast_context) {
963 _tnl_CreateContext(ctx);
964 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
965 _swsetup_CreateContext(ctx);
966
967 /* Configure swrast to match hardware characteristics: */
968 _swrast_allow_pixel_fog(ctx, false);
969 _swrast_allow_vertex_fog(ctx, true);
970 }
971
972 _mesa_meta_init(ctx);
973
974 brw_process_driconf_options(brw);
975
976 if (INTEL_DEBUG & DEBUG_PERF)
977 brw->perf_debug = true;
978
979 brw_initialize_cs_context_constants(brw);
980 brw_initialize_context_constants(brw);
981
982 ctx->Const.ResetStrategy = notify_reset
983 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB;
984
985 /* Reinitialize the context point state. It depends on ctx->Const values. */
986 _mesa_init_point(ctx);
987
988 intel_fbo_init(brw);
989
990 intel_batchbuffer_init(brw);
991
992 /* Create a new hardware context. Using a hardware context means that
993 * our GPU state will be saved/restored on context switch, allowing us
994 * to assume that the GPU is in the same state we left it in.
995 *
996 * This is required for transform feedback buffer offsets, query objects,
997 * and also allows us to reduce how much state we have to emit.
998 */
999 brw->hw_ctx = brw_create_hw_context(brw->bufmgr);
1000 if (!brw->hw_ctx && devinfo->gen >= 6) {
1001 fprintf(stderr, "Failed to create hardware context.\n");
1002 intelDestroyContext(driContextPriv);
1003 return false;
1004 }
1005
1006 if (brw->hw_ctx) {
1007 int hw_priority = GEN_CONTEXT_MEDIUM_PRIORITY;
1008 if (ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_PRIORITY) {
1009 switch (ctx_config->priority) {
1010 case __DRI_CTX_PRIORITY_LOW:
1011 hw_priority = GEN_CONTEXT_LOW_PRIORITY;
1012 break;
1013 case __DRI_CTX_PRIORITY_HIGH:
1014 hw_priority = GEN_CONTEXT_HIGH_PRIORITY;
1015 break;
1016 }
1017 }
1018 if (hw_priority != I915_CONTEXT_DEFAULT_PRIORITY &&
1019 brw_hw_context_set_priority(brw->bufmgr, brw->hw_ctx, hw_priority)) {
1020 fprintf(stderr,
1021 "Failed to set priority [%d:%d] for hardware context.\n",
1022 ctx_config->priority, hw_priority);
1023 intelDestroyContext(driContextPriv);
1024 return false;
1025 }
1026 }
1027
1028 if (brw_init_pipe_control(brw, devinfo)) {
1029 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
1030 intelDestroyContext(driContextPriv);
1031 return false;
1032 }
1033
1034 if (devinfo->gen == 11) {
1035 fprintf(stderr,
1036 "WARNING: i965 does not fully support Gen11 yet.\n"
1037 "Instability or lower performance might occur.\n");
1038
1039 }
1040
1041 brw_upload_init(&brw->upload, brw->bufmgr, 65536);
1042
1043 brw_init_state(brw);
1044
1045 intelInitExtensions(ctx);
1046
1047 brw_init_surface_formats(brw);
1048
1049 brw_blorp_init(brw);
1050
1051 brw->urb.size = devinfo->urb.size;
1052
1053 if (devinfo->gen == 6)
1054 brw->urb.gs_present = false;
1055
1056 brw->prim_restart.in_progress = false;
1057 brw->prim_restart.enable_cut_index = false;
1058 brw->gs.enabled = false;
1059 brw->clip.viewport_count = 1;
1060
1061 brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
1062
1063 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
1064
1065 ctx->VertexProgram._MaintainTnlProgram = true;
1066 ctx->FragmentProgram._MaintainTexEnvProgram = true;
1067
1068 brw_draw_init( brw );
1069
1070 if ((ctx_config->flags & __DRI_CTX_FLAG_DEBUG) != 0) {
1071 /* Turn on some extra GL_ARB_debug_output generation. */
1072 brw->perf_debug = true;
1073 }
1074
1075 if ((ctx_config->flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) {
1076 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB;
1077 ctx->Const.RobustAccess = GL_TRUE;
1078 }
1079
1080 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
1081 brw_init_shader_time(brw);
1082
1083 _mesa_override_extensions(ctx);
1084 _mesa_compute_version(ctx);
1085
1086 /* GL_ARB_gl_spirv */
1087 if (ctx->Extensions.ARB_gl_spirv)
1088 brw_initialize_spirv_supported_capabilities(brw);
1089
1090 _mesa_initialize_dispatch_tables(ctx);
1091 _mesa_initialize_vbo_vtxfmt(ctx);
1092
1093 if (ctx->Extensions.INTEL_performance_query)
1094 brw_init_performance_queries(brw);
1095
1096 vbo_use_buffer_objects(ctx);
1097 vbo_always_unmap_buffers(ctx);
1098
1099 brw->ctx.Cache = brw->screen->disk_cache;
1100
1101 return true;
1102 }
1103
1104 void
1105 intelDestroyContext(__DRIcontext * driContextPriv)
1106 {
1107 struct brw_context *brw =
1108 (struct brw_context *) driContextPriv->driverPrivate;
1109 struct gl_context *ctx = &brw->ctx;
1110 const struct gen_device_info *devinfo = &brw->screen->devinfo;
1111
1112 _mesa_meta_free(&brw->ctx);
1113
1114 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
1115 /* Force a report. */
1116 brw->shader_time.report_time = 0;
1117
1118 brw_collect_and_report_shader_time(brw);
1119 brw_destroy_shader_time(brw);
1120 }
1121
1122 blorp_finish(&brw->blorp);
1123
1124 brw_destroy_state(brw);
1125 brw_draw_destroy(brw);
1126
1127 brw_bo_unreference(brw->curbe.curbe_bo);
1128
1129 brw_bo_unreference(brw->vs.base.scratch_bo);
1130 brw_bo_unreference(brw->tcs.base.scratch_bo);
1131 brw_bo_unreference(brw->tes.base.scratch_bo);
1132 brw_bo_unreference(brw->gs.base.scratch_bo);
1133 brw_bo_unreference(brw->wm.base.scratch_bo);
1134
1135 brw_bo_unreference(brw->vs.base.push_const_bo);
1136 brw_bo_unreference(brw->tcs.base.push_const_bo);
1137 brw_bo_unreference(brw->tes.base.push_const_bo);
1138 brw_bo_unreference(brw->gs.base.push_const_bo);
1139 brw_bo_unreference(brw->wm.base.push_const_bo);
1140
1141 brw_destroy_hw_context(brw->bufmgr, brw->hw_ctx);
1142
1143 if (ctx->swrast_context) {
1144 _swsetup_DestroyContext(&brw->ctx);
1145 _tnl_DestroyContext(&brw->ctx);
1146 }
1147 _vbo_DestroyContext(&brw->ctx);
1148
1149 if (ctx->swrast_context)
1150 _swrast_DestroyContext(&brw->ctx);
1151
1152 brw_fini_pipe_control(brw);
1153 intel_batchbuffer_free(&brw->batch);
1154
1155 brw_bo_unreference(brw->throttle_batch[1]);
1156 brw_bo_unreference(brw->throttle_batch[0]);
1157 brw->throttle_batch[1] = NULL;
1158 brw->throttle_batch[0] = NULL;
1159
1160 driDestroyOptionCache(&brw->optionCache);
1161
1162 /* free the Mesa context */
1163 _mesa_free_context_data(&brw->ctx);
1164
1165 ralloc_free(brw);
1166 driContextPriv->driverPrivate = NULL;
1167 }
1168
1169 GLboolean
1170 intelUnbindContext(__DRIcontext * driContextPriv)
1171 {
1172 /* Unset current context and dispath table */
1173 _mesa_make_current(NULL, NULL, NULL);
1174
1175 return true;
1176 }
1177
1178 /**
1179 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
1180 * on window system framebuffers.
1181 *
1182 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
1183 * your renderbuffer can do sRGB encode, and you can flip a switch that does
1184 * sRGB encode if the renderbuffer can handle it. You can ask specifically
1185 * for a visual where you're guaranteed to be capable, but it turns out that
1186 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
1187 * incapable ones, because there's no difference between the two in resources
1188 * used. Applications thus get built that accidentally rely on the default
1189 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
1190 * great...
1191 *
1192 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
1193 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
1194 * So they removed the enable knob and made it "if the renderbuffer is sRGB
1195 * capable, do sRGB encode". Then, for your window system renderbuffers, you
1196 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
1197 * and get no sRGB encode (assuming that both kinds of visual are available).
1198 * Thus our choice to support sRGB by default on our visuals for desktop would
1199 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
1200 *
1201 * Unfortunately, renderbuffer setup happens before a context is created. So
1202 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
1203 * context (without an sRGB visual), we go turn that back off before anyone
1204 * finds out.
1205 */
1206 static void
1207 intel_gles3_srgb_workaround(struct brw_context *brw,
1208 struct gl_framebuffer *fb)
1209 {
1210 struct gl_context *ctx = &brw->ctx;
1211
1212 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable)
1213 return;
1214
1215 for (int i = 0; i < BUFFER_COUNT; i++) {
1216 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
1217
1218 /* Check if sRGB was specifically asked for. */
1219 struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, i);
1220 if (irb && irb->need_srgb)
1221 return;
1222
1223 if (rb)
1224 rb->Format = _mesa_get_srgb_format_linear(rb->Format);
1225 }
1226 /* Disable sRGB from framebuffers that are not compatible. */
1227 fb->Visual.sRGBCapable = false;
1228 }
1229
1230 GLboolean
1231 intelMakeCurrent(__DRIcontext * driContextPriv,
1232 __DRIdrawable * driDrawPriv,
1233 __DRIdrawable * driReadPriv)
1234 {
1235 struct brw_context *brw;
1236
1237 if (driContextPriv)
1238 brw = (struct brw_context *) driContextPriv->driverPrivate;
1239 else
1240 brw = NULL;
1241
1242 if (driContextPriv) {
1243 struct gl_context *ctx = &brw->ctx;
1244 struct gl_framebuffer *fb, *readFb;
1245
1246 if (driDrawPriv == NULL) {
1247 fb = _mesa_get_incomplete_framebuffer();
1248 } else {
1249 fb = driDrawPriv->driverPrivate;
1250 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
1251 }
1252
1253 if (driReadPriv == NULL) {
1254 readFb = _mesa_get_incomplete_framebuffer();
1255 } else {
1256 readFb = driReadPriv->driverPrivate;
1257 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
1258 }
1259
1260 /* The sRGB workaround changes the renderbuffer's format. We must change
1261 * the format before the renderbuffer's miptree get's allocated, otherwise
1262 * the formats of the renderbuffer and its miptree will differ.
1263 */
1264 intel_gles3_srgb_workaround(brw, fb);
1265 intel_gles3_srgb_workaround(brw, readFb);
1266
1267 /* If the context viewport hasn't been initialized, force a call out to
1268 * the loader to get buffers so we have a drawable size for the initial
1269 * viewport. */
1270 if (!brw->ctx.ViewportInitialized)
1271 intel_prepare_render(brw);
1272
1273 _mesa_make_current(ctx, fb, readFb);
1274 } else {
1275 _mesa_make_current(NULL, NULL, NULL);
1276 }
1277
1278 return true;
1279 }
1280
1281 void
1282 intel_resolve_for_dri2_flush(struct brw_context *brw,
1283 __DRIdrawable *drawable)
1284 {
1285 const struct gen_device_info *devinfo = &brw->screen->devinfo;
1286
1287 if (devinfo->gen < 6) {
1288 /* MSAA and fast color clear are not supported, so don't waste time
1289 * checking whether a resolve is needed.
1290 */
1291 return;
1292 }
1293
1294 struct gl_framebuffer *fb = drawable->driverPrivate;
1295 struct intel_renderbuffer *rb;
1296
1297 /* Usually, only the back buffer will need to be downsampled. However,
1298 * the front buffer will also need it if the user has rendered into it.
1299 */
1300 static const gl_buffer_index buffers[2] = {
1301 BUFFER_BACK_LEFT,
1302 BUFFER_FRONT_LEFT,
1303 };
1304
1305 for (int i = 0; i < 2; ++i) {
1306 rb = intel_get_renderbuffer(fb, buffers[i]);
1307 if (rb == NULL || rb->mt == NULL)
1308 continue;
1309 if (rb->mt->surf.samples == 1) {
1310 assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
1311 rb->layer_count == 1);
1312 intel_miptree_prepare_external(brw, rb->mt);
1313 } else {
1314 intel_renderbuffer_downsample(brw, rb);
1315
1316 /* Call prepare_external on the single-sample miptree to do any
1317 * needed resolves prior to handing it off to the window system.
1318 * This is needed in the case that rb->singlesample_mt is Y-tiled
1319 * with CCS_E enabled but without I915_FORMAT_MOD_Y_TILED_CCS_E. In
1320 * this case, the MSAA resolve above will write compressed data into
1321 * rb->singlesample_mt.
1322 *
1323 * TODO: Some day, if we decide to care about the tiny performance
1324 * hit we're taking by doing the MSAA resolve and then a CCS resolve,
1325 * we could detect this case and just allocate the single-sampled
1326 * miptree without aux. However, that would be a lot of plumbing and
1327 * this is a rather exotic case so it's not really worth it.
1328 */
1329 intel_miptree_prepare_external(brw, rb->singlesample_mt);
1330 }
1331 }
1332 }
1333
1334 static unsigned
1335 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
1336 {
1337 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
1338 }
1339
1340 static void
1341 intel_query_dri2_buffers(struct brw_context *brw,
1342 __DRIdrawable *drawable,
1343 __DRIbuffer **buffers,
1344 int *count);
1345
1346 static void
1347 intel_process_dri2_buffer(struct brw_context *brw,
1348 __DRIdrawable *drawable,
1349 __DRIbuffer *buffer,
1350 struct intel_renderbuffer *rb,
1351 const char *buffer_name);
1352
1353 static void
1354 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable);
1355
1356 static void
1357 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1358 {
1359 struct gl_framebuffer *fb = drawable->driverPrivate;
1360 struct intel_renderbuffer *rb;
1361 __DRIbuffer *buffers = NULL;
1362 int count;
1363 const char *region_name;
1364
1365 /* Set this up front, so that in case our buffers get invalidated
1366 * while we're getting new buffers, we don't clobber the stamp and
1367 * thus ignore the invalidate. */
1368 drawable->lastStamp = drawable->dri2.stamp;
1369
1370 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1371 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1372
1373 intel_query_dri2_buffers(brw, drawable, &buffers, &count);
1374
1375 if (buffers == NULL)
1376 return;
1377
1378 for (int i = 0; i < count; i++) {
1379 switch (buffers[i].attachment) {
1380 case __DRI_BUFFER_FRONT_LEFT:
1381 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1382 region_name = "dri2 front buffer";
1383 break;
1384
1385 case __DRI_BUFFER_FAKE_FRONT_LEFT:
1386 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1387 region_name = "dri2 fake front buffer";
1388 break;
1389
1390 case __DRI_BUFFER_BACK_LEFT:
1391 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1392 region_name = "dri2 back buffer";
1393 break;
1394
1395 case __DRI_BUFFER_DEPTH:
1396 case __DRI_BUFFER_HIZ:
1397 case __DRI_BUFFER_DEPTH_STENCIL:
1398 case __DRI_BUFFER_STENCIL:
1399 case __DRI_BUFFER_ACCUM:
1400 default:
1401 fprintf(stderr,
1402 "unhandled buffer attach event, attachment type %d\n",
1403 buffers[i].attachment);
1404 return;
1405 }
1406
1407 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name);
1408 }
1409
1410 }
1411
1412 void
1413 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
1414 {
1415 struct brw_context *brw = context->driverPrivate;
1416 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1417
1418 /* Set this up front, so that in case our buffers get invalidated
1419 * while we're getting new buffers, we don't clobber the stamp and
1420 * thus ignore the invalidate. */
1421 drawable->lastStamp = drawable->dri2.stamp;
1422
1423 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
1424 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
1425
1426 if (dri_screen->image.loader)
1427 intel_update_image_buffers(brw, drawable);
1428 else
1429 intel_update_dri2_buffers(brw, drawable);
1430
1431 driUpdateFramebufferSize(&brw->ctx, drawable);
1432 }
1433
1434 /**
1435 * intel_prepare_render should be called anywhere that curent read/drawbuffer
1436 * state is required.
1437 */
1438 void
1439 intel_prepare_render(struct brw_context *brw)
1440 {
1441 struct gl_context *ctx = &brw->ctx;
1442 __DRIcontext *driContext = brw->driContext;
1443 __DRIdrawable *drawable;
1444
1445 drawable = driContext->driDrawablePriv;
1446 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
1447 if (drawable->lastStamp != drawable->dri2.stamp)
1448 intel_update_renderbuffers(driContext, drawable);
1449 driContext->dri2.draw_stamp = drawable->dri2.stamp;
1450 }
1451
1452 drawable = driContext->driReadablePriv;
1453 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
1454 if (drawable->lastStamp != drawable->dri2.stamp)
1455 intel_update_renderbuffers(driContext, drawable);
1456 driContext->dri2.read_stamp = drawable->dri2.stamp;
1457 }
1458
1459 /* If we're currently rendering to the front buffer, the rendering
1460 * that will happen next will probably dirty the front buffer. So
1461 * mark it as dirty here.
1462 */
1463 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
1464 brw->front_buffer_dirty = true;
1465 }
1466
1467 /**
1468 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1469 *
1470 * To determine which DRI buffers to request, examine the renderbuffers
1471 * attached to the drawable's framebuffer. Then request the buffers with
1472 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1473 *
1474 * This is called from intel_update_renderbuffers().
1475 *
1476 * \param drawable Drawable whose buffers are queried.
1477 * \param buffers [out] List of buffers returned by DRI2 query.
1478 * \param buffer_count [out] Number of buffers returned.
1479 *
1480 * \see intel_update_renderbuffers()
1481 * \see DRI2GetBuffers()
1482 * \see DRI2GetBuffersWithFormat()
1483 */
1484 static void
1485 intel_query_dri2_buffers(struct brw_context *brw,
1486 __DRIdrawable *drawable,
1487 __DRIbuffer **buffers,
1488 int *buffer_count)
1489 {
1490 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1491 struct gl_framebuffer *fb = drawable->driverPrivate;
1492 int i = 0;
1493 unsigned attachments[8];
1494
1495 struct intel_renderbuffer *front_rb;
1496 struct intel_renderbuffer *back_rb;
1497
1498 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1499 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1500
1501 memset(attachments, 0, sizeof(attachments));
1502 if ((_mesa_is_front_buffer_drawing(fb) ||
1503 _mesa_is_front_buffer_reading(fb) ||
1504 !back_rb) && front_rb) {
1505 /* If a fake front buffer is in use, then querying for
1506 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
1507 * the real front buffer to the fake front buffer. So before doing the
1508 * query, we need to make sure all the pending drawing has landed in the
1509 * real front buffer.
1510 */
1511 intel_batchbuffer_flush(brw);
1512 intel_flush_front(&brw->ctx);
1513
1514 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1515 attachments[i++] = intel_bits_per_pixel(front_rb);
1516 } else if (front_rb && brw->front_buffer_dirty) {
1517 /* We have pending front buffer rendering, but we aren't querying for a
1518 * front buffer. If the front buffer we have is a fake front buffer,
1519 * the X server is going to throw it away when it processes the query.
1520 * So before doing the query, make sure all the pending drawing has
1521 * landed in the real front buffer.
1522 */
1523 intel_batchbuffer_flush(brw);
1524 intel_flush_front(&brw->ctx);
1525 }
1526
1527 if (back_rb) {
1528 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1529 attachments[i++] = intel_bits_per_pixel(back_rb);
1530 }
1531
1532 assert(i <= ARRAY_SIZE(attachments));
1533
1534 *buffers =
1535 dri_screen->dri2.loader->getBuffersWithFormat(drawable,
1536 &drawable->w,
1537 &drawable->h,
1538 attachments, i / 2,
1539 buffer_count,
1540 drawable->loaderPrivate);
1541 }
1542
1543 /**
1544 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1545 *
1546 * This is called from intel_update_renderbuffers().
1547 *
1548 * \par Note:
1549 * DRI buffers whose attachment point is DRI2BufferStencil or
1550 * DRI2BufferDepthStencil are handled as special cases.
1551 *
1552 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1553 * that is passed to brw_bo_gem_create_from_name().
1554 *
1555 * \see intel_update_renderbuffers()
1556 */
1557 static void
1558 intel_process_dri2_buffer(struct brw_context *brw,
1559 __DRIdrawable *drawable,
1560 __DRIbuffer *buffer,
1561 struct intel_renderbuffer *rb,
1562 const char *buffer_name)
1563 {
1564 struct gl_framebuffer *fb = drawable->driverPrivate;
1565 struct brw_bo *bo;
1566
1567 if (!rb)
1568 return;
1569
1570 unsigned num_samples = rb->Base.Base.NumSamples;
1571
1572 /* We try to avoid closing and reopening the same BO name, because the first
1573 * use of a mapping of the buffer involves a bunch of page faulting which is
1574 * moderately expensive.
1575 */
1576 struct intel_mipmap_tree *last_mt;
1577 if (num_samples == 0)
1578 last_mt = rb->mt;
1579 else
1580 last_mt = rb->singlesample_mt;
1581
1582 uint32_t old_name = 0;
1583 if (last_mt) {
1584 /* The bo already has a name because the miptree was created by a
1585 * previous call to intel_process_dri2_buffer(). If a bo already has a
1586 * name, then brw_bo_flink() is a low-cost getter. It does not
1587 * create a new name.
1588 */
1589 brw_bo_flink(last_mt->bo, &old_name);
1590 }
1591
1592 if (old_name == buffer->name)
1593 return;
1594
1595 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1596 fprintf(stderr,
1597 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1598 buffer->name, buffer->attachment,
1599 buffer->cpp, buffer->pitch);
1600 }
1601
1602 bo = brw_bo_gem_create_from_name(brw->bufmgr, buffer_name,
1603 buffer->name);
1604 if (!bo) {
1605 fprintf(stderr,
1606 "Failed to open BO for returned DRI2 buffer "
1607 "(%dx%d, %s, named %d).\n"
1608 "This is likely a bug in the X Server that will lead to a "
1609 "crash soon.\n",
1610 drawable->w, drawable->h, buffer_name, buffer->name);
1611 return;
1612 }
1613
1614 uint32_t tiling, swizzle;
1615 brw_bo_get_tiling(bo, &tiling, &swizzle);
1616
1617 struct intel_mipmap_tree *mt =
1618 intel_miptree_create_for_bo(brw,
1619 bo,
1620 intel_rb_format(rb),
1621 0,
1622 drawable->w,
1623 drawable->h,
1624 1,
1625 buffer->pitch,
1626 isl_tiling_from_i915_tiling(tiling),
1627 MIPTREE_CREATE_DEFAULT);
1628 if (!mt) {
1629 brw_bo_unreference(bo);
1630 return;
1631 }
1632
1633 /* We got this BO from X11. We cana't assume that we have coherent texture
1634 * access because X may suddenly decide to use it for scan-out which would
1635 * destroy coherency.
1636 */
1637 bo->cache_coherent = false;
1638
1639 if (!intel_update_winsys_renderbuffer_miptree(brw, rb, mt,
1640 drawable->w, drawable->h,
1641 buffer->pitch)) {
1642 brw_bo_unreference(bo);
1643 intel_miptree_release(&mt);
1644 return;
1645 }
1646
1647 if (_mesa_is_front_buffer_drawing(fb) &&
1648 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
1649 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
1650 rb->Base.Base.NumSamples > 1) {
1651 intel_renderbuffer_upsample(brw, rb);
1652 }
1653
1654 assert(rb->mt);
1655
1656 brw_bo_unreference(bo);
1657 }
1658
1659 /**
1660 * \brief Query DRI image loader to obtain a DRIdrawable's buffers.
1661 *
1662 * To determine which DRI buffers to request, examine the renderbuffers
1663 * attached to the drawable's framebuffer. Then request the buffers from
1664 * the image loader
1665 *
1666 * This is called from intel_update_renderbuffers().
1667 *
1668 * \param drawable Drawable whose buffers are queried.
1669 * \param buffers [out] List of buffers returned by DRI2 query.
1670 * \param buffer_count [out] Number of buffers returned.
1671 *
1672 * \see intel_update_renderbuffers()
1673 */
1674
1675 static void
1676 intel_update_image_buffer(struct brw_context *intel,
1677 __DRIdrawable *drawable,
1678 struct intel_renderbuffer *rb,
1679 __DRIimage *buffer,
1680 enum __DRIimageBufferMask buffer_type)
1681 {
1682 struct gl_framebuffer *fb = drawable->driverPrivate;
1683
1684 if (!rb || !buffer->bo)
1685 return;
1686
1687 unsigned num_samples = rb->Base.Base.NumSamples;
1688
1689 /* Check and see if we're already bound to the right
1690 * buffer object
1691 */
1692 struct intel_mipmap_tree *last_mt;
1693 if (num_samples == 0)
1694 last_mt = rb->mt;
1695 else
1696 last_mt = rb->singlesample_mt;
1697
1698 if (last_mt && last_mt->bo == buffer->bo)
1699 return;
1700
1701 struct intel_mipmap_tree *mt =
1702 intel_miptree_create_for_dri_image(intel, buffer, GL_TEXTURE_2D,
1703 intel_rb_format(rb), true);
1704 if (!mt)
1705 return;
1706
1707 if (!intel_update_winsys_renderbuffer_miptree(intel, rb, mt,
1708 buffer->width, buffer->height,
1709 buffer->pitch)) {
1710 intel_miptree_release(&mt);
1711 return;
1712 }
1713
1714 if (_mesa_is_front_buffer_drawing(fb) &&
1715 buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
1716 rb->Base.Base.NumSamples > 1) {
1717 intel_renderbuffer_upsample(intel, rb);
1718 }
1719 }
1720
1721 static void
1722 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable)
1723 {
1724 struct gl_framebuffer *fb = drawable->driverPrivate;
1725 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
1726 struct intel_renderbuffer *front_rb;
1727 struct intel_renderbuffer *back_rb;
1728 struct __DRIimageList images;
1729 mesa_format format;
1730 uint32_t buffer_mask = 0;
1731 int ret;
1732
1733 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1734 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1735
1736 if (back_rb)
1737 format = intel_rb_format(back_rb);
1738 else if (front_rb)
1739 format = intel_rb_format(front_rb);
1740 else
1741 return;
1742
1743 if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
1744 _mesa_is_front_buffer_reading(fb) || !back_rb)) {
1745 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
1746 }
1747
1748 if (back_rb)
1749 buffer_mask |= __DRI_IMAGE_BUFFER_BACK;
1750
1751 ret = dri_screen->image.loader->getBuffers(drawable,
1752 driGLFormatToImageFormat(format),
1753 &drawable->dri2.stamp,
1754 drawable->loaderPrivate,
1755 buffer_mask,
1756 &images);
1757 if (!ret)
1758 return;
1759
1760 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) {
1761 drawable->w = images.front->width;
1762 drawable->h = images.front->height;
1763 intel_update_image_buffer(brw,
1764 drawable,
1765 front_rb,
1766 images.front,
1767 __DRI_IMAGE_BUFFER_FRONT);
1768 }
1769
1770 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
1771 drawable->w = images.back->width;
1772 drawable->h = images.back->height;
1773 intel_update_image_buffer(brw,
1774 drawable,
1775 back_rb,
1776 images.back,
1777 __DRI_IMAGE_BUFFER_BACK);
1778 }
1779 }