src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/imports.h"
  34 #include "main/api_noop.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "brw_context.h"
  38 #include "brw_defines.h"
  39 #include "brw_draw.h"
  40 #include "brw_state.h"
  41 #include "intel_span.h"
  42 #include "tnl/t_pipeline.h"
  43
  44 /***************************************
  45  * Mesa's Driver Functions
  46  ***************************************/
  47
  48 static void brwInitDriverFunctions( struct dd_function_table *functions )
  49 {
  50    intelInitDriverFunctions( functions );
  51
  52    brwInitFragProgFuncs( functions );
  53    brw_init_queryobj_functions(functions);
  54 }
  55
  56 GLboolean brwCreateContext( int api,
  57                             const struct gl_config *mesaVis,
  58                             __DRIcontext *driContextPriv,
  59                             void *sharedContextPrivate)
  60 {
  61    struct dd_function_table functions;
  62    struct brw_context *brw = (struct brw_context *) CALLOC_STRUCT(brw_context);
  63    struct intel_context *intel = &brw->intel;
  64    struct gl_context *ctx = &intel->ctx;
  65    unsigned i;
  66
  67    if (!brw) {
  68       printf("%s: failed to alloc context\n", __FUNCTION__);
  69       return GL_FALSE;
  70    }
  71
  72    brwInitVtbl( brw );
  73    brwInitDriverFunctions( &functions );
  74
  75    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
  76                           sharedContextPrivate, &functions )) {
  77       printf("%s: failed to init intel context\n", __FUNCTION__);
  78       FREE(brw);
  79       return GL_FALSE;
  80    }
  81
  82    /* Initialize swrast, tnl driver tables: */
  83    intelInitSpanFuncs(ctx);
  84
  85    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
  86
  87    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
  88    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
  89    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
  90    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
  91                                      ctx->Const.MaxTextureImageUnits);
  92    ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
  93    ctx->Const.MaxCombinedTextureImageUnits =
  94       ctx->Const.MaxVertexTextureImageUnits +
  95       ctx->Const.MaxTextureImageUnits;
  96
  97    /* Mesa limits textures to 4kx4k; it would be nice to fix that someday
  98     */
  99    ctx->Const.MaxTextureLevels = 13;
 100    ctx->Const.Max3DTextureLevels = 9;
 101    ctx->Const.MaxCubeTextureLevels = 12;
 102    ctx->Const.MaxTextureRectSize = (1<<12);
 103
 104    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 105
 106    /* if conformance mode is set, swrast can handle any size AA point */
 107    ctx->Const.MaxPointSizeAA = 255.0;
 108
 109    /* We want the GLSL compiler to emit code that uses condition codes */
 110    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 111       ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
 112       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = GL_TRUE;
 113       ctx->ShaderCompilerOptions[i].EmitNoNoise = GL_TRUE;
 114       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = GL_TRUE;
 115       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = GL_TRUE;
 116       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = GL_TRUE;
 117
 118       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 119          (i == MESA_SHADER_FRAGMENT);
 120       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 121          (i == MESA_SHADER_FRAGMENT);
 122    }
 123
 124    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 125    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 126    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 127    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 128    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 129    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 130    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 131    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 132    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 133    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 134    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 135    ctx->Const.VertexProgram.MaxEnvParams =
 136       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 137            ctx->Const.VertexProgram.MaxEnvParams);
 138
 139    ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
 140    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
 141    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
 142    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
 143    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 144    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 145    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 146    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 147    ctx->Const.FragmentProgram.MaxEnvParams =
 148       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 149            ctx->Const.FragmentProgram.MaxEnvParams);
 150
 151    /* Fragment shaders use real, 32-bit twos-complement integers for all
 152     * integer types.
 153     */
 154    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 155    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 156    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 157    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 158       = ctx->Const.FragmentProgram.LowInt;
 159
 160    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 161       but we're not sure how it's actually done for vertex order,
 162       that affect provoking vertex decision. Always use last vertex
 163       convention for quad primitive which works as expected for now. */
 164    if (intel->gen == 6)
 165        ctx->Const.QuadsFollowProvokingVertexConvention = GL_FALSE;
 166
 167    if (intel->is_g4x || intel->gen >= 5) {
 168       brw->CMD_VF_STATISTICS = CMD_VF_STATISTICS_GM45;
 169       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 170       brw->has_surface_tile_offset = GL_TRUE;
 171       if (intel->gen < 6)
 172           brw->has_compr4 = GL_TRUE;
 173       brw->has_aa_line_parameters = GL_TRUE;
 174       brw->has_pln = GL_TRUE;
 175   } else {
 176       brw->CMD_VF_STATISTICS = CMD_VF_STATISTICS_965;
 177       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 178    }
 179
 180    /* WM maximum threads is number of EUs times number of threads per EU. */
 181    if (intel->gen >= 7) {
 182       if (IS_IVB_GT1(intel->intelScreen->deviceID)) {
 183          brw->wm_max_threads = 86;
 184          brw->vs_max_threads = 36;
 185          brw->urb.size = 128;
 186          brw->urb.max_vs_entries = 512;
 187          brw->urb.max_gs_entries = 192;
 188       } else if (IS_IVB_GT2(intel->intelScreen->deviceID)) {
 189          brw->wm_max_threads = 86;
 190          brw->vs_max_threads = 128;
 191          brw->urb.size = 256;
 192          brw->urb.max_vs_entries = 704;
 193          brw->urb.max_gs_entries = 320;
 194       } else {
 195          assert(!"Unknown gen7 device.");
 196       }
 197    } else if (intel->gen == 6) {
 198       if (IS_GT2(intel->intelScreen->deviceID)) {
 199          /* This could possibly be 80, but is supposed to require
 200           * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 201           * GPU reset to change.
 202           */
 203          brw->wm_max_threads = 40;
 204          brw->vs_max_threads = 60;
 205          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 206          brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
 207       } else {
 208          brw->wm_max_threads = 40;
 209          brw->vs_max_threads = 24;
 210          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 211          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 212       }
 213    } else if (intel->gen == 5) {
 214       brw->urb.size = 1024;
 215       brw->vs_max_threads = 72;
 216       brw->wm_max_threads = 12 * 6;
 217    } else if (intel->is_g4x) {
 218       brw->urb.size = 384;
 219       brw->vs_max_threads = 32;
 220       brw->wm_max_threads = 10 * 5;
 221    } else if (intel->gen < 6) {
 222       brw->urb.size = 256;
 223       brw->vs_max_threads = 16;
 224       brw->wm_max_threads = 8 * 4;
 225       brw->has_negative_rhw_bug = GL_TRUE;
 226    }
 227
 228    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) {
 229       brw->vs_max_threads = 1;
 230       brw->wm_max_threads = 1;
 231    }
 232
 233    brw_init_state( brw );
 234
 235    brw->curbe.last_buf = calloc(1, 4096);
 236    brw->curbe.next_buf = calloc(1, 4096);
 237
 238    brw->state.dirty.mesa = ~0;
 239    brw->state.dirty.brw = ~0;
 240
 241    brw->emit_state_always = 0;
 242
 243    ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 244    ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 245
 246    brw_draw_init( brw );
 247
 248    return GL_TRUE;
 249 }
 250