2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
37 #include "main/macros.h"
38 #include "main/mtypes.h"
39 #include "main/errors.h"
41 #include "brw_structs.h"
42 #include "brw_pipe_control.h"
43 #include "compiler/brw_compiler.h"
46 #include "blorp/blorp.h"
48 #include <brw_bufmgr.h>
50 #include "common/gen_debug.h"
51 #include "common/gen_decoder.h"
52 #include "intel_screen.h"
53 #include "intel_tex_obj.h"
60 * URB - uniform resource buffer. A mid-sized buffer which is
61 * partitioned between the fixed function units and used for passing
62 * values (vertices, primitives, constants) between them.
64 * CURBE - constant URB entry. An urb region (entry) used to hold
65 * constant values which the fixed function units can be instructed to
66 * preload into the GRF when spawning a thread.
68 * VUE - vertex URB entry. An urb entry holding a vertex and usually
69 * a vertex header. The header contains control information and
70 * things like primitive type, Begin/end flags and clip codes.
72 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
73 * unit holding rasterization and interpolation parameters.
75 * GRF - general register file. One of several register files
76 * addressable by programmed threads. The inputs (r0, payload, curbe,
77 * urb) of the thread are preloaded to this area before the thread is
78 * spawned. The registers are individually 8 dwords wide and suitable
79 * for general usage. Registers holding thread input values are not
80 * special and may be overwritten.
82 * MRF - message register file. Threads communicate (and terminate)
83 * by sending messages. Message parameters are placed in contiguous
84 * MRF registers. All program output is via these messages. URB
85 * entries are populated by sending a message to the shared URB
86 * function containing the new data, together with a control word,
87 * often an unmodified copy of R0.
89 * R0 - GRF register 0. Typically holds control information used when
90 * sending messages to other threads.
92 * EU or GEN4 EU: The name of the programmable subsystem of the
93 * i965 hardware. Threads are executed by the EU, the registers
94 * described above are part of the EU architecture.
96 * Fixed function units:
98 * CS - Command streamer. Notional first unit, little software
99 * interaction. Holds the URB entries used for constant data, ie the
102 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
103 * this unit is responsible for pulling vertices out of vertex buffers
104 * in vram and injecting them into the processing pipe as VUEs. If
105 * enabled, it first passes them to a VS thread which is a good place
106 * for the driver to implement any active vertex shader.
108 * HS - Hull Shader (Tessellation Control Shader)
110 * TE - Tessellation Engine (Tessellation Primitive Generation)
112 * DS - Domain Shader (Tessellation Evaluation Shader)
114 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
115 * enabled, incoming strips etc are passed to GS threads in individual
116 * line/triangle/point units. The GS thread may perform arbitary
117 * computation and emit whatever primtives with whatever vertices it
118 * chooses. This makes GS an excellent place to implement GL's
119 * unfilled polygon modes, though of course it is capable of much
120 * more. Additionally, GS is used to translate away primitives not
121 * handled by latter units, including Quads and Lineloops.
123 * CS - Clipper. Mesa's clipping algorithms are imported to run on
124 * this unit. The fixed function part performs cliptesting against
125 * the 6 fixed clipplanes and makes descisions on whether or not the
126 * incoming primitive needs to be passed to a thread for clipping.
127 * User clip planes are handled via cooperation with the VS thread.
129 * SF - Strips Fans or Setup: Triangles are prepared for
130 * rasterization. Interpolation coefficients are calculated.
131 * Flatshading and two-side lighting usually performed here.
133 * WM - Windower. Interpolation of vertex attributes performed here.
134 * Fragment shader implemented here. SIMD aspects of EU taken full
135 * advantage of, as pixels are processed in blocks of 16.
137 * CC - Color Calculator. No EU threads associated with this unit.
138 * Handles blending and (presumably) depth and stencil testing.
143 struct brw_vs_prog_key
;
144 struct brw_vue_prog_key
;
145 struct brw_wm_prog_key
;
146 struct brw_wm_prog_data
;
147 struct brw_cs_prog_key
;
148 struct brw_cs_prog_data
;
152 BRW_COMPUTE_PIPELINE
,
159 BRW_CACHE_BLORP_PROG
,
162 BRW_CACHE_FF_GS_PROG
,
173 /* brw_cache_ids must come first - see brw_program_cache.c */
174 BRW_STATE_URB_FENCE
= BRW_MAX_CACHE
,
175 BRW_STATE_FRAGMENT_PROGRAM
,
176 BRW_STATE_GEOMETRY_PROGRAM
,
177 BRW_STATE_TESS_PROGRAMS
,
178 BRW_STATE_VERTEX_PROGRAM
,
179 BRW_STATE_REDUCED_PRIMITIVE
,
180 BRW_STATE_PATCH_PRIMITIVE
,
185 BRW_STATE_BINDING_TABLE_POINTERS
,
188 BRW_STATE_DEFAULT_TESS_LEVELS
,
190 BRW_STATE_INDEX_BUFFER
,
191 BRW_STATE_VS_CONSTBUF
,
192 BRW_STATE_TCS_CONSTBUF
,
193 BRW_STATE_TES_CONSTBUF
,
194 BRW_STATE_GS_CONSTBUF
,
195 BRW_STATE_PROGRAM_CACHE
,
196 BRW_STATE_STATE_BASE_ADDRESS
,
197 BRW_STATE_VUE_MAP_GEOM_OUT
,
198 BRW_STATE_TRANSFORM_FEEDBACK
,
199 BRW_STATE_RASTERIZER_DISCARD
,
201 BRW_STATE_UNIFORM_BUFFER
,
202 BRW_STATE_IMAGE_UNITS
,
203 BRW_STATE_META_IN_PROGRESS
,
204 BRW_STATE_PUSH_CONSTANT_ALLOCATION
,
205 BRW_STATE_NUM_SAMPLES
,
206 BRW_STATE_TEXTURE_BUFFER
,
207 BRW_STATE_GEN4_UNIT_STATE
,
211 BRW_STATE_SAMPLER_STATE_TABLE
,
212 BRW_STATE_VS_ATTRIB_WORKAROUNDS
,
213 BRW_STATE_COMPUTE_PROGRAM
,
214 BRW_STATE_CS_WORK_GROUPS
,
218 BRW_STATE_VIEWPORT_COUNT
,
219 BRW_STATE_CONSERVATIVE_RASTERIZATION
,
226 * BRW_NEW_*_PROG_DATA and BRW_NEW_*_PROGRAM are similar, but distinct.
228 * BRW_NEW_*_PROGRAM relates to the gl_shader_program/gl_program structures.
229 * When the currently bound shader program differs from the previous draw
230 * call, these will be flagged. They cover brw->{stage}_program and
231 * ctx->{Stage}Program->_Current.
233 * BRW_NEW_*_PROG_DATA is flagged when the effective shaders change, from a
234 * driver perspective. Even if the same shader is bound at the API level,
235 * we may need to switch between multiple versions of that shader to handle
236 * changes in non-orthagonal state.
238 * Additionally, multiple shader programs may have identical vertex shaders
239 * (for example), or compile down to the same code in the backend. We combine
240 * those into a single program cache entry.
242 * BRW_NEW_*_PROG_DATA occurs when switching program cache entries, which
243 * covers the brw_*_prog_data structures, and brw->*.prog_offset.
245 #define BRW_NEW_FS_PROG_DATA (1ull << BRW_CACHE_FS_PROG)
246 /* XXX: The BRW_NEW_BLORP_BLIT_PROG_DATA dirty bit is unused (as BLORP doesn't
247 * use the normal state upload paths), but the cache is still used. To avoid
248 * polluting the brw_program_cache code with special cases, we retain the
249 * dirty bit for now. It should eventually be removed.
251 #define BRW_NEW_BLORP_BLIT_PROG_DATA (1ull << BRW_CACHE_BLORP_PROG)
252 #define BRW_NEW_SF_PROG_DATA (1ull << BRW_CACHE_SF_PROG)
253 #define BRW_NEW_VS_PROG_DATA (1ull << BRW_CACHE_VS_PROG)
254 #define BRW_NEW_FF_GS_PROG_DATA (1ull << BRW_CACHE_FF_GS_PROG)
255 #define BRW_NEW_GS_PROG_DATA (1ull << BRW_CACHE_GS_PROG)
256 #define BRW_NEW_TCS_PROG_DATA (1ull << BRW_CACHE_TCS_PROG)
257 #define BRW_NEW_TES_PROG_DATA (1ull << BRW_CACHE_TES_PROG)
258 #define BRW_NEW_CLIP_PROG_DATA (1ull << BRW_CACHE_CLIP_PROG)
259 #define BRW_NEW_CS_PROG_DATA (1ull << BRW_CACHE_CS_PROG)
260 #define BRW_NEW_URB_FENCE (1ull << BRW_STATE_URB_FENCE)
261 #define BRW_NEW_FRAGMENT_PROGRAM (1ull << BRW_STATE_FRAGMENT_PROGRAM)
262 #define BRW_NEW_GEOMETRY_PROGRAM (1ull << BRW_STATE_GEOMETRY_PROGRAM)
263 #define BRW_NEW_TESS_PROGRAMS (1ull << BRW_STATE_TESS_PROGRAMS)
264 #define BRW_NEW_VERTEX_PROGRAM (1ull << BRW_STATE_VERTEX_PROGRAM)
265 #define BRW_NEW_REDUCED_PRIMITIVE (1ull << BRW_STATE_REDUCED_PRIMITIVE)
266 #define BRW_NEW_PATCH_PRIMITIVE (1ull << BRW_STATE_PATCH_PRIMITIVE)
267 #define BRW_NEW_PRIMITIVE (1ull << BRW_STATE_PRIMITIVE)
268 #define BRW_NEW_CONTEXT (1ull << BRW_STATE_CONTEXT)
269 #define BRW_NEW_PSP (1ull << BRW_STATE_PSP)
270 #define BRW_NEW_SURFACES (1ull << BRW_STATE_SURFACES)
271 #define BRW_NEW_BINDING_TABLE_POINTERS (1ull << BRW_STATE_BINDING_TABLE_POINTERS)
272 #define BRW_NEW_INDICES (1ull << BRW_STATE_INDICES)
273 #define BRW_NEW_VERTICES (1ull << BRW_STATE_VERTICES)
274 #define BRW_NEW_DEFAULT_TESS_LEVELS (1ull << BRW_STATE_DEFAULT_TESS_LEVELS)
276 * Used for any batch entry with a relocated pointer that will be used
277 * by any 3D rendering.
279 #define BRW_NEW_BATCH (1ull << BRW_STATE_BATCH)
280 /** \see brw.state.depth_region */
281 #define BRW_NEW_INDEX_BUFFER (1ull << BRW_STATE_INDEX_BUFFER)
282 #define BRW_NEW_VS_CONSTBUF (1ull << BRW_STATE_VS_CONSTBUF)
283 #define BRW_NEW_TCS_CONSTBUF (1ull << BRW_STATE_TCS_CONSTBUF)
284 #define BRW_NEW_TES_CONSTBUF (1ull << BRW_STATE_TES_CONSTBUF)
285 #define BRW_NEW_GS_CONSTBUF (1ull << BRW_STATE_GS_CONSTBUF)
286 #define BRW_NEW_PROGRAM_CACHE (1ull << BRW_STATE_PROGRAM_CACHE)
287 #define BRW_NEW_STATE_BASE_ADDRESS (1ull << BRW_STATE_STATE_BASE_ADDRESS)
288 #define BRW_NEW_VUE_MAP_GEOM_OUT (1ull << BRW_STATE_VUE_MAP_GEOM_OUT)
289 #define BRW_NEW_VIEWPORT_COUNT (1ull << BRW_STATE_VIEWPORT_COUNT)
290 #define BRW_NEW_TRANSFORM_FEEDBACK (1ull << BRW_STATE_TRANSFORM_FEEDBACK)
291 #define BRW_NEW_RASTERIZER_DISCARD (1ull << BRW_STATE_RASTERIZER_DISCARD)
292 #define BRW_NEW_STATS_WM (1ull << BRW_STATE_STATS_WM)
293 #define BRW_NEW_UNIFORM_BUFFER (1ull << BRW_STATE_UNIFORM_BUFFER)
294 #define BRW_NEW_IMAGE_UNITS (1ull << BRW_STATE_IMAGE_UNITS)
295 #define BRW_NEW_META_IN_PROGRESS (1ull << BRW_STATE_META_IN_PROGRESS)
296 #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1ull << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
297 #define BRW_NEW_NUM_SAMPLES (1ull << BRW_STATE_NUM_SAMPLES)
298 #define BRW_NEW_TEXTURE_BUFFER (1ull << BRW_STATE_TEXTURE_BUFFER)
299 #define BRW_NEW_GEN4_UNIT_STATE (1ull << BRW_STATE_GEN4_UNIT_STATE)
300 #define BRW_NEW_CC_VP (1ull << BRW_STATE_CC_VP)
301 #define BRW_NEW_SF_VP (1ull << BRW_STATE_SF_VP)
302 #define BRW_NEW_CLIP_VP (1ull << BRW_STATE_CLIP_VP)
303 #define BRW_NEW_SAMPLER_STATE_TABLE (1ull << BRW_STATE_SAMPLER_STATE_TABLE)
304 #define BRW_NEW_VS_ATTRIB_WORKAROUNDS (1ull << BRW_STATE_VS_ATTRIB_WORKAROUNDS)
305 #define BRW_NEW_COMPUTE_PROGRAM (1ull << BRW_STATE_COMPUTE_PROGRAM)
306 #define BRW_NEW_CS_WORK_GROUPS (1ull << BRW_STATE_CS_WORK_GROUPS)
307 #define BRW_NEW_URB_SIZE (1ull << BRW_STATE_URB_SIZE)
308 #define BRW_NEW_CC_STATE (1ull << BRW_STATE_CC_STATE)
309 #define BRW_NEW_BLORP (1ull << BRW_STATE_BLORP)
310 #define BRW_NEW_CONSERVATIVE_RASTERIZATION (1ull << BRW_STATE_CONSERVATIVE_RASTERIZATION)
311 #define BRW_NEW_DRAW_CALL (1ull << BRW_STATE_DRAW_CALL)
312 #define BRW_NEW_AUX_STATE (1ull << BRW_STATE_AUX)
314 struct brw_state_flags
{
315 /** State update flags signalled by mesa internals */
318 * State update flags signalled as the result of brw_tracked_state updates
324 /** Subclass of Mesa program */
326 struct gl_program program
;
333 struct brw_ff_gs_prog_data
{
334 GLuint urb_read_length
;
338 * Gen6 transform feedback: Amount by which the streaming vertex buffer
339 * indices should be incremented each time the GS is invoked.
341 unsigned svbi_postincrement_value
;
344 /** Number of texture sampler units */
345 #define BRW_MAX_TEX_UNIT 32
347 /** Max number of UBOs in a shader */
348 #define BRW_MAX_UBO 14
350 /** Max number of SSBOs in a shader */
351 #define BRW_MAX_SSBO 12
353 /** Max number of atomic counter buffer objects in a shader */
354 #define BRW_MAX_ABO 16
356 /** Max number of image uniforms in a shader */
357 #define BRW_MAX_IMAGES 32
359 /** Maximum number of actual buffers used for stream output */
360 #define BRW_MAX_SOL_BUFFERS 4
362 #define BRW_MAX_SURFACES (BRW_MAX_DRAW_BUFFERS + \
363 BRW_MAX_TEX_UNIT * 2 + /* normal, gather */ \
368 2 + /* shader time, pull constants */ \
369 1 /* cs num work groups */)
372 struct brw_context
*brw
;
374 struct brw_cache_item
**items
;
377 GLuint size
, n_items
;
379 uint32_t next_offset
;
382 #define perf_debug(...) do { \
383 static GLuint msg_id = 0; \
384 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
385 dbg_printf(__VA_ARGS__); \
386 if (brw->perf_debug) \
387 _mesa_gl_debug(&brw->ctx, &msg_id, \
388 MESA_DEBUG_SOURCE_API, \
389 MESA_DEBUG_TYPE_PERFORMANCE, \
390 MESA_DEBUG_SEVERITY_MEDIUM, \
394 #define WARN_ONCE(cond, fmt...) do { \
395 if (unlikely(cond)) { \
396 static bool _warned = false; \
397 static GLuint msg_id = 0; \
399 fprintf(stderr, "WARNING: "); \
400 fprintf(stderr, fmt); \
403 _mesa_gl_debug(ctx, &msg_id, \
404 MESA_DEBUG_SOURCE_API, \
405 MESA_DEBUG_TYPE_OTHER, \
406 MESA_DEBUG_SEVERITY_HIGH, fmt); \
411 /* Considered adding a member to this struct to document which flags
412 * an update might raise so that ordering of the state atoms can be
413 * checked or derived at runtime. Dropped the idea in favor of having
414 * a debug mode where the state is monitored for flags which are
415 * raised that have already been tested against.
417 struct brw_tracked_state
{
418 struct brw_state_flags dirty
;
419 void (*emit
)( struct brw_context
*brw
);
422 enum shader_time_shader_type
{
433 struct brw_vertex_buffer
{
434 /** Buffer object containing the uploaded vertex data */
438 /** Byte stride between elements in the uploaded array */
442 struct brw_vertex_element
{
443 const struct gl_vertex_array
*glarray
;
447 /** Offset of the first element within the buffer object */
451 struct brw_query_object
{
452 struct gl_query_object Base
;
454 /** Last query BO associated with this query. */
457 /** Last index in bo with query data for this object. */
460 /** True if we know the batch has been flushed since we ended the query. */
470 struct brw_reloc_list
{
471 struct drm_i915_gem_relocation_entry
*relocs
;
473 int reloc_array_size
;
476 struct brw_growing_bo
{
479 struct brw_bo
*partial_bo
;
480 uint32_t *partial_bo_map
;
481 unsigned partial_bytes
;
484 struct intel_batchbuffer
{
485 /** Current batchbuffer being queued up. */
486 struct brw_growing_bo batch
;
487 /** Current statebuffer being queued up. */
488 struct brw_growing_bo state
;
490 /** Last batchbuffer submitted to the hardware. Used for glFinish(). */
491 struct brw_bo
*last_bo
;
494 uint16_t emit
, total
;
499 enum brw_gpu_ring ring
;
500 bool use_shadow_copy
;
501 bool use_batch_first
;
502 bool needs_sol_reset
;
503 bool state_base_address_emitted
;
506 struct brw_reloc_list batch_relocs
;
507 struct brw_reloc_list state_relocs
;
508 unsigned int valid_reloc_flags
;
510 /** The validation list */
511 struct drm_i915_gem_exec_object2
*validation_list
;
512 struct brw_bo
**exec_bos
;
516 /** The amount of aperture space (in bytes) used by all exec_bos */
521 int batch_reloc_count
;
522 int state_reloc_count
;
526 /** Map from batch offset to brw_state_batch data (with DEBUG_BATCH) */
527 struct hash_table
*state_batch_sizes
;
529 struct gen_batch_decode_ctx decoder
;
532 #define BRW_MAX_XFB_STREAMS 4
534 struct brw_transform_feedback_counter
{
536 * Index of the first entry of this counter within the primitive count BO.
537 * An entry is considered to be an N-tuple of 64bit values, where N is the
538 * number of vertex streams supported by the platform.
543 * Index one past the last entry of this counter within the primitive
549 * Primitive count values accumulated while this counter was active,
550 * excluding any entries buffered between \c bo_start and \c bo_end, which
551 * haven't been accounted for yet.
553 uint64_t accum
[BRW_MAX_XFB_STREAMS
];
557 brw_reset_transform_feedback_counter(
558 struct brw_transform_feedback_counter
*counter
)
560 counter
->bo_start
= counter
->bo_end
;
561 memset(&counter
->accum
, 0, sizeof(counter
->accum
));
564 struct brw_transform_feedback_object
{
565 struct gl_transform_feedback_object base
;
567 /** A buffer to hold SO_WRITE_OFFSET(n) values while paused. */
568 struct brw_bo
*offset_bo
;
570 /** If true, SO_WRITE_OFFSET(n) should be reset to zero at next use. */
573 /** The most recent primitive mode (GL_TRIANGLES/GL_POINTS/GL_LINES). */
574 GLenum primitive_mode
;
577 * The maximum number of vertices that we can write without overflowing
578 * any of the buffers currently being used for transform feedback.
582 struct brw_bo
*prim_count_bo
;
585 * Count of primitives generated during this transform feedback operation.
587 struct brw_transform_feedback_counter counter
;
590 * Count of primitives generated during the previous transform feedback
591 * operation. Used to implement DrawTransformFeedback().
593 struct brw_transform_feedback_counter previous_counter
;
596 * Number of vertices written between last Begin/EndTransformFeedback().
598 * Used to implement DrawTransformFeedback().
600 uint64_t vertices_written
[BRW_MAX_XFB_STREAMS
];
601 bool vertices_written_valid
;
605 * Data shared between each programmable stage in the pipeline (vs, gs, and
608 struct brw_stage_state
610 gl_shader_stage stage
;
611 struct brw_stage_prog_data
*prog_data
;
614 * Optional scratch buffer used to store spilled register values and
615 * variably-indexed GRF arrays.
617 * The contents of this buffer are short-lived so the same memory can be
618 * re-used at will for multiple shader programs (executed by the same fixed
619 * function). However reusing a scratch BO for which shader invocations
620 * are still in flight with a per-thread scratch slot size other than the
621 * original can cause threads with different scratch slot size and FFTID
622 * (which may be executed in parallel depending on the shader stage and
623 * hardware generation) to map to an overlapping region of the scratch
624 * space, which can potentially lead to mutual scratch space corruption.
625 * For that reason if you borrow this scratch buffer you should only be
626 * using the slot size given by the \c per_thread_scratch member below,
627 * unless you're taking additional measures to synchronize thread execution
628 * across slot size changes.
630 struct brw_bo
*scratch_bo
;
633 * Scratch slot size allocated for each thread in the buffer object given
636 uint32_t per_thread_scratch
;
638 /** Offset in the program cache to the program */
639 uint32_t prog_offset
;
641 /** Offset in the batchbuffer to Gen4-5 pipelined state (VS/WM/GS_STATE). */
642 uint32_t state_offset
;
644 struct brw_bo
*push_const_bo
; /* NULL if using the batchbuffer */
645 uint32_t push_const_offset
; /* Offset in the push constant BO or batch */
646 int push_const_size
; /* in 256-bit register increments */
648 /* Binding table: pointers to SURFACE_STATE entries. */
649 uint32_t bind_bo_offset
;
650 uint32_t surf_offset
[BRW_MAX_SURFACES
];
652 /** SAMPLER_STATE count and table offset */
653 uint32_t sampler_count
;
654 uint32_t sampler_offset
;
656 struct brw_image_param image_param
[BRW_MAX_IMAGES
];
658 /** Need to re-emit 3DSTATE_CONSTANT_XS? */
659 bool push_constants_dirty
;
662 enum brw_predicate_state
{
663 /* The first two states are used if we can determine whether to draw
664 * without having to look at the values in the query object buffer. This
665 * will happen if there is no conditional render in progress, if the query
666 * object is already completed or if something else has already added
667 * samples to the preliminary result such as via a BLT command.
669 BRW_PREDICATE_STATE_RENDER
,
670 BRW_PREDICATE_STATE_DONT_RENDER
,
671 /* In this case whether to draw or not depends on the result of an
672 * MI_PREDICATE command so the predicate enable bit needs to be checked.
674 BRW_PREDICATE_STATE_USE_BIT
,
675 /* In this case, either MI_PREDICATE doesn't exist or we lack the
676 * necessary kernel features to use it. Stall for the query result.
678 BRW_PREDICATE_STATE_STALL_FOR_QUERY
,
683 struct gen_l3_config
;
685 enum brw_query_kind
{
691 struct brw_perf_query_register_prog
{
696 struct brw_perf_query_info
698 enum brw_query_kind kind
;
701 struct brw_perf_query_counter
*counters
;
706 uint64_t oa_metrics_set_id
;
709 /* For indexing into the accumulator[] ... */
711 int gpu_clock_offset
;
716 /* Register programming for a given query */
717 struct brw_perf_query_register_prog
*flex_regs
;
718 uint32_t n_flex_regs
;
720 struct brw_perf_query_register_prog
*mux_regs
;
723 struct brw_perf_query_register_prog
*b_counter_regs
;
724 uint32_t n_b_counter_regs
;
727 struct brw_uploader
{
728 struct brw_bufmgr
*bufmgr
;
731 uint32_t next_offset
;
732 unsigned default_size
;
736 * brw_context is derived from gl_context.
740 struct gl_context ctx
; /**< base class, must be first field */
745 * Emit an MI_REPORT_PERF_COUNT command packet.
747 * This asks the GPU to write a report of the current OA counter values
748 * into @bo at the given offset and containing the given @report_id
749 * which we can cross-reference when parsing the report (gen7+ only).
751 void (*emit_mi_report_perf_count
)(struct brw_context
*brw
,
753 uint32_t offset_in_bytes
,
757 struct brw_bufmgr
*bufmgr
;
761 /** BO for post-sync nonzero writes for gen6 workaround. */
762 struct brw_bo
*workaround_bo
;
763 uint8_t pipe_controls_since_last_cs_stall
;
766 * Set of struct brw_bo * that have been rendered to within this batchbuffer
767 * and would need flushing before being used from another cache domain that
768 * isn't coherent with it (i.e. the sampler).
770 struct hash_table
*render_cache
;
773 * Set of struct brw_bo * that have been used as a depth buffer within this
774 * batchbuffer and would need flushing before being used from another cache
775 * domain that isn't coherent with it (i.e. the sampler).
777 struct set
*depth_cache
;
780 * Number of resets observed in the system at context creation.
782 * This is tracked in the context so that we can determine that another
783 * reset has occurred.
785 uint32_t reset_count
;
787 struct intel_batchbuffer batch
;
789 struct brw_uploader upload
;
792 * Set if rendering has occurred to the drawable's front buffer.
794 * This is used in the DRI2 case to detect that glFlush should also copy
795 * the contents of the fake front buffer to the real front buffer.
797 bool front_buffer_dirty
;
799 /** Framerate throttling: @{ */
800 struct brw_bo
*throttle_batch
[2];
802 /* Limit the number of outstanding SwapBuffers by waiting for an earlier
803 * frame of rendering to complete. This gives a very precise cap to the
804 * latency between input and output such that rendering never gets more
805 * than a frame behind the user. (With the caveat that we technically are
806 * not using the SwapBuffers itself as a barrier but the first batch
807 * submitted afterwards, which may be immediately prior to the next
810 bool need_swap_throttle
;
812 /** General throttling, not caught by throttling between SwapBuffers */
813 bool need_flush_throttle
;
823 bool always_flush_batch
;
824 bool always_flush_cache
;
825 bool disable_throttling
;
827 bool dual_color_blend_by_location
;
829 driOptionCache optionCache
;
832 GLuint primitive
; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
834 GLenum reduced_primitive
;
837 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
838 * variable is set, this is the flag indicating to do expensive work that
839 * might lead to a perf_debug() call.
843 uint64_t max_gtt_map_object_size
;
846 bool has_separate_stencil
;
849 /** Derived stencil states. */
850 bool stencil_enabled
;
851 bool stencil_two_sided
;
852 bool stencil_write_enabled
;
853 /** Derived polygon state. */
854 bool polygon_front_bit
; /**< 0=GL_CCW, 1=GL_CW */
856 struct isl_device isl_dev
;
858 struct blorp_context blorp
;
862 struct brw_state_flags pipelines
[BRW_NUM_PIPELINES
];
865 enum brw_pipeline last_pipeline
;
867 struct brw_cache cache
;
869 /* Whether a meta-operation is in progress. */
870 bool meta_in_progress
;
872 /* Whether the last depth/stencil packets were both NULL. */
873 bool no_depth_or_stencil
;
875 /* The last PMA stall bits programmed. */
876 uint32_t pma_stall_bits
;
881 * Either the value of gl_BaseVertex for indexed draw calls or the
882 * value of the argument <first> for non-indexed draw calls for the
883 * current _mesa_prim.
887 /** The value of gl_BaseInstance for the current _mesa_prim. */
892 * Buffer and offset used for GL_ARB_shader_draw_parameters which will
893 * point to the indirect buffer for indirect draw calls.
895 struct brw_bo
*draw_params_bo
;
896 uint32_t draw_params_offset
;
900 * The value of gl_DrawID for the current _mesa_prim. This always comes
901 * in from it's own vertex buffer since it's not part of the indirect
907 * Stores if the current _mesa_prim is an indexed or non-indexed draw
908 * (~0/0). Useful to calculate gl_BaseVertex as an AND of firstvertex
909 * and is_indexed_draw.
915 * Buffer and offset used for GL_ARB_shader_draw_parameters which contains
916 * parameters that are not present in the indirect buffer. They will go in
917 * their own vertex element.
919 struct brw_bo
*derived_draw_params_bo
;
920 uint32_t derived_draw_params_offset
;
923 * Pointer to the the buffer storing the indirect draw parameters. It
924 * currently only stores the number of requested draw calls but more
925 * parameters could potentially be added.
927 struct brw_bo
*draw_params_count_bo
;
928 uint32_t draw_params_count_offset
;
933 * For gl_NumWorkGroups: If num_work_groups_bo is non NULL, then it is
934 * an indirect call, and num_work_groups_offset is valid. Otherwise,
935 * num_work_groups is set based on glDispatchCompute.
937 struct brw_bo
*num_work_groups_bo
;
938 GLintptr num_work_groups_offset
;
939 const GLuint
*num_work_groups
;
943 struct brw_vertex_element inputs
[VERT_ATTRIB_MAX
];
944 struct brw_vertex_buffer buffers
[VERT_ATTRIB_MAX
];
946 struct brw_vertex_element
*enabled
[VERT_ATTRIB_MAX
];
950 /* Summary of size and varying of active arrays, so we can check
951 * for changes to this state:
953 bool index_bounds_valid
;
954 unsigned int min_index
, max_index
;
956 /* Offset from start of vertex buffer so we can avoid redefining
957 * the same VB packed over and over again.
959 unsigned int start_vertex_bias
;
962 * Certain vertex attribute formats aren't natively handled by the
963 * hardware and require special VS code to fix up their values.
965 * These bitfields indicate which workarounds are needed.
967 uint8_t attrib_wa_flags
[VERT_ATTRIB_MAX
];
969 /* For the initial pushdown, keep the list of vbo inputs. */
970 struct vbo_inputs draw_arrays
;
975 * Index buffer for this draw_prims call.
977 * Updates are signaled by BRW_NEW_INDICES.
979 const struct _mesa_index_buffer
*ib
;
981 /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
986 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
987 * avoid re-uploading the IB packet over and over if we're actually
988 * referencing the same index buffer.
990 unsigned int start_vertex_offset
;
993 /* Active vertex program:
995 struct gl_program
*programs
[MESA_SHADER_STAGES
];
998 * Number of samples in ctx->DrawBuffer, updated by BRW_NEW_NUM_SAMPLES so
999 * that we don't have to reemit that state every time we change FBOs.
1001 unsigned int num_samples
;
1003 /* BRW_NEW_URB_ALLOCATIONS:
1006 GLuint vsize
; /* vertex size plus header in urb registers */
1007 GLuint gsize
; /* GS output size in urb registers */
1008 GLuint hsize
; /* Tessellation control output size in urb registers */
1009 GLuint dsize
; /* Tessellation evaluation output size in urb registers */
1010 GLuint csize
; /* constant buffer size in urb registers */
1011 GLuint sfsize
; /* setup data size in urb registers */
1015 GLuint nr_vs_entries
;
1016 GLuint nr_hs_entries
;
1017 GLuint nr_ds_entries
;
1018 GLuint nr_gs_entries
;
1019 GLuint nr_clip_entries
;
1020 GLuint nr_sf_entries
;
1021 GLuint nr_cs_entries
;
1031 * URB size in the current configuration. The units this is expressed
1032 * in are somewhat inconsistent, see gen_device_info::urb::size.
1034 * FINISHME: Represent the URB size consistently in KB on all platforms.
1038 /* True if the most recently sent _3DSTATE_URB message allocated
1039 * URB space for the GS.
1043 /* True if the most recently sent _3DSTATE_URB message allocated
1044 * URB space for the HS and DS.
1050 /* BRW_NEW_PUSH_CONSTANT_ALLOCATION */
1052 GLuint wm_start
; /**< pos of first wm const in CURBE buffer */
1053 GLuint wm_size
; /**< number of float[4] consts, multiple of 16 */
1061 * Pointer to the (intel_upload.c-generated) BO containing the uniforms
1062 * for upload to the CURBE.
1064 struct brw_bo
*curbe_bo
;
1065 /** Offset within curbe_bo of space for current curbe entry */
1066 GLuint curbe_offset
;
1070 * Layout of vertex data exiting the geometry portion of the pipleine.
1071 * This comes from the last enabled shader stage (GS, DS, or VS).
1073 * BRW_NEW_VUE_MAP_GEOM_OUT is flagged when the VUE map changes.
1075 struct brw_vue_map vue_map_geom_out
;
1078 struct brw_stage_state base
;
1082 struct brw_stage_state base
;
1086 struct brw_stage_state base
;
1090 struct brw_stage_state base
;
1093 * True if the 3DSTATE_GS command most recently emitted to the 3D
1094 * pipeline enabled the GS; false otherwise.
1100 struct brw_ff_gs_prog_data
*prog_data
;
1103 /** Offset in the program cache to the CLIP program pre-gen6 */
1104 uint32_t prog_offset
;
1105 uint32_t state_offset
;
1107 uint32_t bind_bo_offset
;
1109 * Surface offsets for the binding table. We only need surfaces to
1110 * implement transform feedback so BRW_MAX_SOL_BINDINGS is all that we
1111 * need in this case.
1113 uint32_t surf_offset
[BRW_MAX_SOL_BINDINGS
];
1117 struct brw_clip_prog_data
*prog_data
;
1119 /** Offset in the program cache to the CLIP program pre-gen6 */
1120 uint32_t prog_offset
;
1122 /* Offset in the batch to the CLIP state on pre-gen6. */
1123 uint32_t state_offset
;
1125 /* As of gen6, this is the offset in the batch to the CLIP VP,
1131 * The number of viewports to use. If gl_ViewportIndex is written,
1132 * we can have up to ctx->Const.MaxViewports viewports. If not,
1133 * the viewport index is always 0, so we can only emit one.
1135 uint8_t viewport_count
;
1140 struct brw_sf_prog_data
*prog_data
;
1142 /** Offset in the program cache to the CLIP program pre-gen6 */
1143 uint32_t prog_offset
;
1144 uint32_t state_offset
;
1149 struct brw_stage_state base
;
1152 * Buffer object used in place of multisampled null render targets on
1153 * Gen6. See brw_emit_null_surface_state().
1155 struct brw_bo
*multisampled_null_render_target_bo
;
1161 struct brw_stage_state base
;
1165 uint32_t state_offset
;
1166 uint32_t blend_state_offset
;
1167 uint32_t depth_stencil_state_offset
;
1172 struct brw_query_object
*obj
;
1177 enum brw_predicate_state state
;
1182 /* Variables referenced in the XML meta data for OA performance
1183 * counters, e.g in the normalization equations.
1185 * All uint64_t for consistent operand types in generated code
1188 uint64_t timestamp_frequency
; /** $GpuTimestampFrequency */
1189 uint64_t n_eus
; /** $EuCoresTotalCount */
1190 uint64_t n_eu_slices
; /** $EuSlicesTotalCount */
1191 uint64_t n_eu_sub_slices
; /** $EuSubslicesTotalCount */
1192 uint64_t eu_threads_count
; /** $EuThreadsCount */
1193 uint64_t slice_mask
; /** $SliceMask */
1194 uint64_t subslice_mask
; /** $SubsliceMask */
1195 uint64_t gt_min_freq
; /** $GpuMinFrequency */
1196 uint64_t gt_max_freq
; /** $GpuMaxFrequency */
1197 uint64_t revision
; /** $SkuRevisionId */
1200 /* OA metric sets, indexed by GUID, as know by Mesa at build time,
1201 * to cross-reference with the GUIDs of configs advertised by the
1204 struct hash_table
*oa_metrics_table
;
1206 /* Location of the device's sysfs entry. */
1207 char sysfs_dev_dir
[256];
1209 struct brw_perf_query_info
*queries
;
1212 /* The i915 perf stream we open to setup + enable the OA counters */
1215 /* An i915 perf stream fd gives exclusive access to the OA unit that will
1216 * report counter snapshots for a specific counter set/profile in a
1217 * specific layout/format so we can only start OA queries that are
1218 * compatible with the currently open fd...
1220 int current_oa_metrics_set_id
;
1221 int current_oa_format
;
1223 /* List of buffers containing OA reports */
1224 struct exec_list sample_buffers
;
1226 /* Cached list of empty sample buffers */
1227 struct exec_list free_sample_buffers
;
1229 int n_active_oa_queries
;
1230 int n_active_pipeline_stats_queries
;
1232 /* The number of queries depending on running OA counters which
1233 * extends beyond brw_end_perf_query() since we need to wait until
1234 * the last MI_RPC command has parsed by the GPU.
1236 * Accurate accounting is important here as emitting an
1237 * MI_REPORT_PERF_COUNT command while the OA unit is disabled will
1238 * effectively hang the gpu.
1242 /* To help catch an spurious problem with the hardware or perf
1243 * forwarding samples, we emit each MI_REPORT_PERF_COUNT command
1244 * with a unique ID that we can explicitly check for...
1246 int next_query_start_report_id
;
1249 * An array of queries whose results haven't yet been assembled
1250 * based on the data in buffer objects.
1252 * These may be active, or have already ended. However, the
1253 * results have not been requested.
1255 struct brw_perf_query_object
**unaccumulated
;
1256 int unaccumulated_elements
;
1257 int unaccumulated_array_size
;
1259 /* The total number of query objects so we can relinquish
1260 * our exclusive access to perf if the application deletes
1261 * all of its objects. (NB: We only disable perf while
1262 * there are no active queries)
1264 int n_query_instances
;
1267 int num_atoms
[BRW_NUM_PIPELINES
];
1268 const struct brw_tracked_state render_atoms
[76];
1269 const struct brw_tracked_state compute_atoms
[11];
1271 const enum isl_format
*mesa_to_isl_render_format
;
1272 const bool *mesa_format_supports_render
;
1274 /* PrimitiveRestart */
1277 bool enable_cut_index
;
1280 /** Computed depth/stencil/hiz state from the current attached
1281 * renderbuffers, valid only during the drawing state upload loop after
1282 * brw_workaround_depthstencil_alignment().
1285 /* Inter-tile (page-aligned) byte offsets. */
1286 uint32_t depth_offset
;
1287 /* Intra-tile x,y offsets for drawing to combined depth-stencil. Only
1290 uint32_t tile_x
, tile_y
;
1293 uint32_t num_instances
;
1298 const struct gen_l3_config
*config
;
1305 enum shader_time_shader_type
*types
;
1306 struct shader_times
*cumulative
;
1312 struct brw_fast_clear_state
*fast_clear_state
;
1314 /* Array of aux usages to use for drawing. Aux usage for render targets is
1315 * a bit more complex than simply calling a single function so we need some
1316 * way of passing it form brw_draw.c to surface state setup.
1318 enum isl_aux_usage draw_aux_usage
[MAX_DRAW_BUFFERS
];
1320 __DRIcontext
*driContext
;
1321 struct intel_screen
*screen
;
1325 extern void intelInitClearFuncs(struct dd_function_table
*functions
);
1327 /*======================================================================
1330 extern const char *const brw_vendor_string
;
1333 brw_get_renderer_string(const struct intel_screen
*screen
);
1336 DRI_CONF_BO_REUSE_DISABLED
,
1337 DRI_CONF_BO_REUSE_ALL
1340 void intel_update_renderbuffers(__DRIcontext
*context
,
1341 __DRIdrawable
*drawable
);
1342 void intel_prepare_render(struct brw_context
*brw
);
1344 void brw_predraw_resolve_inputs(struct brw_context
*brw
, bool rendering
,
1345 bool *draw_aux_buffer_disabled
);
1347 void intel_resolve_for_dri2_flush(struct brw_context
*brw
,
1348 __DRIdrawable
*drawable
);
1350 GLboolean
brwCreateContext(gl_api api
,
1351 const struct gl_config
*mesaVis
,
1352 __DRIcontext
*driContextPriv
,
1353 const struct __DriverContextConfig
*ctx_config
,
1355 void *sharedContextPrivate
);
1357 /*======================================================================
1361 brw_meta_resolve_color(struct brw_context
*brw
,
1362 struct intel_mipmap_tree
*mt
);
1364 /*======================================================================
1367 void brw_workaround_depthstencil_alignment(struct brw_context
*brw
,
1368 GLbitfield clear_mask
);
1370 /* brw_object_purgeable.c */
1371 void brw_init_object_purgeable_functions(struct dd_function_table
*functions
);
1373 /*======================================================================
1376 void brw_init_common_queryobj_functions(struct dd_function_table
*functions
);
1377 void gen4_init_queryobj_functions(struct dd_function_table
*functions
);
1378 void brw_emit_query_begin(struct brw_context
*brw
);
1379 void brw_emit_query_end(struct brw_context
*brw
);
1380 void brw_query_counter(struct gl_context
*ctx
, struct gl_query_object
*q
);
1381 bool brw_is_query_pipelined(struct brw_query_object
*query
);
1382 uint64_t brw_timebase_scale(struct brw_context
*brw
, uint64_t gpu_timestamp
);
1383 uint64_t brw_raw_timestamp_delta(struct brw_context
*brw
,
1384 uint64_t time0
, uint64_t time1
);
1386 /** gen6_queryobj.c */
1387 void gen6_init_queryobj_functions(struct dd_function_table
*functions
);
1388 void brw_write_timestamp(struct brw_context
*brw
, struct brw_bo
*bo
, int idx
);
1389 void brw_write_depth_count(struct brw_context
*brw
, struct brw_bo
*bo
, int idx
);
1391 /** hsw_queryobj.c */
1392 void hsw_overflow_result_to_gpr0(struct brw_context
*brw
,
1393 struct brw_query_object
*query
,
1395 void hsw_init_queryobj_functions(struct dd_function_table
*functions
);
1397 /** brw_conditional_render.c */
1398 void brw_init_conditional_render_functions(struct dd_function_table
*functions
);
1399 bool brw_check_conditional_render(struct brw_context
*brw
);
1401 /** intel_batchbuffer.c */
1402 void brw_load_register_mem(struct brw_context
*brw
,
1406 void brw_load_register_mem64(struct brw_context
*brw
,
1410 void brw_store_register_mem32(struct brw_context
*brw
,
1411 struct brw_bo
*bo
, uint32_t reg
, uint32_t offset
);
1412 void brw_store_register_mem64(struct brw_context
*brw
,
1413 struct brw_bo
*bo
, uint32_t reg
, uint32_t offset
);
1414 void brw_load_register_imm32(struct brw_context
*brw
,
1415 uint32_t reg
, uint32_t imm
);
1416 void brw_load_register_imm64(struct brw_context
*brw
,
1417 uint32_t reg
, uint64_t imm
);
1418 void brw_load_register_reg(struct brw_context
*brw
, uint32_t src
,
1420 void brw_load_register_reg64(struct brw_context
*brw
, uint32_t src
,
1422 void brw_store_data_imm32(struct brw_context
*brw
, struct brw_bo
*bo
,
1423 uint32_t offset
, uint32_t imm
);
1424 void brw_store_data_imm64(struct brw_context
*brw
, struct brw_bo
*bo
,
1425 uint32_t offset
, uint64_t imm
);
1427 /*======================================================================
1428 * intel_tex_validate.c
1430 void brw_validate_textures( struct brw_context
*brw
);
1433 /*======================================================================
1437 key_debug(struct brw_context
*brw
, const char *name
, int a
, int b
)
1440 perf_debug(" %s %d->%d\n", name
, a
, b
);
1446 void brwInitFragProgFuncs( struct dd_function_table
*functions
);
1448 void brw_get_scratch_bo(struct brw_context
*brw
,
1449 struct brw_bo
**scratch_bo
, int size
);
1450 void brw_alloc_stage_scratch(struct brw_context
*brw
,
1451 struct brw_stage_state
*stage_state
,
1452 unsigned per_thread_size
);
1453 void brw_init_shader_time(struct brw_context
*brw
);
1454 int brw_get_shader_time_index(struct brw_context
*brw
,
1455 struct gl_program
*prog
,
1456 enum shader_time_shader_type type
,
1458 void brw_collect_and_report_shader_time(struct brw_context
*brw
);
1459 void brw_destroy_shader_time(struct brw_context
*brw
);
1463 void brw_calculate_urb_fence(struct brw_context
*brw
, unsigned csize
,
1464 unsigned vsize
, unsigned sfsize
);
1465 void brw_upload_urb_fence(struct brw_context
*brw
);
1469 void brw_upload_cs_urb_state(struct brw_context
*brw
);
1472 gl_clip_plane
*brw_select_clip_planes(struct gl_context
*ctx
);
1474 /* brw_draw_upload.c */
1475 unsigned brw_get_vertex_surface_type(struct brw_context
*brw
,
1476 const struct gl_array_attributes
*glattr
);
1478 static inline unsigned
1479 brw_get_index_type(unsigned index_size
)
1481 /* The hw needs 0x00, 0x01, and 0x02 for ubyte, ushort, and uint,
1484 return index_size
>> 1;
1487 void brw_prepare_vertices(struct brw_context
*brw
);
1489 /* brw_wm_surface_state.c */
1490 void brw_update_buffer_texture_surface(struct gl_context
*ctx
,
1492 uint32_t *surf_offset
);
1494 brw_update_sol_surface(struct brw_context
*brw
,
1495 struct gl_buffer_object
*buffer_obj
,
1496 uint32_t *out_offset
, unsigned num_vector_components
,
1497 unsigned stride_dwords
, unsigned offset_dwords
);
1498 void brw_upload_ubo_surfaces(struct brw_context
*brw
, struct gl_program
*prog
,
1499 struct brw_stage_state
*stage_state
,
1500 struct brw_stage_prog_data
*prog_data
);
1501 void brw_upload_image_surfaces(struct brw_context
*brw
,
1502 const struct gl_program
*prog
,
1503 struct brw_stage_state
*stage_state
,
1504 struct brw_stage_prog_data
*prog_data
);
1506 /* brw_surface_formats.c */
1507 void intel_screen_init_surface_formats(struct intel_screen
*screen
);
1508 void brw_init_surface_formats(struct brw_context
*brw
);
1509 bool brw_render_target_supported(struct brw_context
*brw
,
1510 struct gl_renderbuffer
*rb
);
1511 uint32_t brw_depth_format(struct brw_context
*brw
, mesa_format format
);
1513 /* brw_performance_query.c */
1514 void brw_init_performance_queries(struct brw_context
*brw
);
1516 /* intel_extensions.c */
1517 extern void intelInitExtensions(struct gl_context
*ctx
);
1520 extern int intel_translate_shadow_compare_func(GLenum func
);
1521 extern int intel_translate_compare_func(GLenum func
);
1522 extern int intel_translate_stencil_op(GLenum op
);
1525 void brw_init_syncobj_functions(struct dd_function_table
*functions
);
1528 struct gl_transform_feedback_object
*
1529 brw_new_transform_feedback(struct gl_context
*ctx
, GLuint name
);
1531 brw_delete_transform_feedback(struct gl_context
*ctx
,
1532 struct gl_transform_feedback_object
*obj
);
1534 brw_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1535 struct gl_transform_feedback_object
*obj
);
1537 brw_end_transform_feedback(struct gl_context
*ctx
,
1538 struct gl_transform_feedback_object
*obj
);
1540 brw_pause_transform_feedback(struct gl_context
*ctx
,
1541 struct gl_transform_feedback_object
*obj
);
1543 brw_resume_transform_feedback(struct gl_context
*ctx
,
1544 struct gl_transform_feedback_object
*obj
);
1546 brw_save_primitives_written_counters(struct brw_context
*brw
,
1547 struct brw_transform_feedback_object
*obj
);
1549 brw_get_transform_feedback_vertex_count(struct gl_context
*ctx
,
1550 struct gl_transform_feedback_object
*obj
,
1553 /* gen7_sol_state.c */
1555 gen7_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1556 struct gl_transform_feedback_object
*obj
);
1558 gen7_end_transform_feedback(struct gl_context
*ctx
,
1559 struct gl_transform_feedback_object
*obj
);
1561 gen7_pause_transform_feedback(struct gl_context
*ctx
,
1562 struct gl_transform_feedback_object
*obj
);
1564 gen7_resume_transform_feedback(struct gl_context
*ctx
,
1565 struct gl_transform_feedback_object
*obj
);
1569 hsw_begin_transform_feedback(struct gl_context
*ctx
, GLenum mode
,
1570 struct gl_transform_feedback_object
*obj
);
1572 hsw_end_transform_feedback(struct gl_context
*ctx
,
1573 struct gl_transform_feedback_object
*obj
);
1575 hsw_pause_transform_feedback(struct gl_context
*ctx
,
1576 struct gl_transform_feedback_object
*obj
);
1578 hsw_resume_transform_feedback(struct gl_context
*ctx
,
1579 struct gl_transform_feedback_object
*obj
);
1581 /* brw_blorp_blit.cpp */
1583 brw_blorp_framebuffer(struct brw_context
*brw
,
1584 struct gl_framebuffer
*readFb
,
1585 struct gl_framebuffer
*drawFb
,
1586 GLint srcX0
, GLint srcY0
, GLint srcX1
, GLint srcY1
,
1587 GLint dstX0
, GLint dstY0
, GLint dstX1
, GLint dstY1
,
1588 GLbitfield mask
, GLenum filter
);
1591 brw_blorp_copytexsubimage(struct brw_context
*brw
,
1592 struct gl_renderbuffer
*src_rb
,
1593 struct gl_texture_image
*dst_image
,
1595 int srcX0
, int srcY0
,
1596 int dstX0
, int dstY0
,
1597 int width
, int height
);
1599 /* brw_generate_mipmap.c */
1600 void brw_generate_mipmap(struct gl_context
*ctx
, GLenum target
,
1601 struct gl_texture_object
*tex_obj
);
1604 gen6_get_sample_position(struct gl_context
*ctx
,
1605 struct gl_framebuffer
*fb
,
1609 gen6_set_sample_maps(struct gl_context
*ctx
);
1611 /* gen8_multisample_state.c */
1612 void gen8_emit_3dstate_sample_pattern(struct brw_context
*brw
);
1616 gen7_emit_push_constant_state(struct brw_context
*brw
, unsigned vs_size
,
1617 unsigned hs_size
, unsigned ds_size
,
1618 unsigned gs_size
, unsigned fs_size
);
1621 gen6_upload_urb(struct brw_context
*brw
, unsigned vs_size
,
1622 bool gs_present
, unsigned gs_size
);
1624 gen7_upload_urb(struct brw_context
*brw
, unsigned vs_size
,
1625 bool gs_present
, bool tess_present
);
1629 brw_get_graphics_reset_status(struct gl_context
*ctx
);
1631 brw_check_for_reset(struct brw_context
*brw
);
1635 brw_init_compute_functions(struct dd_function_table
*functions
);
1637 /* brw_program_binary.c */
1639 brw_program_binary_init(unsigned device_id
);
1641 brw_get_program_binary_driver_sha1(struct gl_context
*ctx
, uint8_t *sha1
);
1643 brw_deserialize_program_binary(struct gl_context
*ctx
,
1644 struct gl_shader_program
*shProg
,
1645 struct gl_program
*prog
);
1647 brw_program_serialize_nir(struct gl_context
*ctx
, struct gl_program
*prog
);
1649 brw_program_deserialize_nir(struct gl_context
*ctx
, struct gl_program
*prog
,
1650 gl_shader_stage stage
);
1652 /*======================================================================
1653 * Inline conversion functions. These are better-typed than the
1654 * macros used previously:
1656 static inline struct brw_context
*
1657 brw_context( struct gl_context
*ctx
)
1659 return (struct brw_context
*)ctx
;
1662 static inline struct brw_program
*
1663 brw_program(struct gl_program
*p
)
1665 return (struct brw_program
*) p
;
1668 static inline const struct brw_program
*
1669 brw_program_const(const struct gl_program
*p
)
1671 return (const struct brw_program
*) p
;
1675 brw_depth_writes_enabled(const struct brw_context
*brw
)
1677 const struct gl_context
*ctx
= &brw
->ctx
;
1679 /* We consider depth writes disabled if the depth function is GL_EQUAL,
1680 * because it would just overwrite the existing depth value with itself.
1682 * These bonus depth writes not only use bandwidth, but they also can
1683 * prevent early depth processing. For example, if the pixel shader
1684 * discards, the hardware must invoke the to determine whether or not
1685 * to do the depth write. If writes are disabled, we may still be able
1686 * to do the depth test before the shader, and skip the shader execution.
1688 * The Broadwell 3DSTATE_WM_DEPTH_STENCIL documentation also contains
1689 * a programming note saying to disable depth writes for EQUAL.
1691 return ctx
->Depth
.Test
&& ctx
->Depth
.Mask
&& ctx
->Depth
.Func
!= GL_EQUAL
;
1695 brw_emit_depthbuffer(struct brw_context
*brw
);
1697 uint32_t get_hw_prim_for_gl_prim(int mode
);
1700 gen6_upload_push_constants(struct brw_context
*brw
,
1701 const struct gl_program
*prog
,
1702 const struct brw_stage_prog_data
*prog_data
,
1703 struct brw_stage_state
*stage_state
);
1706 gen9_use_linear_1d_layout(const struct brw_context
*brw
,
1707 const struct intel_mipmap_tree
*mt
);
1709 /* brw_queryformat.c */
1710 void brw_query_internal_format(struct gl_context
*ctx
, GLenum target
,
1711 GLenum internalFormat
, GLenum pname
,