src/mesa/drivers/dri/i965/brw_cs.cpp

   1 /*
   2  * Copyright (c) 2014 - 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24
  25 #include "util/ralloc.h"
  26 #include "brw_context.h"
  27 #include "brw_cs.h"
  28 #include "brw_fs.h"
  29 #include "brw_eu.h"
  30 #include "brw_wm.h"
  31 #include "intel_mipmap_tree.h"
  32 #include "brw_state.h"
  33 #include "intel_batchbuffer.h"
  34
  35 extern "C"
  36 bool
  37 brw_cs_prog_data_compare(const void *in_a, const void *in_b)
  38 {
  39    const struct brw_cs_prog_data *a =
  40       (const struct brw_cs_prog_data *)in_a;
  41    const struct brw_cs_prog_data *b =
  42       (const struct brw_cs_prog_data *)in_b;
  43
  44    /* Compare the base structure. */
  45    if (!brw_stage_prog_data_compare(&a->base, &b->base))
  46       return false;
  47
  48    /* Compare the rest of the structure. */
  49    const unsigned offset = sizeof(struct brw_stage_prog_data);
  50    if (memcmp(((char *) a) + offset, ((char *) b) + offset,
  51               sizeof(struct brw_cs_prog_data) - offset))
  52       return false;
  53
  54    return true;
  55 }
  56
  57
  58 const unsigned *
  59 brw_cs_emit(struct brw_context *brw,
  60             void *mem_ctx,
  61             const struct brw_cs_prog_key *key,
  62             struct brw_cs_prog_data *prog_data,
  63             struct gl_compute_program *cp,
  64             struct gl_shader_program *prog,
  65             unsigned *final_assembly_size)
  66 {
  67    bool start_busy = false;
  68    double start_time = 0;
  69
  70    if (unlikely(brw->perf_debug)) {
  71       start_busy = (brw->batch.last_bo &&
  72                     drm_intel_bo_busy(brw->batch.last_bo));
  73       start_time = get_time();
  74    }
  75
  76    struct brw_shader *shader =
  77       (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  78
  79    if (unlikely(INTEL_DEBUG & DEBUG_CS))
  80       brw_dump_ir("compute", prog, &shader->base, &cp->Base);
  81
  82    prog_data->local_size[0] = cp->LocalSize[0];
  83    prog_data->local_size[1] = cp->LocalSize[1];
  84    prog_data->local_size[2] = cp->LocalSize[2];
  85    unsigned local_workgroup_size =
  86       cp->LocalSize[0] * cp->LocalSize[1] * cp->LocalSize[2];
  87
  88    cfg_t *cfg = NULL;
  89    const char *fail_msg = NULL;
  90
  91    int st_index = -1;
  92    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
  93       st_index = brw_get_shader_time_index(brw, prog, &cp->Base, ST_CS);
  94
  95    /* Now the main event: Visit the shader IR and generate our CS IR for it.
  96     */
  97    fs_visitor v8(brw->intelScreen->compiler, brw,
  98                  mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
  99                  &cp->Base, 8, st_index);
 100    if (!v8.run_cs()) {
 101       fail_msg = v8.fail_msg;
 102    } else if (local_workgroup_size <= 8 * brw->max_cs_threads) {
 103       cfg = v8.cfg;
 104       prog_data->simd_size = 8;
 105    }
 106
 107    fs_visitor v16(brw->intelScreen->compiler, brw,
 108                   mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
 109                   &cp->Base, 16, st_index);
 110    if (likely(!(INTEL_DEBUG & DEBUG_NO16)) &&
 111        !fail_msg && !v8.simd16_unsupported &&
 112        local_workgroup_size <= 16 * brw->max_cs_threads) {
 113       /* Try a SIMD16 compile */
 114       v16.import_uniforms(&v8);
 115       if (!v16.run_cs()) {
 116          perf_debug("SIMD16 shader failed to compile: %s", v16.fail_msg);
 117          if (!cfg) {
 118             fail_msg =
 119                "Couldn't generate SIMD16 program and not "
 120                "enough threads for SIMD8";
 121          }
 122       } else {
 123          cfg = v16.cfg;
 124          prog_data->simd_size = 16;
 125       }
 126    }
 127
 128    if (unlikely(cfg == NULL)) {
 129       assert(fail_msg);
 130       prog->LinkStatus = false;
 131       ralloc_strcat(&prog->InfoLog, fail_msg);
 132       _mesa_problem(NULL, "Failed to compile compute shader: %s\n",
 133                     fail_msg);
 134       return NULL;
 135    }
 136
 137    fs_generator g(brw->intelScreen->compiler, brw,
 138                   mem_ctx, (void*) key, &prog_data->base, &cp->Base,
 139                   v8.promoted_constants, v8.runtime_check_aads_emit, "CS");
 140    if (INTEL_DEBUG & DEBUG_CS) {
 141       char *name = ralloc_asprintf(mem_ctx, "%s compute shader %d",
 142                                    prog->Label ? prog->Label : "unnamed",
 143                                    prog->Name);
 144       g.enable_debug(name);
 145    }
 146
 147    g.generate_code(cfg, prog_data->simd_size);
 148
 149    if (unlikely(brw->perf_debug) && shader) {
 150       if (shader->compiled_once) {
 151          _mesa_problem(&brw->ctx, "CS programs shouldn't need recompiles");
 152       }
 153       shader->compiled_once = true;
 154
 155       if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
 156          perf_debug("CS compile took %.03f ms and stalled the GPU\n",
 157                     (get_time() - start_time) * 1000);
 158       }
 159    }
 160
 161    return g.get_assembly(final_assembly_size);
 162 }
 163
 164 static bool
 165 brw_codegen_cs_prog(struct brw_context *brw,
 166                     struct gl_shader_program *prog,
 167                     struct brw_compute_program *cp,
 168                     struct brw_cs_prog_key *key)
 169 {
 170    struct gl_context *ctx = &brw->ctx;
 171    const GLuint *program;
 172    void *mem_ctx = ralloc_context(NULL);
 173    GLuint program_size;
 174    struct brw_cs_prog_data prog_data;
 175
 176    struct gl_shader *cs = prog->_LinkedShaders[MESA_SHADER_COMPUTE];
 177    assert (cs);
 178
 179    memset(&prog_data, 0, sizeof(prog_data));
 180
 181    /* Allocate the references to the uniforms that will end up in the
 182     * prog_data associated with the compiled program, and which will be freed
 183     * by the state cache.
 184     */
 185    int param_count = cs->num_uniform_components +
 186                      cs->NumImages * BRW_IMAGE_PARAM_SIZE;
 187
 188    /* The backend also sometimes adds params for texture size. */
 189    param_count += 2 * ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits;
 190    prog_data.base.param =
 191       rzalloc_array(NULL, const gl_constant_value *, param_count);
 192    prog_data.base.pull_param =
 193       rzalloc_array(NULL, const gl_constant_value *, param_count);
 194    prog_data.base.image_param =
 195       rzalloc_array(NULL, struct brw_image_param, cs->NumImages);
 196    prog_data.base.nr_params = param_count;
 197    prog_data.base.nr_image_params = cs->NumImages;
 198
 199    program = brw_cs_emit(brw, mem_ctx, key, &prog_data,
 200                          &cp->program, prog, &program_size);
 201    if (program == NULL) {
 202       ralloc_free(mem_ctx);
 203       return false;
 204    }
 205
 206    if (prog_data.base.total_scratch) {
 207       brw_get_scratch_bo(brw, &brw->cs.base.scratch_bo,
 208                          prog_data.base.total_scratch * brw->max_cs_threads);
 209    }
 210
 211    if (unlikely(INTEL_DEBUG & DEBUG_CS))
 212       fprintf(stderr, "\n");
 213
 214    brw_upload_cache(&brw->cache, BRW_CACHE_CS_PROG,
 215                     key, sizeof(*key),
 216                     program, program_size,
 217                     &prog_data, sizeof(prog_data),
 218                     &brw->cs.base.prog_offset, &brw->cs.prog_data);
 219    ralloc_free(mem_ctx);
 220
 221    return true;
 222 }
 223
 224
 225 static void
 226 brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key)
 227 {
 228    /* BRW_NEW_COMPUTE_PROGRAM */
 229    const struct brw_compute_program *cp =
 230       (struct brw_compute_program *) brw->compute_program;
 231
 232    memset(key, 0, sizeof(*key));
 233
 234    /* The unique compute program ID */
 235    key->program_string_id = cp->id;
 236 }
 237
 238
 239 extern "C"
 240 void
 241 brw_upload_cs_prog(struct brw_context *brw)
 242 {
 243    struct gl_context *ctx = &brw->ctx;
 244    struct brw_cs_prog_key key;
 245    struct brw_compute_program *cp = (struct brw_compute_program *)
 246       brw->compute_program;
 247
 248    if (!cp)
 249       return;
 250
 251    if (!brw_state_dirty(brw, 0, BRW_NEW_COMPUTE_PROGRAM))
 252       return;
 253
 254    brw_cs_populate_key(brw, &key);
 255
 256    if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG,
 257                          &key, sizeof(key),
 258                          &brw->cs.base.prog_offset, &brw->cs.prog_data)) {
 259       bool success =
 260          brw_codegen_cs_prog(brw,
 261                              ctx->Shader.CurrentProgram[MESA_SHADER_COMPUTE],
 262                              cp, &key);
 263       (void) success;
 264       assert(success);
 265    }
 266    brw->cs.base.prog_data = &brw->cs.prog_data->base;
 267 }
 268
 269
 270 extern "C" bool
 271 brw_cs_precompile(struct gl_context *ctx,
 272                   struct gl_shader_program *shader_prog,
 273                   struct gl_program *prog)
 274 {
 275    struct brw_context *brw = brw_context(ctx);
 276    struct brw_cs_prog_key key;
 277
 278    struct gl_compute_program *cp = (struct gl_compute_program *) prog;
 279    struct brw_compute_program *bcp = brw_compute_program(cp);
 280
 281    memset(&key, 0, sizeof(key));
 282    key.program_string_id = bcp->id;
 283
 284    brw_setup_tex_for_precompile(brw, &key.tex, prog);
 285
 286    uint32_t old_prog_offset = brw->cs.base.prog_offset;
 287    struct brw_cs_prog_data *old_prog_data = brw->cs.prog_data;
 288
 289    bool success = brw_codegen_cs_prog(brw, shader_prog, bcp, &key);
 290
 291    brw->cs.base.prog_offset = old_prog_offset;
 292    brw->cs.prog_data = old_prog_data;
 293
 294    return success;
 295 }
 296
 297
 298 static unsigned
 299 get_cs_thread_count(const struct brw_cs_prog_data *cs_prog_data)
 300 {
 301    const unsigned simd_size = cs_prog_data->simd_size;
 302    unsigned group_size = cs_prog_data->local_size[0] *
 303       cs_prog_data->local_size[1] * cs_prog_data->local_size[2];
 304
 305    return (group_size + simd_size - 1) / simd_size;
 306 }
 307
 308
 309 static void
 310 brw_upload_cs_state(struct brw_context *brw)
 311 {
 312    if (!brw->cs.prog_data)
 313       return;
 314
 315    uint32_t offset;
 316    uint32_t *desc = (uint32_t*) brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
 317                                                 8 * 4, 64, &offset);
 318    struct brw_stage_state *stage_state = &brw->cs.base;
 319    struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data;
 320    struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
 321
 322    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
 323       brw->vtbl.emit_buffer_surface_state(
 324          brw, &stage_state->surf_offset[
 325                  prog_data->binding_table.shader_time_start],
 326          brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
 327          brw->shader_time.bo->size, 1, true);
 328    }
 329
 330    uint32_t *bind = (uint32_t*) brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
 331                                             prog_data->binding_table.size_bytes,
 332                                             32, &stage_state->bind_bo_offset);
 333
 334    unsigned threads = get_cs_thread_count(cs_prog_data);
 335
 336    uint32_t dwords = brw->gen < 8 ? 8 : 9;
 337    BEGIN_BATCH(dwords);
 338    OUT_BATCH(MEDIA_VFE_STATE << 16 | (dwords - 2));
 339
 340    if (prog_data->total_scratch) {
 341       if (brw->gen >= 8)
 342          OUT_RELOC64(stage_state->scratch_bo,
 343                      I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 344                      ffs(prog_data->total_scratch) - 11);
 345       else
 346          OUT_RELOC(stage_state->scratch_bo,
 347                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 348                    ffs(prog_data->total_scratch) - 11);
 349    } else {
 350       OUT_BATCH(0);
 351       if (brw->gen >= 8)
 352          OUT_BATCH(0);
 353    }
 354
 355    const uint32_t vfe_num_urb_entries = brw->gen >= 8 ? 2 : 0;
 356    const uint32_t vfe_gpgpu_mode =
 357       brw->gen == 7 ? SET_FIELD(1, GEN7_MEDIA_VFE_STATE_GPGPU_MODE) : 0;
 358    OUT_BATCH(SET_FIELD(brw->max_cs_threads - 1, MEDIA_VFE_STATE_MAX_THREADS) |
 359              SET_FIELD(vfe_num_urb_entries, MEDIA_VFE_STATE_URB_ENTRIES) |
 360              SET_FIELD(1, MEDIA_VFE_STATE_RESET_GTW_TIMER) |
 361              SET_FIELD(1, MEDIA_VFE_STATE_BYPASS_GTW) |
 362              vfe_gpgpu_mode);
 363
 364    OUT_BATCH(0);
 365    const uint32_t vfe_urb_allocation = brw->gen >= 8 ? 2 : 0;
 366    OUT_BATCH(SET_FIELD(vfe_urb_allocation, MEDIA_VFE_STATE_URB_ALLOC));
 367    OUT_BATCH(0);
 368    OUT_BATCH(0);
 369    OUT_BATCH(0);
 370    ADVANCE_BATCH();
 371
 372    /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
 373    memcpy(bind, stage_state->surf_offset,
 374           prog_data->binding_table.size_bytes);
 375
 376    memset(desc, 0, 8 * 4);
 377
 378    int dw = 0;
 379    desc[dw++] = brw->cs.base.prog_offset;
 380    if (brw->gen >= 8)
 381       desc[dw++] = 0; /* Kernel Start Pointer High */
 382    desc[dw++] = 0;
 383    desc[dw++] = 0;
 384    desc[dw++] = stage_state->bind_bo_offset;
 385    desc[dw++] = 0;
 386    const uint32_t media_threads =
 387       brw->gen >= 8 ?
 388       SET_FIELD(threads, GEN8_MEDIA_GPGPU_THREAD_COUNT) :
 389       SET_FIELD(threads, MEDIA_GPGPU_THREAD_COUNT);
 390    assert(threads <= brw->max_cs_threads);
 391    desc[dw++] = media_threads;
 392
 393    BEGIN_BATCH(4);
 394    OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD << 16 | (4 - 2));
 395    OUT_BATCH(0);
 396    OUT_BATCH(8 * 4);
 397    OUT_BATCH(offset);
 398    ADVANCE_BATCH();
 399 }
 400
 401
 402 extern "C"
 403 const struct brw_tracked_state brw_cs_state = {
 404    /* explicit initialisers aren't valid C++, comment
 405     * them for documentation purposes */
 406    /* .dirty = */{
 407       /* .mesa = */ 0,
 408       /* .brw = */  BRW_NEW_CS_PROG_DATA,
 409    },
 410    /* .emit = */ brw_upload_cs_state
 411 };