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i965: Abstract BRW_REGISTER_TYPE_* into an enum with unique values.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "main/mtypes.h"
31
32 #include "brw_context.h"
33 #include "brw_defines.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1},
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1},
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1},
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1},
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1},
78 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1},
79 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1},
80 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1},
81 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1},
82
83 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
86 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
89 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
93 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
95 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
98 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
99 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
100 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
101 };
102 static const struct opcode_desc *opcode = opcode_descs;
103
104 const char * const conditional_modifier[16] = {
105 [BRW_CONDITIONAL_NONE] = "",
106 [BRW_CONDITIONAL_Z] = ".e",
107 [BRW_CONDITIONAL_NZ] = ".ne",
108 [BRW_CONDITIONAL_G] = ".g",
109 [BRW_CONDITIONAL_GE] = ".ge",
110 [BRW_CONDITIONAL_L] = ".l",
111 [BRW_CONDITIONAL_LE] = ".le",
112 [BRW_CONDITIONAL_R] = ".r",
113 [BRW_CONDITIONAL_O] = ".o",
114 [BRW_CONDITIONAL_U] = ".u",
115 };
116
117 static const char * const negate[2] = {
118 [0] = "",
119 [1] = "-",
120 };
121
122 static const char * const _abs[2] = {
123 [0] = "",
124 [1] = "(abs)",
125 };
126
127 static const char * const vert_stride[16] = {
128 [0] = "0",
129 [1] = "1",
130 [2] = "2",
131 [3] = "4",
132 [4] = "8",
133 [5] = "16",
134 [6] = "32",
135 [15] = "VxH",
136 };
137
138 static const char * const width[8] = {
139 [0] = "1",
140 [1] = "2",
141 [2] = "4",
142 [3] = "8",
143 [4] = "16",
144 };
145
146 static const char * const horiz_stride[4] = {
147 [0] = "0",
148 [1] = "1",
149 [2] = "2",
150 [3] = "4"
151 };
152
153 static const char * const chan_sel[4] = {
154 [0] = "x",
155 [1] = "y",
156 [2] = "z",
157 [3] = "w",
158 };
159
160 static const char * const debug_ctrl[2] = {
161 [0] = "",
162 [1] = ".breakpoint"
163 };
164
165 static const char * const saturate[2] = {
166 [0] = "",
167 [1] = ".sat"
168 };
169
170 static const char * const accwr[2] = {
171 [0] = "",
172 [1] = "AccWrEnable"
173 };
174
175 static const char * const wectrl[2] = {
176 [0] = "WE_normal",
177 [1] = "WE_all"
178 };
179
180 static const char * const exec_size[8] = {
181 [0] = "1",
182 [1] = "2",
183 [2] = "4",
184 [3] = "8",
185 [4] = "16",
186 [5] = "32"
187 };
188
189 static const char * const pred_inv[2] = {
190 [0] = "+",
191 [1] = "-"
192 };
193
194 static const char * const pred_ctrl_align16[16] = {
195 [1] = "",
196 [2] = ".x",
197 [3] = ".y",
198 [4] = ".z",
199 [5] = ".w",
200 [6] = ".any4h",
201 [7] = ".all4h",
202 };
203
204 static const char * const pred_ctrl_align1[16] = {
205 [1] = "",
206 [2] = ".anyv",
207 [3] = ".allv",
208 [4] = ".any2h",
209 [5] = ".all2h",
210 [6] = ".any4h",
211 [7] = ".all4h",
212 [8] = ".any8h",
213 [9] = ".all8h",
214 [10] = ".any16h",
215 [11] = ".all16h",
216 };
217
218 static const char * const thread_ctrl[4] = {
219 [0] = "",
220 [2] = "switch"
221 };
222
223 static const char * const compr_ctrl[4] = {
224 [0] = "",
225 [1] = "sechalf",
226 [2] = "compr",
227 [3] = "compr4",
228 };
229
230 static const char * const dep_ctrl[4] = {
231 [0] = "",
232 [1] = "NoDDClr",
233 [2] = "NoDDChk",
234 [3] = "NoDDClr,NoDDChk",
235 };
236
237 static const char * const mask_ctrl[4] = {
238 [0] = "",
239 [1] = "nomask",
240 };
241
242 static const char * const access_mode[2] = {
243 [0] = "align1",
244 [1] = "align16",
245 };
246
247 const char * const reg_encoding[8] = {
248 [0] = "UD",
249 [1] = "D",
250 [2] = "UW",
251 [3] = "W",
252 [4] = "UB",
253 [5] = "B",
254 [7] = "F"
255 };
256
257 const char * const three_source_reg_encoding[] = {
258 [BRW_3SRC_TYPE_F] = "F",
259 [BRW_3SRC_TYPE_D] = "D",
260 [BRW_3SRC_TYPE_UD] = "UD",
261 };
262
263 const int reg_type_size[8] = {
264 [0] = 4,
265 [1] = 4,
266 [2] = 2,
267 [3] = 2,
268 [4] = 1,
269 [5] = 1,
270 [7] = 4
271 };
272
273 static const char * const reg_file[4] = {
274 [0] = "A",
275 [1] = "g",
276 [2] = "m",
277 [3] = "imm",
278 };
279
280 static const char * const writemask[16] = {
281 [0x0] = ".",
282 [0x1] = ".x",
283 [0x2] = ".y",
284 [0x3] = ".xy",
285 [0x4] = ".z",
286 [0x5] = ".xz",
287 [0x6] = ".yz",
288 [0x7] = ".xyz",
289 [0x8] = ".w",
290 [0x9] = ".xw",
291 [0xa] = ".yw",
292 [0xb] = ".xyw",
293 [0xc] = ".zw",
294 [0xd] = ".xzw",
295 [0xe] = ".yzw",
296 [0xf] = "",
297 };
298
299 static const char * const end_of_thread[2] = {
300 [0] = "",
301 [1] = "EOT"
302 };
303
304 static const char * const target_function[16] = {
305 [BRW_SFID_NULL] = "null",
306 [BRW_SFID_MATH] = "math",
307 [BRW_SFID_SAMPLER] = "sampler",
308 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
309 [BRW_SFID_DATAPORT_READ] = "read",
310 [BRW_SFID_DATAPORT_WRITE] = "write",
311 [BRW_SFID_URB] = "urb",
312 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner"
313 };
314
315 static const char * const target_function_gen6[16] = {
316 [BRW_SFID_NULL] = "null",
317 [BRW_SFID_MATH] = "math",
318 [BRW_SFID_SAMPLER] = "sampler",
319 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
320 [BRW_SFID_URB] = "urb",
321 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
322 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
323 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
324 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
325 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data"
326 };
327
328 static const char * const dp_rc_msg_type_gen6[16] = {
329 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
330 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
331 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
332 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
333 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read",
334 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
335 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
336 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
337 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write",
338 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
339 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write",
340 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
341 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
342 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
343 };
344
345 static const char * const math_function[16] = {
346 [BRW_MATH_FUNCTION_INV] = "inv",
347 [BRW_MATH_FUNCTION_LOG] = "log",
348 [BRW_MATH_FUNCTION_EXP] = "exp",
349 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
350 [BRW_MATH_FUNCTION_RSQ] = "rsq",
351 [BRW_MATH_FUNCTION_SIN] = "sin",
352 [BRW_MATH_FUNCTION_COS] = "cos",
353 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
354 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
355 [BRW_MATH_FUNCTION_POW] = "pow",
356 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
357 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
358 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
359 };
360
361 static const char * const math_saturate[2] = {
362 [0] = "",
363 [1] = "sat"
364 };
365
366 static const char * const math_signed[2] = {
367 [0] = "",
368 [1] = "signed"
369 };
370
371 static const char * const math_scalar[2] = {
372 [0] = "",
373 [1] = "scalar"
374 };
375
376 static const char * const math_precision[2] = {
377 [0] = "",
378 [1] = "partial_precision"
379 };
380
381 static const char * const urb_opcode[2] = {
382 [0] = "urb_write",
383 [1] = "ff_sync",
384 };
385
386 static const char * const urb_swizzle[4] = {
387 [BRW_URB_SWIZZLE_NONE] = "",
388 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
389 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
390 };
391
392 static const char * const urb_allocate[2] = {
393 [0] = "",
394 [1] = "allocate"
395 };
396
397 static const char * const urb_used[2] = {
398 [0] = "",
399 [1] = "used"
400 };
401
402 static const char * const urb_complete[2] = {
403 [0] = "",
404 [1] = "complete"
405 };
406
407 static const char * const sampler_target_format[4] = {
408 [0] = "F",
409 [2] = "UD",
410 [3] = "D"
411 };
412
413
414 static int column;
415
416 static int string (FILE *file, const char *string)
417 {
418 fputs (string, file);
419 column += strlen (string);
420 return 0;
421 }
422
423 static int format (FILE *f, const char *format, ...)
424 {
425 char buf[1024];
426 va_list args;
427 va_start (args, format);
428
429 vsnprintf (buf, sizeof (buf) - 1, format, args);
430 va_end (args);
431 string (f, buf);
432 return 0;
433 }
434
435 static int newline (FILE *f)
436 {
437 putc ('\n', f);
438 column = 0;
439 return 0;
440 }
441
442 static int pad (FILE *f, int c)
443 {
444 do
445 string (f, " ");
446 while (column < c);
447 return 0;
448 }
449
450 static int control (FILE *file, const char *name, const char * const ctrl[],
451 unsigned id, int *space)
452 {
453 if (!ctrl[id]) {
454 fprintf (file, "*** invalid %s value %d ",
455 name, id);
456 return 1;
457 }
458 if (ctrl[id][0])
459 {
460 if (space && *space)
461 string (file, " ");
462 string (file, ctrl[id]);
463 if (space)
464 *space = 1;
465 }
466 return 0;
467 }
468
469 static int print_opcode (FILE *file, int id)
470 {
471 if (!opcode[id].name) {
472 format (file, "*** invalid opcode value %d ", id);
473 return 1;
474 }
475 string (file, opcode[id].name);
476 return 0;
477 }
478
479 static int reg (FILE *file, unsigned _reg_file, unsigned _reg_nr)
480 {
481 int err = 0;
482
483 /* Clear the Compr4 instruction compression bit. */
484 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
485 _reg_nr &= ~(1 << 7);
486
487 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
488 switch (_reg_nr & 0xf0) {
489 case BRW_ARF_NULL:
490 string (file, "null");
491 return -1;
492 case BRW_ARF_ADDRESS:
493 format (file, "a%d", _reg_nr & 0x0f);
494 break;
495 case BRW_ARF_ACCUMULATOR:
496 format (file, "acc%d", _reg_nr & 0x0f);
497 break;
498 case BRW_ARF_FLAG:
499 format (file, "f%d", _reg_nr & 0x0f);
500 break;
501 case BRW_ARF_MASK:
502 format (file, "mask%d", _reg_nr & 0x0f);
503 break;
504 case BRW_ARF_MASK_STACK:
505 format (file, "msd%d", _reg_nr & 0x0f);
506 break;
507 case BRW_ARF_STATE:
508 format (file, "sr%d", _reg_nr & 0x0f);
509 break;
510 case BRW_ARF_CONTROL:
511 format (file, "cr%d", _reg_nr & 0x0f);
512 break;
513 case BRW_ARF_NOTIFICATION_COUNT:
514 format (file, "n%d", _reg_nr & 0x0f);
515 break;
516 case BRW_ARF_IP:
517 string (file, "ip");
518 return -1;
519 break;
520 default:
521 format (file, "ARF%d", _reg_nr);
522 break;
523 }
524 } else {
525 err |= control (file, "src reg file", reg_file, _reg_file, NULL);
526 format (file, "%d", _reg_nr);
527 }
528 return err;
529 }
530
531 static int dest (FILE *file, struct brw_instruction *inst)
532 {
533 int err = 0;
534
535 if (inst->header.access_mode == BRW_ALIGN_1)
536 {
537 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
538 {
539 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
540 if (err == -1)
541 return 0;
542 if (inst->bits1.da1.dest_subreg_nr)
543 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
544 reg_type_size[inst->bits1.da1.dest_reg_type]);
545 string (file, "<");
546 err |= control (file, "horiz stride", horiz_stride, inst->bits1.da1.dest_horiz_stride, NULL);
547 string (file, ">");
548 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL);
549 }
550 else
551 {
552 string (file, "g[a0");
553 if (inst->bits1.ia1.dest_subreg_nr)
554 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
555 reg_type_size[inst->bits1.ia1.dest_reg_type]);
556 if (inst->bits1.ia1.dest_indirect_offset)
557 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
558 string (file, "]<");
559 err |= control (file, "horiz stride", horiz_stride, inst->bits1.ia1.dest_horiz_stride, NULL);
560 string (file, ">");
561 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
562 }
563 }
564 else
565 {
566 if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT)
567 {
568 err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr);
569 if (err == -1)
570 return 0;
571 if (inst->bits1.da16.dest_subreg_nr)
572 format (file, ".%d", inst->bits1.da16.dest_subreg_nr /
573 reg_type_size[inst->bits1.da16.dest_reg_type]);
574 string (file, "<1>");
575 err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL);
576 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL);
577 }
578 else
579 {
580 err = 1;
581 string (file, "Indirect align16 address mode not supported");
582 }
583 }
584
585 return 0;
586 }
587
588 static int dest_3src (FILE *file, struct brw_instruction *inst)
589 {
590 int err = 0;
591 uint32_t reg_file;
592
593 if (inst->bits1.da3src.dest_reg_file)
594 reg_file = BRW_MESSAGE_REGISTER_FILE;
595 else
596 reg_file = BRW_GENERAL_REGISTER_FILE;
597
598 err |= reg (file, reg_file, inst->bits1.da3src.dest_reg_nr);
599 if (err == -1)
600 return 0;
601 if (inst->bits1.da3src.dest_subreg_nr)
602 format (file, ".%d", inst->bits1.da3src.dest_subreg_nr);
603 string (file, "<1>");
604 err |= control (file, "writemask", writemask, inst->bits1.da3src.dest_writemask, NULL);
605 err |= control (file, "dest reg encoding", three_source_reg_encoding,
606 inst->bits1.da3src.dst_type, NULL);
607
608 return 0;
609 }
610
611 static int src_align1_region (FILE *file,
612 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride)
613 {
614 int err = 0;
615 string (file, "<");
616 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
617 string (file, ",");
618 err |= control (file, "width", width, _width, NULL);
619 string (file, ",");
620 err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
621 string (file, ">");
622 return err;
623 }
624
625 static int src_da1 (FILE *file, unsigned type, unsigned _reg_file,
626 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
627 unsigned reg_num, unsigned sub_reg_num, unsigned __abs, unsigned _negate)
628 {
629 int err = 0;
630 err |= control (file, "negate", negate, _negate, NULL);
631 err |= control (file, "abs", _abs, __abs, NULL);
632
633 err |= reg (file, _reg_file, reg_num);
634 if (err == -1)
635 return 0;
636 if (sub_reg_num)
637 format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
638 src_align1_region (file, _vert_stride, _width, _horiz_stride);
639 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
640 return err;
641 }
642
643 static int src_ia1 (FILE *file,
644 unsigned type,
645 unsigned _reg_file,
646 int _addr_imm,
647 unsigned _addr_subreg_nr,
648 unsigned _negate,
649 unsigned __abs,
650 unsigned _addr_mode,
651 unsigned _horiz_stride,
652 unsigned _width,
653 unsigned _vert_stride)
654 {
655 int err = 0;
656 err |= control (file, "negate", negate, _negate, NULL);
657 err |= control (file, "abs", _abs, __abs, NULL);
658
659 string (file, "g[a0");
660 if (_addr_subreg_nr)
661 format (file, ".%d", _addr_subreg_nr);
662 if (_addr_imm)
663 format (file, " %d", _addr_imm);
664 string (file, "]");
665 src_align1_region (file, _vert_stride, _width, _horiz_stride);
666 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
667 return err;
668 }
669
670 static int src_da16 (FILE *file,
671 unsigned _reg_type,
672 unsigned _reg_file,
673 unsigned _vert_stride,
674 unsigned _reg_nr,
675 unsigned _subreg_nr,
676 unsigned __abs,
677 unsigned _negate,
678 unsigned swz_x,
679 unsigned swz_y,
680 unsigned swz_z,
681 unsigned swz_w)
682 {
683 int err = 0;
684 err |= control (file, "negate", negate, _negate, NULL);
685 err |= control (file, "abs", _abs, __abs, NULL);
686
687 err |= reg (file, _reg_file, _reg_nr);
688 if (err == -1)
689 return 0;
690 if (_subreg_nr)
691 /* bit4 for subreg number byte addressing. Make this same meaning as
692 in da1 case, so output looks consistent. */
693 format (file, ".%d", 16 / reg_type_size[_reg_type]);
694 string (file, "<");
695 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
696 string (file, ",4,1>");
697 /*
698 * Three kinds of swizzle display:
699 * identity - nothing printed
700 * 1->all - print the single channel
701 * 1->1 - print the mapping
702 */
703 if (swz_x == BRW_CHANNEL_X &&
704 swz_y == BRW_CHANNEL_Y &&
705 swz_z == BRW_CHANNEL_Z &&
706 swz_w == BRW_CHANNEL_W)
707 {
708 ;
709 }
710 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
711 {
712 string (file, ".");
713 err |= control (file, "channel select", chan_sel, swz_x, NULL);
714 }
715 else
716 {
717 string (file, ".");
718 err |= control (file, "channel select", chan_sel, swz_x, NULL);
719 err |= control (file, "channel select", chan_sel, swz_y, NULL);
720 err |= control (file, "channel select", chan_sel, swz_z, NULL);
721 err |= control (file, "channel select", chan_sel, swz_w, NULL);
722 }
723 err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL);
724 return err;
725 }
726
727 static int src0_3src (FILE *file, struct brw_instruction *inst)
728 {
729 int err = 0;
730 unsigned swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3;
731 unsigned swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3;
732 unsigned swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3;
733 unsigned swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3;
734
735 err |= control (file, "negate", negate, inst->bits1.da3src.src0_negate, NULL);
736 err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL);
737
738 err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr);
739 if (err == -1)
740 return 0;
741 if (inst->bits2.da3src.src0_subreg_nr)
742 format (file, ".%d", inst->bits2.da3src.src0_subreg_nr);
743 string (file, "<4,1,1>");
744 err |= control (file, "src da16 reg type", three_source_reg_encoding,
745 inst->bits1.da3src.src_type, NULL);
746 /*
747 * Three kinds of swizzle display:
748 * identity - nothing printed
749 * 1->all - print the single channel
750 * 1->1 - print the mapping
751 */
752 if (swz_x == BRW_CHANNEL_X &&
753 swz_y == BRW_CHANNEL_Y &&
754 swz_z == BRW_CHANNEL_Z &&
755 swz_w == BRW_CHANNEL_W)
756 {
757 ;
758 }
759 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
760 {
761 string (file, ".");
762 err |= control (file, "channel select", chan_sel, swz_x, NULL);
763 }
764 else
765 {
766 string (file, ".");
767 err |= control (file, "channel select", chan_sel, swz_x, NULL);
768 err |= control (file, "channel select", chan_sel, swz_y, NULL);
769 err |= control (file, "channel select", chan_sel, swz_z, NULL);
770 err |= control (file, "channel select", chan_sel, swz_w, NULL);
771 }
772 return err;
773 }
774
775 static int src1_3src (FILE *file, struct brw_instruction *inst)
776 {
777 int err = 0;
778 unsigned swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3;
779 unsigned swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3;
780 unsigned swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3;
781 unsigned swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3;
782 unsigned src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low |
783 (inst->bits3.da3src.src1_subreg_nr_high << 2));
784
785 err |= control (file, "negate", negate, inst->bits1.da3src.src1_negate,
786 NULL);
787 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL);
788
789 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
790 inst->bits3.da3src.src1_reg_nr);
791 if (err == -1)
792 return 0;
793 if (src1_subreg_nr)
794 format (file, ".%d", src1_subreg_nr);
795 string (file, "<4,1,1>");
796 err |= control (file, "src da16 reg type", three_source_reg_encoding,
797 inst->bits1.da3src.src_type, NULL);
798 /*
799 * Three kinds of swizzle display:
800 * identity - nothing printed
801 * 1->all - print the single channel
802 * 1->1 - print the mapping
803 */
804 if (swz_x == BRW_CHANNEL_X &&
805 swz_y == BRW_CHANNEL_Y &&
806 swz_z == BRW_CHANNEL_Z &&
807 swz_w == BRW_CHANNEL_W)
808 {
809 ;
810 }
811 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
812 {
813 string (file, ".");
814 err |= control (file, "channel select", chan_sel, swz_x, NULL);
815 }
816 else
817 {
818 string (file, ".");
819 err |= control (file, "channel select", chan_sel, swz_x, NULL);
820 err |= control (file, "channel select", chan_sel, swz_y, NULL);
821 err |= control (file, "channel select", chan_sel, swz_z, NULL);
822 err |= control (file, "channel select", chan_sel, swz_w, NULL);
823 }
824 return err;
825 }
826
827
828 static int src2_3src (FILE *file, struct brw_instruction *inst)
829 {
830 int err = 0;
831 unsigned swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3;
832 unsigned swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3;
833 unsigned swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3;
834 unsigned swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3;
835
836 err |= control (file, "negate", negate, inst->bits1.da3src.src2_negate,
837 NULL);
838 err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL);
839
840 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
841 inst->bits3.da3src.src2_reg_nr);
842 if (err == -1)
843 return 0;
844 if (inst->bits3.da3src.src2_subreg_nr)
845 format (file, ".%d", inst->bits3.da3src.src2_subreg_nr);
846 string (file, "<4,1,1>");
847 err |= control (file, "src da16 reg type", three_source_reg_encoding,
848 inst->bits1.da3src.src_type, NULL);
849 /*
850 * Three kinds of swizzle display:
851 * identity - nothing printed
852 * 1->all - print the single channel
853 * 1->1 - print the mapping
854 */
855 if (swz_x == BRW_CHANNEL_X &&
856 swz_y == BRW_CHANNEL_Y &&
857 swz_z == BRW_CHANNEL_Z &&
858 swz_w == BRW_CHANNEL_W)
859 {
860 ;
861 }
862 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
863 {
864 string (file, ".");
865 err |= control (file, "channel select", chan_sel, swz_x, NULL);
866 }
867 else
868 {
869 string (file, ".");
870 err |= control (file, "channel select", chan_sel, swz_x, NULL);
871 err |= control (file, "channel select", chan_sel, swz_y, NULL);
872 err |= control (file, "channel select", chan_sel, swz_z, NULL);
873 err |= control (file, "channel select", chan_sel, swz_w, NULL);
874 }
875 return err;
876 }
877
878 static int imm (FILE *file, unsigned type, struct brw_instruction *inst) {
879 switch (type) {
880 case BRW_HW_REG_TYPE_UD:
881 format (file, "0x%08xUD", inst->bits3.ud);
882 break;
883 case BRW_HW_REG_TYPE_D:
884 format (file, "%dD", inst->bits3.d);
885 break;
886 case BRW_HW_REG_TYPE_UW:
887 format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
888 break;
889 case BRW_HW_REG_TYPE_W:
890 format (file, "%dW", (int16_t) inst->bits3.d);
891 break;
892 case BRW_HW_REG_IMM_TYPE_UV:
893 format (file, "0x%08xUV", inst->bits3.ud);
894 break;
895 case BRW_HW_REG_IMM_TYPE_VF:
896 format (file, "Vector Float");
897 break;
898 case BRW_HW_REG_IMM_TYPE_V:
899 format (file, "0x%08xV", inst->bits3.ud);
900 break;
901 case BRW_HW_REG_TYPE_F:
902 format (file, "%-gF", inst->bits3.f);
903 }
904 return 0;
905 }
906
907 static int src0 (FILE *file, struct brw_instruction *inst)
908 {
909 if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE)
910 return imm (file, inst->bits1.da1.src0_reg_type,
911 inst);
912 else if (inst->header.access_mode == BRW_ALIGN_1)
913 {
914 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT)
915 {
916 return src_da1 (file,
917 inst->bits1.da1.src0_reg_type,
918 inst->bits1.da1.src0_reg_file,
919 inst->bits2.da1.src0_vert_stride,
920 inst->bits2.da1.src0_width,
921 inst->bits2.da1.src0_horiz_stride,
922 inst->bits2.da1.src0_reg_nr,
923 inst->bits2.da1.src0_subreg_nr,
924 inst->bits2.da1.src0_abs,
925 inst->bits2.da1.src0_negate);
926 }
927 else
928 {
929 return src_ia1 (file,
930 inst->bits1.ia1.src0_reg_type,
931 inst->bits1.ia1.src0_reg_file,
932 inst->bits2.ia1.src0_indirect_offset,
933 inst->bits2.ia1.src0_subreg_nr,
934 inst->bits2.ia1.src0_negate,
935 inst->bits2.ia1.src0_abs,
936 inst->bits2.ia1.src0_address_mode,
937 inst->bits2.ia1.src0_horiz_stride,
938 inst->bits2.ia1.src0_width,
939 inst->bits2.ia1.src0_vert_stride);
940 }
941 }
942 else
943 {
944 if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT)
945 {
946 return src_da16 (file,
947 inst->bits1.da16.src0_reg_type,
948 inst->bits1.da16.src0_reg_file,
949 inst->bits2.da16.src0_vert_stride,
950 inst->bits2.da16.src0_reg_nr,
951 inst->bits2.da16.src0_subreg_nr,
952 inst->bits2.da16.src0_abs,
953 inst->bits2.da16.src0_negate,
954 inst->bits2.da16.src0_swz_x,
955 inst->bits2.da16.src0_swz_y,
956 inst->bits2.da16.src0_swz_z,
957 inst->bits2.da16.src0_swz_w);
958 }
959 else
960 {
961 string (file, "Indirect align16 address mode not supported");
962 return 1;
963 }
964 }
965 }
966
967 static int src1 (FILE *file, struct brw_instruction *inst)
968 {
969 if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE)
970 return imm (file, inst->bits1.da1.src1_reg_type,
971 inst);
972 else if (inst->header.access_mode == BRW_ALIGN_1)
973 {
974 if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT)
975 {
976 return src_da1 (file,
977 inst->bits1.da1.src1_reg_type,
978 inst->bits1.da1.src1_reg_file,
979 inst->bits3.da1.src1_vert_stride,
980 inst->bits3.da1.src1_width,
981 inst->bits3.da1.src1_horiz_stride,
982 inst->bits3.da1.src1_reg_nr,
983 inst->bits3.da1.src1_subreg_nr,
984 inst->bits3.da1.src1_abs,
985 inst->bits3.da1.src1_negate);
986 }
987 else
988 {
989 return src_ia1 (file,
990 inst->bits1.ia1.src1_reg_type,
991 inst->bits1.ia1.src1_reg_file,
992 inst->bits3.ia1.src1_indirect_offset,
993 inst->bits3.ia1.src1_subreg_nr,
994 inst->bits3.ia1.src1_negate,
995 inst->bits3.ia1.src1_abs,
996 inst->bits3.ia1.src1_address_mode,
997 inst->bits3.ia1.src1_horiz_stride,
998 inst->bits3.ia1.src1_width,
999 inst->bits3.ia1.src1_vert_stride);
1000 }
1001 }
1002 else
1003 {
1004 if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT)
1005 {
1006 return src_da16 (file,
1007 inst->bits1.da16.src1_reg_type,
1008 inst->bits1.da16.src1_reg_file,
1009 inst->bits3.da16.src1_vert_stride,
1010 inst->bits3.da16.src1_reg_nr,
1011 inst->bits3.da16.src1_subreg_nr,
1012 inst->bits3.da16.src1_abs,
1013 inst->bits3.da16.src1_negate,
1014 inst->bits3.da16.src1_swz_x,
1015 inst->bits3.da16.src1_swz_y,
1016 inst->bits3.da16.src1_swz_z,
1017 inst->bits3.da16.src1_swz_w);
1018 }
1019 else
1020 {
1021 string (file, "Indirect align16 address mode not supported");
1022 return 1;
1023 }
1024 }
1025 }
1026
1027 int esize[6] = {
1028 [0] = 1,
1029 [1] = 2,
1030 [2] = 4,
1031 [3] = 8,
1032 [4] = 16,
1033 [5] = 32,
1034 };
1035
1036 static int qtr_ctrl(FILE *file, struct brw_instruction *inst)
1037 {
1038 int qtr_ctl = inst->header.compression_control;
1039 int exec_size = esize[inst->header.execution_size];
1040
1041 if (exec_size == 8) {
1042 switch (qtr_ctl) {
1043 case 0:
1044 string (file, " 1Q");
1045 break;
1046 case 1:
1047 string (file, " 2Q");
1048 break;
1049 case 2:
1050 string (file, " 3Q");
1051 break;
1052 case 3:
1053 string (file, " 4Q");
1054 break;
1055 }
1056 } else if (exec_size == 16){
1057 if (qtr_ctl < 2)
1058 string (file, " 1H");
1059 else
1060 string (file, " 2H");
1061 }
1062 return 0;
1063 }
1064
1065 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
1066 {
1067 int err = 0;
1068 int space = 0;
1069
1070 if (inst->header.predicate_control) {
1071 string (file, "(");
1072 err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL);
1073 format (file, "f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1074 if (inst->bits2.da1.flag_subreg_nr)
1075 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1076 if (inst->header.access_mode == BRW_ALIGN_1)
1077 err |= control (file, "predicate control align1", pred_ctrl_align1,
1078 inst->header.predicate_control, NULL);
1079 else
1080 err |= control (file, "predicate control align16", pred_ctrl_align16,
1081 inst->header.predicate_control, NULL);
1082 string (file, ") ");
1083 }
1084
1085 err |= print_opcode (file, inst->header.opcode);
1086 err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
1087 err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
1088
1089 if (inst->header.opcode == BRW_OPCODE_MATH) {
1090 string (file, " ");
1091 err |= control (file, "function", math_function,
1092 inst->header.destreg__conditionalmod, NULL);
1093 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
1094 inst->header.opcode != BRW_OPCODE_SENDC) {
1095 err |= control (file, "conditional modifier", conditional_modifier,
1096 inst->header.destreg__conditionalmod, NULL);
1097
1098 /* If we're using the conditional modifier, print which flags reg is
1099 * used for it. Note that on gen6+, the embedded-condition SEL and
1100 * control flow doesn't update flags.
1101 */
1102 if (inst->header.destreg__conditionalmod &&
1103 (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL &&
1104 inst->header.opcode != BRW_OPCODE_IF &&
1105 inst->header.opcode != BRW_OPCODE_WHILE))) {
1106 format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1107 if (inst->bits2.da1.flag_subreg_nr)
1108 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1109 }
1110 }
1111
1112 if (inst->header.opcode != BRW_OPCODE_NOP) {
1113 string (file, "(");
1114 err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL);
1115 string (file, ")");
1116 }
1117
1118 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6)
1119 format (file, " %d", inst->header.destreg__conditionalmod);
1120
1121 if (opcode[inst->header.opcode].nsrc == 3) {
1122 pad (file, 16);
1123 err |= dest_3src (file, inst);
1124
1125 pad (file, 32);
1126 err |= src0_3src (file, inst);
1127
1128 pad (file, 48);
1129 err |= src1_3src (file, inst);
1130
1131 pad (file, 64);
1132 err |= src2_3src (file, inst);
1133 } else {
1134 if (opcode[inst->header.opcode].ndst > 0) {
1135 pad (file, 16);
1136 err |= dest (file, inst);
1137 } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE ||
1138 inst->header.opcode == BRW_OPCODE_ENDIF ||
1139 inst->header.opcode == BRW_OPCODE_WHILE)) {
1140 format (file, " %d", inst->bits3.break_cont.jip);
1141 } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF ||
1142 inst->header.opcode == BRW_OPCODE_ELSE ||
1143 inst->header.opcode == BRW_OPCODE_ENDIF ||
1144 inst->header.opcode == BRW_OPCODE_WHILE)) {
1145 format (file, " %d", inst->bits1.branch_gen6.jump_count);
1146 } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK ||
1147 inst->header.opcode == BRW_OPCODE_CONTINUE ||
1148 inst->header.opcode == BRW_OPCODE_HALT)) ||
1149 (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) {
1150 format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip);
1151 } else if (inst->header.opcode == BRW_OPCODE_JMPI) {
1152 format (file, " %d", inst->bits3.d);
1153 }
1154
1155 if (opcode[inst->header.opcode].nsrc > 0) {
1156 pad (file, 32);
1157 err |= src0 (file, inst);
1158 }
1159 if (opcode[inst->header.opcode].nsrc > 1) {
1160 pad (file, 48);
1161 err |= src1 (file, inst);
1162 }
1163 }
1164
1165 if (inst->header.opcode == BRW_OPCODE_SEND ||
1166 inst->header.opcode == BRW_OPCODE_SENDC) {
1167 enum brw_message_target target;
1168
1169 if (gen >= 6)
1170 target = inst->header.destreg__conditionalmod;
1171 else if (gen == 5)
1172 target = inst->bits2.send_gen5.sfid;
1173 else
1174 target = inst->bits3.generic.msg_target;
1175
1176 newline (file);
1177 pad (file, 16);
1178 space = 0;
1179
1180 if (gen >= 6) {
1181 err |= control (file, "target function", target_function_gen6,
1182 target, &space);
1183 } else {
1184 err |= control (file, "target function", target_function,
1185 target, &space);
1186 }
1187
1188 switch (target) {
1189 case BRW_SFID_MATH:
1190 err |= control (file, "math function", math_function,
1191 inst->bits3.math.function, &space);
1192 err |= control (file, "math saturate", math_saturate,
1193 inst->bits3.math.saturate, &space);
1194 err |= control (file, "math signed", math_signed,
1195 inst->bits3.math.int_type, &space);
1196 err |= control (file, "math scalar", math_scalar,
1197 inst->bits3.math.data_type, &space);
1198 err |= control (file, "math precision", math_precision,
1199 inst->bits3.math.precision, &space);
1200 break;
1201 case BRW_SFID_SAMPLER:
1202 if (gen >= 7) {
1203 format (file, " (%d, %d, %d, %d)",
1204 inst->bits3.sampler_gen7.binding_table_index,
1205 inst->bits3.sampler_gen7.sampler,
1206 inst->bits3.sampler_gen7.msg_type,
1207 inst->bits3.sampler_gen7.simd_mode);
1208 } else if (gen >= 5) {
1209 format (file, " (%d, %d, %d, %d)",
1210 inst->bits3.sampler_gen5.binding_table_index,
1211 inst->bits3.sampler_gen5.sampler,
1212 inst->bits3.sampler_gen5.msg_type,
1213 inst->bits3.sampler_gen5.simd_mode);
1214 } else if (0 /* FINISHME: is_g4x */) {
1215 format (file, " (%d, %d)",
1216 inst->bits3.sampler_g4x.binding_table_index,
1217 inst->bits3.sampler_g4x.sampler);
1218 } else {
1219 format (file, " (%d, %d, ",
1220 inst->bits3.sampler.binding_table_index,
1221 inst->bits3.sampler.sampler);
1222 err |= control (file, "sampler target format",
1223 sampler_target_format,
1224 inst->bits3.sampler.return_format, NULL);
1225 string (file, ")");
1226 }
1227 break;
1228 case BRW_SFID_DATAPORT_READ:
1229 if (gen >= 6) {
1230 format (file, " (%d, %d, %d, %d)",
1231 inst->bits3.gen6_dp.binding_table_index,
1232 inst->bits3.gen6_dp.msg_control,
1233 inst->bits3.gen6_dp.msg_type,
1234 inst->bits3.gen6_dp.send_commit_msg);
1235 } else if (gen >= 5 /* FINISHME: || is_g4x */) {
1236 format (file, " (%d, %d, %d)",
1237 inst->bits3.dp_read_gen5.binding_table_index,
1238 inst->bits3.dp_read_gen5.msg_control,
1239 inst->bits3.dp_read_gen5.msg_type);
1240 } else {
1241 format (file, " (%d, %d, %d)",
1242 inst->bits3.dp_read.binding_table_index,
1243 inst->bits3.dp_read.msg_control,
1244 inst->bits3.dp_read.msg_type);
1245 }
1246 break;
1247
1248 case BRW_SFID_DATAPORT_WRITE:
1249 if (gen >= 7) {
1250 format (file, " (");
1251
1252 err |= control (file, "DP rc message type",
1253 dp_rc_msg_type_gen6,
1254 inst->bits3.gen7_dp.msg_type, &space);
1255
1256 format (file, ", %d, %d, %d)",
1257 inst->bits3.gen7_dp.binding_table_index,
1258 inst->bits3.gen7_dp.msg_control,
1259 inst->bits3.gen7_dp.msg_type);
1260 } else if (gen == 6) {
1261 format (file, " (");
1262
1263 err |= control (file, "DP rc message type",
1264 dp_rc_msg_type_gen6,
1265 inst->bits3.gen6_dp.msg_type, &space);
1266
1267 format (file, ", %d, %d, %d, %d)",
1268 inst->bits3.gen6_dp.binding_table_index,
1269 inst->bits3.gen6_dp.msg_control,
1270 inst->bits3.gen6_dp.msg_type,
1271 inst->bits3.gen6_dp.send_commit_msg);
1272 } else {
1273 format (file, " (%d, %d, %d, %d)",
1274 inst->bits3.dp_write.binding_table_index,
1275 (inst->bits3.dp_write.last_render_target << 3) |
1276 inst->bits3.dp_write.msg_control,
1277 inst->bits3.dp_write.msg_type,
1278 inst->bits3.dp_write.send_commit_msg);
1279 }
1280 break;
1281
1282 case BRW_SFID_URB:
1283 if (gen >= 5) {
1284 format (file, " %d", inst->bits3.urb_gen5.offset);
1285 } else {
1286 format (file, " %d", inst->bits3.urb.offset);
1287 }
1288
1289 space = 1;
1290 if (gen >= 5) {
1291 err |= control (file, "urb opcode", urb_opcode,
1292 inst->bits3.urb_gen5.opcode, &space);
1293 }
1294 err |= control (file, "urb swizzle", urb_swizzle,
1295 inst->bits3.urb.swizzle_control, &space);
1296 err |= control (file, "urb allocate", urb_allocate,
1297 inst->bits3.urb.allocate, &space);
1298 err |= control (file, "urb used", urb_used,
1299 inst->bits3.urb.used, &space);
1300 err |= control (file, "urb complete", urb_complete,
1301 inst->bits3.urb.complete, &space);
1302 break;
1303 case BRW_SFID_THREAD_SPAWNER:
1304 break;
1305 case GEN7_SFID_DATAPORT_DATA_CACHE:
1306 format (file, " (%d, %d, %d)",
1307 inst->bits3.gen7_dp.binding_table_index,
1308 inst->bits3.gen7_dp.msg_control,
1309 inst->bits3.gen7_dp.msg_type);
1310 break;
1311
1312
1313 default:
1314 format (file, "unsupported target %d", target);
1315 break;
1316 }
1317 if (space)
1318 string (file, " ");
1319 if (gen >= 5) {
1320 format (file, "mlen %d",
1321 inst->bits3.generic_gen5.msg_length);
1322 format (file, " rlen %d",
1323 inst->bits3.generic_gen5.response_length);
1324 } else {
1325 format (file, "mlen %d",
1326 inst->bits3.generic.msg_length);
1327 format (file, " rlen %d",
1328 inst->bits3.generic.response_length);
1329 }
1330 }
1331 pad (file, 64);
1332 if (inst->header.opcode != BRW_OPCODE_NOP) {
1333 string (file, "{");
1334 space = 1;
1335 err |= control(file, "access mode", access_mode, inst->header.access_mode, &space);
1336 if (gen >= 6)
1337 err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space);
1338 else
1339 err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space);
1340 err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
1341
1342 if (gen >= 6)
1343 err |= qtr_ctrl (file, inst);
1344 else {
1345 if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
1346 opcode[inst->header.opcode].ndst > 0 &&
1347 inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE &&
1348 inst->bits1.da1.dest_reg_nr & (1 << 7)) {
1349 format (file, " compr4");
1350 } else {
1351 err |= control (file, "compression control", compr_ctrl,
1352 inst->header.compression_control, &space);
1353 }
1354 }
1355
1356 err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
1357 if (gen >= 6)
1358 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
1359 if (inst->header.opcode == BRW_OPCODE_SEND ||
1360 inst->header.opcode == BRW_OPCODE_SENDC)
1361 err |= control (file, "end of thread", end_of_thread,
1362 inst->bits3.generic.end_of_thread, &space);
1363 if (space)
1364 string (file, " ");
1365 string (file, "}");
1366 }
1367 string (file, ";");
1368 newline (file);
1369 return err;
1370 }