i965: Upload all vertices used
[mesa.git] / src / mesa / drivers / dri / i965 / brw_draw_upload.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #undef NDEBUG
29
30 #include "main/glheader.h"
31 #include "main/bufferobj.h"
32 #include "main/context.h"
33 #include "main/enums.h"
34
35 #include "brw_draw.h"
36 #include "brw_defines.h"
37 #include "brw_context.h"
38 #include "brw_state.h"
39
40 #include "intel_batchbuffer.h"
41 #include "intel_buffer_objects.h"
42
43 static GLuint double_types[5] = {
44 0,
45 BRW_SURFACEFORMAT_R64_FLOAT,
46 BRW_SURFACEFORMAT_R64G64_FLOAT,
47 BRW_SURFACEFORMAT_R64G64B64_FLOAT,
48 BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
49 };
50
51 static GLuint float_types[5] = {
52 0,
53 BRW_SURFACEFORMAT_R32_FLOAT,
54 BRW_SURFACEFORMAT_R32G32_FLOAT,
55 BRW_SURFACEFORMAT_R32G32B32_FLOAT,
56 BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
57 };
58
59 static GLuint half_float_types[5] = {
60 0,
61 BRW_SURFACEFORMAT_R16_FLOAT,
62 BRW_SURFACEFORMAT_R16G16_FLOAT,
63 BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
64 BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
65 };
66
67 static GLuint uint_types_norm[5] = {
68 0,
69 BRW_SURFACEFORMAT_R32_UNORM,
70 BRW_SURFACEFORMAT_R32G32_UNORM,
71 BRW_SURFACEFORMAT_R32G32B32_UNORM,
72 BRW_SURFACEFORMAT_R32G32B32A32_UNORM
73 };
74
75 static GLuint uint_types_scale[5] = {
76 0,
77 BRW_SURFACEFORMAT_R32_USCALED,
78 BRW_SURFACEFORMAT_R32G32_USCALED,
79 BRW_SURFACEFORMAT_R32G32B32_USCALED,
80 BRW_SURFACEFORMAT_R32G32B32A32_USCALED
81 };
82
83 static GLuint int_types_norm[5] = {
84 0,
85 BRW_SURFACEFORMAT_R32_SNORM,
86 BRW_SURFACEFORMAT_R32G32_SNORM,
87 BRW_SURFACEFORMAT_R32G32B32_SNORM,
88 BRW_SURFACEFORMAT_R32G32B32A32_SNORM
89 };
90
91 static GLuint int_types_scale[5] = {
92 0,
93 BRW_SURFACEFORMAT_R32_SSCALED,
94 BRW_SURFACEFORMAT_R32G32_SSCALED,
95 BRW_SURFACEFORMAT_R32G32B32_SSCALED,
96 BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
97 };
98
99 static GLuint ushort_types_norm[5] = {
100 0,
101 BRW_SURFACEFORMAT_R16_UNORM,
102 BRW_SURFACEFORMAT_R16G16_UNORM,
103 BRW_SURFACEFORMAT_R16G16B16_UNORM,
104 BRW_SURFACEFORMAT_R16G16B16A16_UNORM
105 };
106
107 static GLuint ushort_types_scale[5] = {
108 0,
109 BRW_SURFACEFORMAT_R16_USCALED,
110 BRW_SURFACEFORMAT_R16G16_USCALED,
111 BRW_SURFACEFORMAT_R16G16B16_USCALED,
112 BRW_SURFACEFORMAT_R16G16B16A16_USCALED
113 };
114
115 static GLuint short_types_norm[5] = {
116 0,
117 BRW_SURFACEFORMAT_R16_SNORM,
118 BRW_SURFACEFORMAT_R16G16_SNORM,
119 BRW_SURFACEFORMAT_R16G16B16_SNORM,
120 BRW_SURFACEFORMAT_R16G16B16A16_SNORM
121 };
122
123 static GLuint short_types_scale[5] = {
124 0,
125 BRW_SURFACEFORMAT_R16_SSCALED,
126 BRW_SURFACEFORMAT_R16G16_SSCALED,
127 BRW_SURFACEFORMAT_R16G16B16_SSCALED,
128 BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
129 };
130
131 static GLuint ubyte_types_norm[5] = {
132 0,
133 BRW_SURFACEFORMAT_R8_UNORM,
134 BRW_SURFACEFORMAT_R8G8_UNORM,
135 BRW_SURFACEFORMAT_R8G8B8_UNORM,
136 BRW_SURFACEFORMAT_R8G8B8A8_UNORM
137 };
138
139 static GLuint ubyte_types_scale[5] = {
140 0,
141 BRW_SURFACEFORMAT_R8_USCALED,
142 BRW_SURFACEFORMAT_R8G8_USCALED,
143 BRW_SURFACEFORMAT_R8G8B8_USCALED,
144 BRW_SURFACEFORMAT_R8G8B8A8_USCALED
145 };
146
147 static GLuint byte_types_norm[5] = {
148 0,
149 BRW_SURFACEFORMAT_R8_SNORM,
150 BRW_SURFACEFORMAT_R8G8_SNORM,
151 BRW_SURFACEFORMAT_R8G8B8_SNORM,
152 BRW_SURFACEFORMAT_R8G8B8A8_SNORM
153 };
154
155 static GLuint byte_types_scale[5] = {
156 0,
157 BRW_SURFACEFORMAT_R8_SSCALED,
158 BRW_SURFACEFORMAT_R8G8_SSCALED,
159 BRW_SURFACEFORMAT_R8G8B8_SSCALED,
160 BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
161 };
162
163
164 /**
165 * Given vertex array type/size/format/normalized info, return
166 * the appopriate hardware surface type.
167 * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
168 */
169 static GLuint get_surface_type( GLenum type, GLuint size,
170 GLenum format, GLboolean normalized )
171 {
172 if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
173 printf("type %s size %d normalized %d\n",
174 _mesa_lookup_enum_by_nr(type), size, normalized);
175
176 if (normalized) {
177 switch (type) {
178 case GL_DOUBLE: return double_types[size];
179 case GL_FLOAT: return float_types[size];
180 case GL_HALF_FLOAT: return half_float_types[size];
181 case GL_INT: return int_types_norm[size];
182 case GL_SHORT: return short_types_norm[size];
183 case GL_BYTE: return byte_types_norm[size];
184 case GL_UNSIGNED_INT: return uint_types_norm[size];
185 case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
186 case GL_UNSIGNED_BYTE:
187 if (format == GL_BGRA) {
188 /* See GL_EXT_vertex_array_bgra */
189 assert(size == 4);
190 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
191 }
192 else {
193 return ubyte_types_norm[size];
194 }
195 default: assert(0); return 0;
196 }
197 }
198 else {
199 assert(format == GL_RGBA); /* sanity check */
200 switch (type) {
201 case GL_DOUBLE: return double_types[size];
202 case GL_FLOAT: return float_types[size];
203 case GL_HALF_FLOAT: return half_float_types[size];
204 case GL_INT: return int_types_scale[size];
205 case GL_SHORT: return short_types_scale[size];
206 case GL_BYTE: return byte_types_scale[size];
207 case GL_UNSIGNED_INT: return uint_types_scale[size];
208 case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
209 case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
210 default: assert(0); return 0;
211 }
212 }
213 }
214
215
216 static GLuint get_size( GLenum type )
217 {
218 switch (type) {
219 case GL_DOUBLE: return sizeof(GLdouble);
220 case GL_FLOAT: return sizeof(GLfloat);
221 case GL_HALF_FLOAT: return sizeof(GLhalfARB);
222 case GL_INT: return sizeof(GLint);
223 case GL_SHORT: return sizeof(GLshort);
224 case GL_BYTE: return sizeof(GLbyte);
225 case GL_UNSIGNED_INT: return sizeof(GLuint);
226 case GL_UNSIGNED_SHORT: return sizeof(GLushort);
227 case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
228 default: return 0;
229 }
230 }
231
232 static GLuint get_index_type(GLenum type)
233 {
234 switch (type) {
235 case GL_UNSIGNED_BYTE: return BRW_INDEX_BYTE;
236 case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
237 case GL_UNSIGNED_INT: return BRW_INDEX_DWORD;
238 default: assert(0); return 0;
239 }
240 }
241
242 static void
243 copy_array_to_vbo_array(struct brw_context *brw,
244 struct brw_vertex_element *element,
245 int count,
246 struct brw_vertex_buffer *buffer,
247 GLuint dst_stride)
248 {
249 GLuint size = count * dst_stride;
250
251 buffer->stride = dst_stride;
252 if (dst_stride == element->glarray->StrideB) {
253 intel_upload_data(&brw->intel, element->glarray->Ptr, size, dst_stride,
254 &buffer->bo, &buffer->offset);
255 } else {
256 const unsigned char *src = element->glarray->Ptr;
257 char *map = intel_upload_map(&brw->intel, size, dst_stride);
258 char *dst = map;
259 int i;
260
261 for (i = 0; i < count; i++) {
262 memcpy(dst, src, dst_stride);
263 src += element->glarray->StrideB;
264 dst += dst_stride;
265 }
266 intel_upload_unmap(&brw->intel, map, size, dst_stride,
267 &buffer->bo, &buffer->offset);
268 }
269 }
270
271 static void brw_prepare_vertices(struct brw_context *brw)
272 {
273 struct gl_context *ctx = &brw->intel.ctx;
274 struct intel_context *intel = intel_context(ctx);
275 GLbitfield vs_inputs = brw->vs.prog_data->inputs_read;
276 const unsigned char *ptr = NULL;
277 GLuint interleaved = 0, total_size = 0;
278 unsigned int min_index = brw->vb.min_index;
279 unsigned int max_index = brw->vb.max_index;
280 int i, j;
281
282 struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
283 GLuint nr_uploads = 0;
284
285 /* First build an array of pointers to ve's in vb.inputs_read
286 */
287 if (0)
288 printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
289
290 /* Accumulate the list of enabled arrays. */
291 brw->vb.nr_enabled = 0;
292 while (vs_inputs) {
293 GLuint i = _mesa_ffsll(vs_inputs) - 1;
294 struct brw_vertex_element *input = &brw->vb.inputs[i];
295
296 vs_inputs &= ~(1 << i);
297 brw->vb.enabled[brw->vb.nr_enabled++] = input;
298 }
299
300 if (brw->vb.nr_enabled == 0)
301 return;
302
303 if (brw->vb.nr_buffers)
304 goto validate;
305
306 /* XXX: In the rare cases where this happens we fallback all
307 * the way to software rasterization, although a tnl fallback
308 * would be sufficient. I don't know of *any* real world
309 * cases with > 17 vertex attributes enabled, so it probably
310 * isn't an issue at this point.
311 */
312 if (brw->vb.nr_enabled >= BRW_VEP_MAX) {
313 intel->Fallback = GL_TRUE; /* boolean, not bitfield */
314 return;
315 }
316
317 for (i = j = 0; i < brw->vb.nr_enabled; i++) {
318 struct brw_vertex_element *input = brw->vb.enabled[i];
319 const struct gl_client_array *glarray = input->glarray;
320 int type_size = get_size(glarray->Type);
321
322 input->element_size = type_size * glarray->Size;
323
324 if (_mesa_is_bufferobj(glarray->BufferObj)) {
325 struct intel_buffer_object *intel_buffer =
326 intel_buffer_object(glarray->BufferObj);
327 int k;
328
329 for (k = 0; k < i; k++) {
330 const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
331 if (glarray->BufferObj == other->BufferObj &&
332 glarray->StrideB == other->StrideB &&
333 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
334 {
335 input->buffer = brw->vb.enabled[k]->buffer;
336 input->offset = glarray->Ptr - other->Ptr;
337 break;
338 }
339 }
340 if (k == i) {
341 struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
342
343 /* Named buffer object: Just reference its contents directly. */
344 buffer->bo = intel_bufferobj_source(intel, intel_buffer,
345 &buffer->offset);
346 drm_intel_bo_reference(buffer->bo);
347 buffer->offset += (uintptr_t)glarray->Ptr;
348 buffer->stride = glarray->StrideB;
349
350 input->buffer = j++;
351 input->offset = 0;
352 }
353
354 /* This is a common place to reach if the user mistakenly supplies
355 * a pointer in place of a VBO offset. If we just let it go through,
356 * we may end up dereferencing a pointer beyond the bounds of the
357 * GTT. We would hope that the VBO's max_index would save us, but
358 * Mesa appears to hand us min/max values not clipped to the
359 * array object's _MaxElement, and _MaxElement frequently appears
360 * to be wrong anyway.
361 *
362 * The VBO spec allows application termination in this case, and it's
363 * probably a service to the poor programmer to do so rather than
364 * trying to just not render.
365 */
366 assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
367 } else {
368 /* Queue the buffer object up to be uploaded in the next pass,
369 * when we've decided if we're doing interleaved or not.
370 */
371 if (nr_uploads == 0) {
372 /* Position array not properly enabled:
373 */
374 if (input->attrib == VERT_ATTRIB_POS && glarray->StrideB == 0) {
375 intel->Fallback = GL_TRUE; /* boolean, not bitfield */
376 return;
377 }
378
379 interleaved = glarray->StrideB;
380 ptr = glarray->Ptr;
381 }
382 else if (interleaved != glarray->StrideB ||
383 (uintptr_t)(glarray->Ptr - ptr) > interleaved)
384 {
385 interleaved = 0;
386 }
387 else if ((uintptr_t)(glarray->Ptr - ptr) & (type_size -1))
388 {
389 /* enforce natural alignment (for doubles) */
390 interleaved = 0;
391 }
392
393 upload[nr_uploads++] = input;
394 total_size = ALIGN(total_size, type_size);
395 total_size += input->element_size;
396 }
397 }
398
399 /* If we need to upload all the arrays, then we can trim those arrays to
400 * only the used elements [min_index, max_index] so long as we adjust all
401 * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
402 */
403 if (nr_uploads == brw->vb.nr_enabled) {
404 brw->vb.start_vertex_bias = min_index;
405 } else {
406 brw->vb.start_vertex_bias = 0;
407 min_index = 0;
408 }
409
410 /* Handle any arrays to be uploaded. */
411 if (nr_uploads > 1) {
412 if (interleaved && interleaved <= 2*total_size) {
413 /* All uploads are interleaved, so upload the arrays together as
414 * interleaved. First, upload the contents and set up upload[0].
415 */
416 copy_array_to_vbo_array(brw, upload[0], max_index - min_index + 1,
417 &brw->vb.buffers[j], interleaved);
418
419 for (i = 0; i < nr_uploads; i++) {
420 /* Then, just point upload[i] at upload[0]'s buffer. */
421 upload[i]->offset =
422 ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
423 upload[i]->buffer = j;
424 }
425 j++;
426
427 nr_uploads = 0;
428 }
429 else if (total_size < 2048) {
430 /* Upload non-interleaved arrays into a single interleaved array */
431 struct brw_vertex_buffer *buffer;
432 int count = max_index - min_index + 1;
433 int offset;
434 char *map;
435
436 map = intel_upload_map(&brw->intel, total_size * count, total_size);
437 for (i = offset = 0; i < nr_uploads; i++) {
438 const unsigned char *src = upload[i]->glarray->Ptr;
439 int size = upload[i]->element_size;
440 int stride = upload[i]->glarray->StrideB;
441 char *dst;
442 int n;
443
444 offset = ALIGN(offset, get_size(upload[i]->glarray->Type));
445 dst = map + offset;
446 src += min_index * size;
447
448 for (n = 0; n < count; n++) {
449 memcpy(dst, src, size);
450 src += stride;
451 dst += total_size;
452 }
453
454 upload[i]->offset = offset;
455 upload[i]->buffer = j;
456
457 offset += size;
458 }
459 assert(offset == total_size);
460 buffer = &brw->vb.buffers[j++];
461 intel_upload_unmap(&brw->intel, map, offset * count, offset,
462 &buffer->bo, &buffer->offset);
463 buffer->stride = offset;
464
465 nr_uploads = 0;
466 }
467 }
468 /* Upload non-interleaved arrays */
469 for (i = 0; i < nr_uploads; i++) {
470 copy_array_to_vbo_array(brw, upload[i], max_index - min_index + 1,
471 &brw->vb.buffers[j], upload[i]->element_size);
472 upload[i]->buffer = j++;
473 upload[i]->offset = 0;
474 }
475
476 /* can we simply extend the current vb? */
477 if (j == brw->vb.nr_current_buffers) {
478 int delta = 0;
479 for (i = 0; i < j; i++) {
480 int d;
481
482 if (brw->vb.current_buffers[i].handle != brw->vb.buffers[i].bo->handle ||
483 brw->vb.current_buffers[i].stride != brw->vb.buffers[i].stride)
484 break;
485
486 d = brw->vb.buffers[i].offset - brw->vb.current_buffers[i].offset;
487 if (delta == 0)
488 delta = d / brw->vb.current_buffers[i].stride;
489 if (delta * brw->vb.current_buffers[i].stride != d)
490 break;
491 }
492
493 if (i == j) {
494 brw->vb.start_vertex_bias += delta;
495 while (--j >= 0)
496 drm_intel_bo_unreference(brw->vb.buffers[j].bo);
497 j = 0;
498 }
499 }
500
501 brw->vb.nr_buffers = j;
502
503 validate:
504 brw_prepare_query_begin(brw);
505 for (i = 0; i < brw->vb.nr_buffers; i++) {
506 brw_add_validated_bo(brw, brw->vb.buffers[i].bo);
507 }
508 }
509
510 static void brw_emit_vertices(struct brw_context *brw)
511 {
512 struct gl_context *ctx = &brw->intel.ctx;
513 struct intel_context *intel = intel_context(ctx);
514 GLuint i;
515
516 brw_emit_query_begin(brw);
517
518 /* If the VS doesn't read any inputs (calculating vertex position from
519 * a state variable for some reason, for example), emit a single pad
520 * VERTEX_ELEMENT struct and bail.
521 *
522 * The stale VB state stays in place, but they don't do anything unless
523 * a VE loads from them.
524 */
525 if (brw->vb.nr_enabled == 0) {
526 BEGIN_BATCH(3);
527 OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1);
528 if (intel->gen >= 6) {
529 OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
530 GEN6_VE0_VALID |
531 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
532 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
533 } else {
534 OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
535 BRW_VE0_VALID |
536 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
537 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
538 }
539 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
540 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
541 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
542 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
543 CACHED_BATCH();
544 return;
545 }
546
547 /* Now emit VB and VEP state packets.
548 */
549
550 if (brw->vb.nr_buffers) {
551 BEGIN_BATCH(1 + 4*brw->vb.nr_buffers);
552 OUT_BATCH((CMD_VERTEX_BUFFER << 16) | (4*brw->vb.nr_buffers - 1));
553 for (i = 0; i < brw->vb.nr_buffers; i++) {
554 struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
555 uint32_t dw0;
556
557 if (intel->gen >= 6) {
558 dw0 = GEN6_VB0_ACCESS_VERTEXDATA | (i << GEN6_VB0_INDEX_SHIFT);
559 } else {
560 dw0 = BRW_VB0_ACCESS_VERTEXDATA | (i << BRW_VB0_INDEX_SHIFT);
561 }
562
563 OUT_BATCH(dw0 | (buffer->stride << BRW_VB0_PITCH_SHIFT));
564 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset);
565 if (intel->gen >= 5) {
566 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->bo->size - 1);
567 } else
568 OUT_BATCH(buffer->bo->size / buffer->stride);
569 OUT_BATCH(0); /* Instance data step rate */
570
571 brw->vb.current_buffers[i].handle = buffer->bo->handle;
572 brw->vb.current_buffers[i].offset = buffer->offset;
573 brw->vb.current_buffers[i].stride = buffer->stride;
574 }
575 brw->vb.nr_current_buffers = i;
576 ADVANCE_BATCH();
577 }
578
579 BEGIN_BATCH(1 + brw->vb.nr_enabled * 2);
580 OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | (2*brw->vb.nr_enabled - 1));
581 for (i = 0; i < brw->vb.nr_enabled; i++) {
582 struct brw_vertex_element *input = brw->vb.enabled[i];
583 uint32_t format = get_surface_type(input->glarray->Type,
584 input->glarray->Size,
585 input->glarray->Format,
586 input->glarray->Normalized);
587 uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
588 uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
589 uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
590 uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
591
592 switch (input->glarray->Size) {
593 case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
594 case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
595 case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
596 case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
597 break;
598 }
599
600 if (intel->gen >= 6) {
601 OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
602 GEN6_VE0_VALID |
603 (format << BRW_VE0_FORMAT_SHIFT) |
604 (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
605 } else {
606 OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
607 BRW_VE0_VALID |
608 (format << BRW_VE0_FORMAT_SHIFT) |
609 (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
610 }
611
612 if (intel->gen >= 5)
613 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
614 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
615 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
616 (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
617 else
618 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
619 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
620 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
621 (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
622 ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
623 }
624 CACHED_BATCH();
625 }
626
627 const struct brw_tracked_state brw_vertices = {
628 .dirty = {
629 .mesa = 0,
630 .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
631 .cache = 0,
632 },
633 .prepare = brw_prepare_vertices,
634 .emit = brw_emit_vertices,
635 };
636
637 static void brw_prepare_indices(struct brw_context *brw)
638 {
639 struct gl_context *ctx = &brw->intel.ctx;
640 struct intel_context *intel = &brw->intel;
641 const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
642 GLuint ib_size;
643 drm_intel_bo *bo = NULL;
644 struct gl_buffer_object *bufferobj;
645 GLuint offset;
646 GLuint ib_type_size;
647
648 if (index_buffer == NULL)
649 return;
650
651 ib_type_size = get_size(index_buffer->type);
652 ib_size = ib_type_size * index_buffer->count;
653 bufferobj = index_buffer->obj;
654
655 /* Turn into a proper VBO:
656 */
657 if (!_mesa_is_bufferobj(bufferobj)) {
658
659 /* Get new bufferobj, offset:
660 */
661 intel_upload_data(&brw->intel, index_buffer->ptr, ib_size, ib_type_size,
662 &bo, &offset);
663 brw->ib.start_vertex_offset = offset / ib_type_size;
664 offset = 0;
665 } else {
666 offset = (GLuint) (unsigned long) index_buffer->ptr;
667
668 /* If the index buffer isn't aligned to its element size, we have to
669 * rebase it into a temporary.
670 */
671 if ((get_size(index_buffer->type) - 1) & offset) {
672 GLubyte *map = ctx->Driver.MapBuffer(ctx,
673 GL_ELEMENT_ARRAY_BUFFER_ARB,
674 GL_DYNAMIC_DRAW_ARB,
675 bufferobj);
676 map += offset;
677
678 intel_upload_data(&brw->intel, map, ib_size, ib_type_size,
679 &bo, &offset);
680 brw->ib.start_vertex_offset = offset / ib_type_size;
681 offset = 0;
682
683 ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
684 } else {
685 /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
686 * the index buffer state when we're just moving the start index
687 * of our drawing.
688 */
689 brw->ib.start_vertex_offset = offset / ib_type_size;
690
691 bo = intel_bufferobj_source(intel, intel_buffer_object(bufferobj),
692 &offset);
693 drm_intel_bo_reference(bo);
694 }
695 }
696
697 if (brw->ib.bo != bo || brw->ib.offset != offset) {
698 drm_intel_bo_unreference(brw->ib.bo);
699 brw->ib.bo = bo;
700 brw->ib.offset = offset;
701
702 brw_add_validated_bo(brw, brw->ib.bo);
703 brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
704 } else {
705 drm_intel_bo_unreference(bo);
706 }
707 }
708
709 const struct brw_tracked_state brw_indices = {
710 .dirty = {
711 .mesa = 0,
712 .brw = BRW_NEW_INDICES,
713 .cache = 0,
714 },
715 .prepare = brw_prepare_indices,
716 };
717
718 static void brw_emit_index_buffer(struct brw_context *brw)
719 {
720 struct intel_context *intel = &brw->intel;
721 const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
722
723 if (index_buffer == NULL)
724 return;
725
726 BEGIN_BATCH(3);
727 OUT_BATCH(CMD_INDEX_BUFFER << 16 |
728 /* cut index enable << 10 */
729 get_index_type(index_buffer->type) << 8 |
730 1);
731 OUT_RELOC(brw->ib.bo,
732 I915_GEM_DOMAIN_VERTEX, 0,
733 brw->ib.offset);
734 OUT_RELOC(brw->ib.bo,
735 I915_GEM_DOMAIN_VERTEX, 0,
736 brw->ib.bo->size - 1);
737 ADVANCE_BATCH();
738 }
739
740 const struct brw_tracked_state brw_index_buffer = {
741 .dirty = {
742 .mesa = 0,
743 .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
744 .cache = 0,
745 },
746 .emit = brw_emit_index_buffer,
747 };