1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/bufferobj.h"
32 #include "main/context.h"
33 #include "main/enums.h"
36 #include "brw_defines.h"
37 #include "brw_context.h"
38 #include "brw_state.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_buffer_objects.h"
43 static GLuint double_types
[5] = {
45 BRW_SURFACEFORMAT_R64_FLOAT
,
46 BRW_SURFACEFORMAT_R64G64_FLOAT
,
47 BRW_SURFACEFORMAT_R64G64B64_FLOAT
,
48 BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
51 static GLuint float_types
[5] = {
53 BRW_SURFACEFORMAT_R32_FLOAT
,
54 BRW_SURFACEFORMAT_R32G32_FLOAT
,
55 BRW_SURFACEFORMAT_R32G32B32_FLOAT
,
56 BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
59 static GLuint half_float_types
[5] = {
61 BRW_SURFACEFORMAT_R16_FLOAT
,
62 BRW_SURFACEFORMAT_R16G16_FLOAT
,
63 BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
,
64 BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
67 static GLuint uint_types_norm
[5] = {
69 BRW_SURFACEFORMAT_R32_UNORM
,
70 BRW_SURFACEFORMAT_R32G32_UNORM
,
71 BRW_SURFACEFORMAT_R32G32B32_UNORM
,
72 BRW_SURFACEFORMAT_R32G32B32A32_UNORM
75 static GLuint uint_types_scale
[5] = {
77 BRW_SURFACEFORMAT_R32_USCALED
,
78 BRW_SURFACEFORMAT_R32G32_USCALED
,
79 BRW_SURFACEFORMAT_R32G32B32_USCALED
,
80 BRW_SURFACEFORMAT_R32G32B32A32_USCALED
83 static GLuint int_types_norm
[5] = {
85 BRW_SURFACEFORMAT_R32_SNORM
,
86 BRW_SURFACEFORMAT_R32G32_SNORM
,
87 BRW_SURFACEFORMAT_R32G32B32_SNORM
,
88 BRW_SURFACEFORMAT_R32G32B32A32_SNORM
91 static GLuint int_types_scale
[5] = {
93 BRW_SURFACEFORMAT_R32_SSCALED
,
94 BRW_SURFACEFORMAT_R32G32_SSCALED
,
95 BRW_SURFACEFORMAT_R32G32B32_SSCALED
,
96 BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
99 static GLuint ushort_types_norm
[5] = {
101 BRW_SURFACEFORMAT_R16_UNORM
,
102 BRW_SURFACEFORMAT_R16G16_UNORM
,
103 BRW_SURFACEFORMAT_R16G16B16_UNORM
,
104 BRW_SURFACEFORMAT_R16G16B16A16_UNORM
107 static GLuint ushort_types_scale
[5] = {
109 BRW_SURFACEFORMAT_R16_USCALED
,
110 BRW_SURFACEFORMAT_R16G16_USCALED
,
111 BRW_SURFACEFORMAT_R16G16B16_USCALED
,
112 BRW_SURFACEFORMAT_R16G16B16A16_USCALED
115 static GLuint short_types_norm
[5] = {
117 BRW_SURFACEFORMAT_R16_SNORM
,
118 BRW_SURFACEFORMAT_R16G16_SNORM
,
119 BRW_SURFACEFORMAT_R16G16B16_SNORM
,
120 BRW_SURFACEFORMAT_R16G16B16A16_SNORM
123 static GLuint short_types_scale
[5] = {
125 BRW_SURFACEFORMAT_R16_SSCALED
,
126 BRW_SURFACEFORMAT_R16G16_SSCALED
,
127 BRW_SURFACEFORMAT_R16G16B16_SSCALED
,
128 BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
131 static GLuint ubyte_types_norm
[5] = {
133 BRW_SURFACEFORMAT_R8_UNORM
,
134 BRW_SURFACEFORMAT_R8G8_UNORM
,
135 BRW_SURFACEFORMAT_R8G8B8_UNORM
,
136 BRW_SURFACEFORMAT_R8G8B8A8_UNORM
139 static GLuint ubyte_types_scale
[5] = {
141 BRW_SURFACEFORMAT_R8_USCALED
,
142 BRW_SURFACEFORMAT_R8G8_USCALED
,
143 BRW_SURFACEFORMAT_R8G8B8_USCALED
,
144 BRW_SURFACEFORMAT_R8G8B8A8_USCALED
147 static GLuint byte_types_norm
[5] = {
149 BRW_SURFACEFORMAT_R8_SNORM
,
150 BRW_SURFACEFORMAT_R8G8_SNORM
,
151 BRW_SURFACEFORMAT_R8G8B8_SNORM
,
152 BRW_SURFACEFORMAT_R8G8B8A8_SNORM
155 static GLuint byte_types_scale
[5] = {
157 BRW_SURFACEFORMAT_R8_SSCALED
,
158 BRW_SURFACEFORMAT_R8G8_SSCALED
,
159 BRW_SURFACEFORMAT_R8G8B8_SSCALED
,
160 BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
165 * Given vertex array type/size/format/normalized info, return
166 * the appopriate hardware surface type.
167 * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
169 static GLuint
get_surface_type( GLenum type
, GLuint size
,
170 GLenum format
, GLboolean normalized
)
172 if (unlikely(INTEL_DEBUG
& DEBUG_VERTS
))
173 printf("type %s size %d normalized %d\n",
174 _mesa_lookup_enum_by_nr(type
), size
, normalized
);
178 case GL_DOUBLE
: return double_types
[size
];
179 case GL_FLOAT
: return float_types
[size
];
180 case GL_HALF_FLOAT
: return half_float_types
[size
];
181 case GL_INT
: return int_types_norm
[size
];
182 case GL_SHORT
: return short_types_norm
[size
];
183 case GL_BYTE
: return byte_types_norm
[size
];
184 case GL_UNSIGNED_INT
: return uint_types_norm
[size
];
185 case GL_UNSIGNED_SHORT
: return ushort_types_norm
[size
];
186 case GL_UNSIGNED_BYTE
:
187 if (format
== GL_BGRA
) {
188 /* See GL_EXT_vertex_array_bgra */
190 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
193 return ubyte_types_norm
[size
];
195 default: assert(0); return 0;
199 assert(format
== GL_RGBA
); /* sanity check */
201 case GL_DOUBLE
: return double_types
[size
];
202 case GL_FLOAT
: return float_types
[size
];
203 case GL_HALF_FLOAT
: return half_float_types
[size
];
204 case GL_INT
: return int_types_scale
[size
];
205 case GL_SHORT
: return short_types_scale
[size
];
206 case GL_BYTE
: return byte_types_scale
[size
];
207 case GL_UNSIGNED_INT
: return uint_types_scale
[size
];
208 case GL_UNSIGNED_SHORT
: return ushort_types_scale
[size
];
209 case GL_UNSIGNED_BYTE
: return ubyte_types_scale
[size
];
210 default: assert(0); return 0;
216 static GLuint
get_size( GLenum type
)
219 case GL_DOUBLE
: return sizeof(GLdouble
);
220 case GL_FLOAT
: return sizeof(GLfloat
);
221 case GL_HALF_FLOAT
: return sizeof(GLhalfARB
);
222 case GL_INT
: return sizeof(GLint
);
223 case GL_SHORT
: return sizeof(GLshort
);
224 case GL_BYTE
: return sizeof(GLbyte
);
225 case GL_UNSIGNED_INT
: return sizeof(GLuint
);
226 case GL_UNSIGNED_SHORT
: return sizeof(GLushort
);
227 case GL_UNSIGNED_BYTE
: return sizeof(GLubyte
);
228 default: assert(0); return 0;
232 static GLuint
get_index_type(GLenum type
)
235 case GL_UNSIGNED_BYTE
: return BRW_INDEX_BYTE
;
236 case GL_UNSIGNED_SHORT
: return BRW_INDEX_WORD
;
237 case GL_UNSIGNED_INT
: return BRW_INDEX_DWORD
;
238 default: assert(0); return 0;
243 copy_array_to_vbo_array(struct brw_context
*brw
,
244 struct brw_vertex_element
*element
,
246 struct brw_vertex_buffer
*buffer
,
249 int src_stride
= element
->glarray
->StrideB
;
250 const unsigned char *src
= element
->glarray
->Ptr
+ min
* src_stride
;
251 int count
= max
- min
+ 1;
252 GLuint size
= count
* dst_stride
;
254 if (dst_stride
== src_stride
) {
255 intel_upload_data(&brw
->intel
, src
, size
, dst_stride
,
256 &buffer
->bo
, &buffer
->offset
);
258 char * const map
= intel_upload_map(&brw
->intel
, size
, dst_stride
);
262 memcpy(dst
, src
, dst_stride
);
266 intel_upload_unmap(&brw
->intel
, map
, size
, dst_stride
,
267 &buffer
->bo
, &buffer
->offset
);
269 buffer
->stride
= dst_stride
;
272 static void brw_prepare_vertices(struct brw_context
*brw
)
274 struct gl_context
*ctx
= &brw
->intel
.ctx
;
275 struct intel_context
*intel
= intel_context(ctx
);
276 GLbitfield vs_inputs
= brw
->vs
.prog_data
->inputs_read
;
277 const unsigned char *ptr
= NULL
;
278 GLuint interleaved
= 0, total_size
= 0;
279 unsigned int min_index
= brw
->vb
.min_index
;
280 unsigned int max_index
= brw
->vb
.max_index
;
283 struct brw_vertex_element
*upload
[VERT_ATTRIB_MAX
];
284 GLuint nr_uploads
= 0;
286 /* First build an array of pointers to ve's in vb.inputs_read
289 printf("%s %d..%d\n", __FUNCTION__
, min_index
, max_index
);
291 /* Accumulate the list of enabled arrays. */
292 brw
->vb
.nr_enabled
= 0;
294 GLuint i
= _mesa_ffsll(vs_inputs
) - 1;
295 struct brw_vertex_element
*input
= &brw
->vb
.inputs
[i
];
297 vs_inputs
&= ~(1 << i
);
298 if (input
->glarray
->Size
&& get_size(input
->glarray
->Type
))
299 brw
->vb
.enabled
[brw
->vb
.nr_enabled
++] = input
;
302 if (brw
->vb
.nr_enabled
== 0)
305 if (brw
->vb
.nr_buffers
)
308 /* XXX: In the rare cases where this happens we fallback all
309 * the way to software rasterization, although a tnl fallback
310 * would be sufficient. I don't know of *any* real world
311 * cases with > 17 vertex attributes enabled, so it probably
312 * isn't an issue at this point.
314 if (brw
->vb
.nr_enabled
>= BRW_VEP_MAX
) {
315 intel
->Fallback
= GL_TRUE
; /* boolean, not bitfield */
319 for (i
= j
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
320 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
321 const struct gl_client_array
*glarray
= input
->glarray
;
322 int type_size
= get_size(glarray
->Type
);
324 input
->element_size
= type_size
* glarray
->Size
;
326 if (_mesa_is_bufferobj(glarray
->BufferObj
)) {
327 struct intel_buffer_object
*intel_buffer
=
328 intel_buffer_object(glarray
->BufferObj
);
331 for (k
= 0; k
< i
; k
++) {
332 const struct gl_client_array
*other
= brw
->vb
.enabled
[k
]->glarray
;
333 if (glarray
->BufferObj
== other
->BufferObj
&&
334 glarray
->StrideB
== other
->StrideB
&&
335 (uintptr_t)(glarray
->Ptr
- other
->Ptr
) < glarray
->StrideB
)
337 input
->buffer
= brw
->vb
.enabled
[k
]->buffer
;
338 input
->offset
= glarray
->Ptr
- other
->Ptr
;
343 struct brw_vertex_buffer
*buffer
= &brw
->vb
.buffers
[j
];
345 /* Named buffer object: Just reference its contents directly. */
346 buffer
->bo
= intel_bufferobj_source(intel
,
347 intel_buffer
, type_size
,
349 drm_intel_bo_reference(buffer
->bo
);
350 buffer
->offset
+= (uintptr_t)glarray
->Ptr
;
351 buffer
->stride
= glarray
->StrideB
;
357 /* This is a common place to reach if the user mistakenly supplies
358 * a pointer in place of a VBO offset. If we just let it go through,
359 * we may end up dereferencing a pointer beyond the bounds of the
360 * GTT. We would hope that the VBO's max_index would save us, but
361 * Mesa appears to hand us min/max values not clipped to the
362 * array object's _MaxElement, and _MaxElement frequently appears
363 * to be wrong anyway.
365 * The VBO spec allows application termination in this case, and it's
366 * probably a service to the poor programmer to do so rather than
367 * trying to just not render.
369 assert(input
->offset
< brw
->vb
.buffers
[input
->buffer
].bo
->size
);
371 /* Queue the buffer object up to be uploaded in the next pass,
372 * when we've decided if we're doing interleaved or not.
374 if (nr_uploads
== 0) {
375 /* Position array not properly enabled:
377 if (input
->attrib
== VERT_ATTRIB_POS
&& glarray
->StrideB
== 0) {
378 intel
->Fallback
= GL_TRUE
; /* boolean, not bitfield */
382 interleaved
= glarray
->StrideB
;
385 else if (interleaved
!= glarray
->StrideB
||
386 (uintptr_t)(glarray
->Ptr
- ptr
) > interleaved
)
390 else if ((uintptr_t)(glarray
->Ptr
- ptr
) & (type_size
-1))
392 /* enforce natural alignment (for doubles) */
396 upload
[nr_uploads
++] = input
;
397 total_size
= ALIGN(total_size
, type_size
);
398 total_size
+= input
->element_size
;
402 /* If we need to upload all the arrays, then we can trim those arrays to
403 * only the used elements [min_index, max_index] so long as we adjust all
404 * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
406 brw
->vb
.start_vertex_bias
= 0;
408 if (nr_uploads
== brw
->vb
.nr_enabled
) {
409 brw
->vb
.start_vertex_bias
= -delta
;
412 if (delta
&& !brw
->intel
.intelScreen
->relaxed_relocations
)
413 min_index
= delta
= 0;
415 /* Handle any arrays to be uploaded. */
416 if (nr_uploads
> 1) {
417 if (interleaved
&& interleaved
<= 2*total_size
) {
418 struct brw_vertex_buffer
*buffer
= &brw
->vb
.buffers
[j
];
419 /* All uploads are interleaved, so upload the arrays together as
420 * interleaved. First, upload the contents and set up upload[0].
422 copy_array_to_vbo_array(brw
, upload
[0], min_index
, max_index
,
423 buffer
, interleaved
);
424 buffer
->offset
-= delta
* interleaved
;
426 for (i
= 0; i
< nr_uploads
; i
++) {
427 /* Then, just point upload[i] at upload[0]'s buffer. */
429 ((const unsigned char *)upload
[i
]->glarray
->Ptr
- ptr
);
430 upload
[i
]->buffer
= j
;
436 else if (total_size
< 2048) {
437 /* Upload non-interleaved arrays into a single interleaved array */
438 struct brw_vertex_buffer
*buffer
;
439 int count
= max_index
- min_index
+ 1;
443 map
= intel_upload_map(&brw
->intel
, total_size
* count
, total_size
);
444 for (i
= offset
= 0; i
< nr_uploads
; i
++) {
445 const unsigned char *src
= upload
[i
]->glarray
->Ptr
;
446 int size
= upload
[i
]->element_size
;
447 int stride
= upload
[i
]->glarray
->StrideB
;
451 offset
= ALIGN(offset
, get_size(upload
[i
]->glarray
->Type
));
453 src
+= min_index
* stride
;
455 for (n
= 0; n
< count
; n
++) {
456 memcpy(dst
, src
, size
);
461 upload
[i
]->offset
= offset
;
462 upload
[i
]->buffer
= j
;
466 assert(offset
== total_size
);
467 buffer
= &brw
->vb
.buffers
[j
++];
468 intel_upload_unmap(&brw
->intel
, map
, offset
* count
, offset
,
469 &buffer
->bo
, &buffer
->offset
);
470 buffer
->stride
= offset
;
471 buffer
->offset
-= delta
* offset
;
476 /* Upload non-interleaved arrays */
477 for (i
= 0; i
< nr_uploads
; i
++) {
478 struct brw_vertex_buffer
*buffer
= &brw
->vb
.buffers
[j
];
479 copy_array_to_vbo_array(brw
, upload
[i
], min_index
, max_index
,
480 buffer
, upload
[i
]->element_size
);
481 buffer
->offset
-= delta
* buffer
->stride
;
482 upload
[i
]->buffer
= j
++;
483 upload
[i
]->offset
= 0;
486 /* can we simply extend the current vb? */
487 if (j
== brw
->vb
.nr_current_buffers
) {
489 for (i
= 0; i
< j
; i
++) {
492 if (brw
->vb
.current_buffers
[i
].handle
!= brw
->vb
.buffers
[i
].bo
->handle
||
493 brw
->vb
.current_buffers
[i
].stride
!= brw
->vb
.buffers
[i
].stride
)
496 d
= brw
->vb
.buffers
[i
].offset
- brw
->vb
.current_buffers
[i
].offset
;
498 delta
= d
/ brw
->vb
.current_buffers
[i
].stride
;
499 if (delta
* brw
->vb
.current_buffers
[i
].stride
!= d
)
504 brw
->vb
.start_vertex_bias
+= delta
;
506 drm_intel_bo_unreference(brw
->vb
.buffers
[j
].bo
);
511 brw
->vb
.nr_buffers
= j
;
514 brw_prepare_query_begin(brw
);
515 for (i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
516 brw_add_validated_bo(brw
, brw
->vb
.buffers
[i
].bo
);
520 static void brw_emit_vertices(struct brw_context
*brw
)
522 struct gl_context
*ctx
= &brw
->intel
.ctx
;
523 struct intel_context
*intel
= intel_context(ctx
);
526 brw_emit_query_begin(brw
);
528 /* If the VS doesn't read any inputs (calculating vertex position from
529 * a state variable for some reason, for example), emit a single pad
530 * VERTEX_ELEMENT struct and bail.
532 * The stale VB state stays in place, but they don't do anything unless
533 * a VE loads from them.
535 if (brw
->vb
.nr_enabled
== 0) {
537 OUT_BATCH((CMD_VERTEX_ELEMENT
<< 16) | 1);
538 if (intel
->gen
>= 6) {
539 OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT
) |
541 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
<< BRW_VE0_FORMAT_SHIFT
) |
542 (0 << BRW_VE0_SRC_OFFSET_SHIFT
));
544 OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT
) |
546 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
<< BRW_VE0_FORMAT_SHIFT
) |
547 (0 << BRW_VE0_SRC_OFFSET_SHIFT
));
549 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
550 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
551 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
552 (BRW_VE1_COMPONENT_STORE_1_FLT
<< BRW_VE1_COMPONENT_3_SHIFT
));
557 /* Now emit VB and VEP state packets.
560 if (brw
->vb
.nr_buffers
) {
561 BEGIN_BATCH(1 + 4*brw
->vb
.nr_buffers
);
562 OUT_BATCH((CMD_VERTEX_BUFFER
<< 16) | (4*brw
->vb
.nr_buffers
- 1));
563 for (i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
564 struct brw_vertex_buffer
*buffer
= &brw
->vb
.buffers
[i
];
567 if (intel
->gen
>= 6) {
568 dw0
= GEN6_VB0_ACCESS_VERTEXDATA
| (i
<< GEN6_VB0_INDEX_SHIFT
);
570 dw0
= BRW_VB0_ACCESS_VERTEXDATA
| (i
<< BRW_VB0_INDEX_SHIFT
);
573 OUT_BATCH(dw0
| (buffer
->stride
<< BRW_VB0_PITCH_SHIFT
));
574 OUT_RELOC(buffer
->bo
, I915_GEM_DOMAIN_VERTEX
, 0, buffer
->offset
);
575 if (intel
->gen
>= 5) {
576 OUT_RELOC(buffer
->bo
, I915_GEM_DOMAIN_VERTEX
, 0, buffer
->bo
->size
- 1);
578 OUT_BATCH(buffer
->bo
->size
/ buffer
->stride
);
579 OUT_BATCH(0); /* Instance data step rate */
581 brw
->vb
.current_buffers
[i
].handle
= buffer
->bo
->handle
;
582 brw
->vb
.current_buffers
[i
].offset
= buffer
->offset
;
583 brw
->vb
.current_buffers
[i
].stride
= buffer
->stride
;
585 brw
->vb
.nr_current_buffers
= i
;
589 BEGIN_BATCH(1 + brw
->vb
.nr_enabled
* 2);
590 OUT_BATCH((CMD_VERTEX_ELEMENT
<< 16) | (2*brw
->vb
.nr_enabled
- 1));
591 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
592 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
593 uint32_t format
= get_surface_type(input
->glarray
->Type
,
594 input
->glarray
->Size
,
595 input
->glarray
->Format
,
596 input
->glarray
->Normalized
);
597 uint32_t comp0
= BRW_VE1_COMPONENT_STORE_SRC
;
598 uint32_t comp1
= BRW_VE1_COMPONENT_STORE_SRC
;
599 uint32_t comp2
= BRW_VE1_COMPONENT_STORE_SRC
;
600 uint32_t comp3
= BRW_VE1_COMPONENT_STORE_SRC
;
602 switch (input
->glarray
->Size
) {
603 case 0: comp0
= BRW_VE1_COMPONENT_STORE_0
;
604 case 1: comp1
= BRW_VE1_COMPONENT_STORE_0
;
605 case 2: comp2
= BRW_VE1_COMPONENT_STORE_0
;
606 case 3: comp3
= BRW_VE1_COMPONENT_STORE_1_FLT
;
610 if (intel
->gen
>= 6) {
611 OUT_BATCH((input
->buffer
<< GEN6_VE0_INDEX_SHIFT
) |
613 (format
<< BRW_VE0_FORMAT_SHIFT
) |
614 (input
->offset
<< BRW_VE0_SRC_OFFSET_SHIFT
));
616 OUT_BATCH((input
->buffer
<< BRW_VE0_INDEX_SHIFT
) |
618 (format
<< BRW_VE0_FORMAT_SHIFT
) |
619 (input
->offset
<< BRW_VE0_SRC_OFFSET_SHIFT
));
623 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
624 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
625 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
626 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
));
628 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
629 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
630 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
631 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
) |
632 ((i
* 4) << BRW_VE1_DST_OFFSET_SHIFT
));
637 const struct brw_tracked_state brw_vertices
= {
640 .brw
= BRW_NEW_BATCH
| BRW_NEW_VERTICES
,
643 .prepare
= brw_prepare_vertices
,
644 .emit
= brw_emit_vertices
,
647 static void brw_prepare_indices(struct brw_context
*brw
)
649 struct gl_context
*ctx
= &brw
->intel
.ctx
;
650 struct intel_context
*intel
= &brw
->intel
;
651 const struct _mesa_index_buffer
*index_buffer
= brw
->ib
.ib
;
653 drm_intel_bo
*bo
= NULL
;
654 struct gl_buffer_object
*bufferobj
;
658 if (index_buffer
== NULL
)
661 ib_type_size
= get_size(index_buffer
->type
);
662 ib_size
= ib_type_size
* index_buffer
->count
;
663 bufferobj
= index_buffer
->obj
;
665 /* Turn into a proper VBO:
667 if (!_mesa_is_bufferobj(bufferobj
)) {
669 /* Get new bufferobj, offset:
671 intel_upload_data(&brw
->intel
, index_buffer
->ptr
, ib_size
, ib_type_size
,
673 brw
->ib
.start_vertex_offset
= offset
/ ib_type_size
;
675 offset
= (GLuint
) (unsigned long) index_buffer
->ptr
;
677 /* If the index buffer isn't aligned to its element size, we have to
678 * rebase it into a temporary.
680 if ((get_size(index_buffer
->type
) - 1) & offset
) {
681 GLubyte
*map
= ctx
->Driver
.MapBuffer(ctx
,
682 GL_ELEMENT_ARRAY_BUFFER_ARB
,
687 intel_upload_data(&brw
->intel
, map
, ib_size
, ib_type_size
,
689 brw
->ib
.start_vertex_offset
= offset
/ ib_type_size
;
691 ctx
->Driver
.UnmapBuffer(ctx
, GL_ELEMENT_ARRAY_BUFFER_ARB
, bufferobj
);
693 /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
694 * the index buffer state when we're just moving the start index
697 brw
->ib
.start_vertex_offset
= offset
/ ib_type_size
;
699 bo
= intel_bufferobj_source(intel
,
700 intel_buffer_object(bufferobj
),
703 drm_intel_bo_reference(bo
);
705 brw
->ib
.start_vertex_offset
+= offset
/ ib_type_size
;
709 if (brw
->ib
.bo
!= bo
) {
710 drm_intel_bo_unreference(brw
->ib
.bo
);
713 brw_add_validated_bo(brw
, brw
->ib
.bo
);
714 brw
->state
.dirty
.brw
|= BRW_NEW_INDEX_BUFFER
;
716 drm_intel_bo_unreference(bo
);
719 if (index_buffer
->type
!= brw
->ib
.type
) {
720 brw
->ib
.type
= index_buffer
->type
;
721 brw
->state
.dirty
.brw
|= BRW_NEW_INDEX_BUFFER
;
725 const struct brw_tracked_state brw_indices
= {
728 .brw
= BRW_NEW_INDICES
,
731 .prepare
= brw_prepare_indices
,
734 static void brw_emit_index_buffer(struct brw_context
*brw
)
736 struct intel_context
*intel
= &brw
->intel
;
737 const struct _mesa_index_buffer
*index_buffer
= brw
->ib
.ib
;
739 if (index_buffer
== NULL
)
743 OUT_BATCH(CMD_INDEX_BUFFER
<< 16 |
744 /* cut index enable << 10 */
745 get_index_type(index_buffer
->type
) << 8 |
747 OUT_RELOC(brw
->ib
.bo
,
748 I915_GEM_DOMAIN_VERTEX
, 0,
750 OUT_RELOC(brw
->ib
.bo
,
751 I915_GEM_DOMAIN_VERTEX
, 0,
752 brw
->ib
.bo
->size
- 1);
756 const struct brw_tracked_state brw_index_buffer
= {
759 .brw
= BRW_NEW_BATCH
| BRW_NEW_INDEX_BUFFER
,
762 .emit
= brw_emit_index_buffer
,