src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/bufferobj.h"
  31 #include "main/context.h"
  32 #include "main/enums.h"
  33
  34 #include "brw_draw.h"
  35 #include "brw_defines.h"
  36 #include "brw_context.h"
  37 #include "brw_state.h"
  38
  39 #include "intel_batchbuffer.h"
  40 #include "intel_buffer_objects.h"
  41
  42 static GLuint double_types[5] = {
  43    0,
  44    BRW_SURFACEFORMAT_R64_FLOAT,
  45    BRW_SURFACEFORMAT_R64G64_FLOAT,
  46    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  47    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  48 };
  49
  50 static GLuint float_types[5] = {
  51    0,
  52    BRW_SURFACEFORMAT_R32_FLOAT,
  53    BRW_SURFACEFORMAT_R32G32_FLOAT,
  54    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  55    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  56 };
  57
  58 static GLuint half_float_types[5] = {
  59    0,
  60    BRW_SURFACEFORMAT_R16_FLOAT,
  61    BRW_SURFACEFORMAT_R16G16_FLOAT,
  62    0, /* can't seem to render this one */
  63    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
  64 };
  65
  66 static GLuint uint_types_norm[5] = {
  67    0,
  68    BRW_SURFACEFORMAT_R32_UNORM,
  69    BRW_SURFACEFORMAT_R32G32_UNORM,
  70    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  71    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  72 };
  73
  74 static GLuint uint_types_scale[5] = {
  75    0,
  76    BRW_SURFACEFORMAT_R32_USCALED,
  77    BRW_SURFACEFORMAT_R32G32_USCALED,
  78    BRW_SURFACEFORMAT_R32G32B32_USCALED,
  79    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
  80 };
  81
  82 static GLuint int_types_norm[5] = {
  83    0,
  84    BRW_SURFACEFORMAT_R32_SNORM,
  85    BRW_SURFACEFORMAT_R32G32_SNORM,
  86    BRW_SURFACEFORMAT_R32G32B32_SNORM,
  87    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
  88 };
  89
  90 static GLuint int_types_scale[5] = {
  91    0,
  92    BRW_SURFACEFORMAT_R32_SSCALED,
  93    BRW_SURFACEFORMAT_R32G32_SSCALED,
  94    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
  95    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
  96 };
  97
  98 static GLuint ushort_types_norm[5] = {
  99    0,
 100    BRW_SURFACEFORMAT_R16_UNORM,
 101    BRW_SURFACEFORMAT_R16G16_UNORM,
 102    BRW_SURFACEFORMAT_R16G16B16_UNORM,
 103    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 104 };
 105
 106 static GLuint ushort_types_scale[5] = {
 107    0,
 108    BRW_SURFACEFORMAT_R16_USCALED,
 109    BRW_SURFACEFORMAT_R16G16_USCALED,
 110    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 111    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 112 };
 113
 114 static GLuint short_types_norm[5] = {
 115    0,
 116    BRW_SURFACEFORMAT_R16_SNORM,
 117    BRW_SURFACEFORMAT_R16G16_SNORM,
 118    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 119    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 120 };
 121
 122 static GLuint short_types_scale[5] = {
 123    0,
 124    BRW_SURFACEFORMAT_R16_SSCALED,
 125    BRW_SURFACEFORMAT_R16G16_SSCALED,
 126    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 127    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 128 };
 129
 130 static GLuint ubyte_types_norm[5] = {
 131    0,
 132    BRW_SURFACEFORMAT_R8_UNORM,
 133    BRW_SURFACEFORMAT_R8G8_UNORM,
 134    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 135    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 136 };
 137
 138 static GLuint ubyte_types_scale[5] = {
 139    0,
 140    BRW_SURFACEFORMAT_R8_USCALED,
 141    BRW_SURFACEFORMAT_R8G8_USCALED,
 142    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 143    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 144 };
 145
 146 static GLuint byte_types_norm[5] = {
 147    0,
 148    BRW_SURFACEFORMAT_R8_SNORM,
 149    BRW_SURFACEFORMAT_R8G8_SNORM,
 150    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 151    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 152 };
 153
 154 static GLuint byte_types_scale[5] = {
 155    0,
 156    BRW_SURFACEFORMAT_R8_SSCALED,
 157    BRW_SURFACEFORMAT_R8G8_SSCALED,
 158    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 159    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 160 };
 161
 162
 163 /**
 164  * Given vertex array type/size/format/normalized info, return
 165  * the appopriate hardware surface type.
 166  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 167  */
 168 static GLuint get_surface_type( GLenum type, GLuint size,
 169                                 GLenum format, GLboolean normalized )
 170 {
 171    if (INTEL_DEBUG & DEBUG_VERTS)
 172       printf("type %s size %d normalized %d\n",
 173                    _mesa_lookup_enum_by_nr(type), size, normalized);
 174
 175    if (normalized) {
 176       switch (type) {
 177       case GL_DOUBLE: return double_types[size];
 178       case GL_FLOAT: return float_types[size];
 179       case GL_HALF_FLOAT: return half_float_types[size];
 180       case GL_INT: return int_types_norm[size];
 181       case GL_SHORT: return short_types_norm[size];
 182       case GL_BYTE: return byte_types_norm[size];
 183       case GL_UNSIGNED_INT: return uint_types_norm[size];
 184       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 185       case GL_UNSIGNED_BYTE:
 186          if (format == GL_BGRA) {
 187             /* See GL_EXT_vertex_array_bgra */
 188             assert(size == 4);
 189             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 190          }
 191          else {
 192             return ubyte_types_norm[size];
 193          }
 194       default: assert(0); return 0;
 195       }
 196    }
 197    else {
 198       assert(format == GL_RGBA); /* sanity check */
 199       switch (type) {
 200       case GL_DOUBLE: return double_types[size];
 201       case GL_FLOAT: return float_types[size];
 202       case GL_HALF_FLOAT: return half_float_types[size];
 203       case GL_INT: return int_types_scale[size];
 204       case GL_SHORT: return short_types_scale[size];
 205       case GL_BYTE: return byte_types_scale[size];
 206       case GL_UNSIGNED_INT: return uint_types_scale[size];
 207       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 208       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 209       default: assert(0); return 0;
 210       }
 211    }
 212 }
 213
 214
 215 static GLuint get_size( GLenum type )
 216 {
 217    switch (type) {
 218    case GL_DOUBLE: return sizeof(GLdouble);
 219    case GL_FLOAT: return sizeof(GLfloat);
 220    case GL_HALF_FLOAT: return sizeof(GLhalfARB);
 221    case GL_INT: return sizeof(GLint);
 222    case GL_SHORT: return sizeof(GLshort);
 223    case GL_BYTE: return sizeof(GLbyte);
 224    case GL_UNSIGNED_INT: return sizeof(GLuint);
 225    case GL_UNSIGNED_SHORT: return sizeof(GLushort);
 226    case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
 227    default: return 0;
 228    }
 229 }
 230
 231 static GLuint get_index_type(GLenum type)
 232 {
 233    switch (type) {
 234    case GL_UNSIGNED_BYTE:  return BRW_INDEX_BYTE;
 235    case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
 236    case GL_UNSIGNED_INT:   return BRW_INDEX_DWORD;
 237    default: assert(0); return 0;
 238    }
 239 }
 240
 241 static void wrap_buffers( struct brw_context *brw,
 242                           GLuint size )
 243 {
 244    if (size < BRW_UPLOAD_INIT_SIZE)
 245       size = BRW_UPLOAD_INIT_SIZE;
 246
 247    brw->vb.upload.offset = 0;
 248
 249    if (brw->vb.upload.bo != NULL)
 250       dri_bo_unreference(brw->vb.upload.bo);
 251    brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
 252                                     size, 1);
 253 }
 254
 255 static void get_space( struct brw_context *brw,
 256                        GLuint size,
 257                        dri_bo **bo_return,
 258                        GLuint *offset_return )
 259 {
 260    size = ALIGN(size, 64);
 261
 262    if (brw->vb.upload.bo == NULL ||
 263        brw->vb.upload.offset + size > brw->vb.upload.bo->size) {
 264       wrap_buffers(brw, size);
 265    }
 266
 267    assert(*bo_return == NULL);
 268    dri_bo_reference(brw->vb.upload.bo);
 269    *bo_return = brw->vb.upload.bo;
 270    *offset_return = brw->vb.upload.offset;
 271    brw->vb.upload.offset += size;
 272 }
 273
 274 static void
 275 copy_array_to_vbo_array( struct brw_context *brw,
 276                          struct brw_vertex_element *element,
 277                          GLuint dst_stride)
 278 {
 279    GLuint size = element->count * dst_stride;
 280
 281    get_space(brw, size, &element->bo, &element->offset);
 282
 283    if (element->glarray->StrideB == 0) {
 284       assert(element->count == 1);
 285       element->stride = 0;
 286    } else {
 287       element->stride = dst_stride;
 288    }
 289
 290    if (dst_stride == element->glarray->StrideB) {
 291       drm_intel_gem_bo_map_gtt(element->bo);
 292       memcpy((char *)element->bo->virtual + element->offset,
 293              element->glarray->Ptr, size);
 294       drm_intel_gem_bo_unmap_gtt(element->bo);
 295    } else {
 296       char *dest;
 297       const unsigned char *src = element->glarray->Ptr;
 298       int i;
 299
 300       drm_intel_gem_bo_map_gtt(element->bo);
 301       dest = element->bo->virtual;
 302       dest += element->offset;
 303
 304       for (i = 0; i < element->count; i++) {
 305          memcpy(dest, src, dst_stride);
 306          src += element->glarray->StrideB;
 307          dest += dst_stride;
 308       }
 309
 310       drm_intel_gem_bo_unmap_gtt(element->bo);
 311    }
 312 }
 313
 314 static void brw_prepare_vertices(struct brw_context *brw)
 315 {
 316    GLcontext *ctx = &brw->intel.ctx;
 317    struct intel_context *intel = intel_context(ctx);
 318    GLbitfield vs_inputs = brw->vs.prog_data->inputs_read;
 319    GLuint i;
 320    const unsigned char *ptr = NULL;
 321    GLuint interleave = 0;
 322    unsigned int min_index = brw->vb.min_index;
 323    unsigned int max_index = brw->vb.max_index;
 324
 325    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 326    GLuint nr_uploads = 0;
 327
 328    /* First build an array of pointers to ve's in vb.inputs_read
 329     */
 330    if (0)
 331       printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
 332
 333    /* Accumulate the list of enabled arrays. */
 334    brw->vb.nr_enabled = 0;
 335    while (vs_inputs) {
 336       GLuint i = _mesa_ffsll(vs_inputs) - 1;
 337       struct brw_vertex_element *input = &brw->vb.inputs[i];
 338
 339       vs_inputs &= ~(1 << i);
 340       brw->vb.enabled[brw->vb.nr_enabled++] = input;
 341    }
 342
 343    /* XXX: In the rare cases where this happens we fallback all
 344     * the way to software rasterization, although a tnl fallback
 345     * would be sufficient.  I don't know of *any* real world
 346     * cases with > 17 vertex attributes enabled, so it probably
 347     * isn't an issue at this point.
 348     */
 349    if (brw->vb.nr_enabled >= BRW_VEP_MAX) {
 350       intel->Fallback = GL_TRUE; /* boolean, not bitfield */
 351       return;
 352    }
 353
 354    for (i = 0; i < brw->vb.nr_enabled; i++) {
 355       struct brw_vertex_element *input = brw->vb.enabled[i];
 356
 357       input->element_size = get_size(input->glarray->Type) * input->glarray->Size;
 358
 359       if (_mesa_is_bufferobj(input->glarray->BufferObj)) {
 360          struct intel_buffer_object *intel_buffer =
 361             intel_buffer_object(input->glarray->BufferObj);
 362
 363          /* Named buffer object: Just reference its contents directly. */
 364          dri_bo_unreference(input->bo);
 365          input->bo = intel_bufferobj_buffer(intel, intel_buffer,
 366                                             INTEL_READ);
 367          dri_bo_reference(input->bo);
 368          input->offset = (unsigned long)input->glarray->Ptr;
 369          input->stride = input->glarray->StrideB;
 370          input->count = input->glarray->_MaxElement;
 371
 372          /* This is a common place to reach if the user mistakenly supplies
 373           * a pointer in place of a VBO offset.  If we just let it go through,
 374           * we may end up dereferencing a pointer beyond the bounds of the
 375           * GTT.  We would hope that the VBO's max_index would save us, but
 376           * Mesa appears to hand us min/max values not clipped to the
 377           * array object's _MaxElement, and _MaxElement frequently appears
 378           * to be wrong anyway.
 379           *
 380           * The VBO spec allows application termination in this case, and it's
 381           * probably a service to the poor programmer to do so rather than
 382           * trying to just not render.
 383           */
 384          assert(input->offset < input->bo->size);
 385       } else {
 386          input->count = input->glarray->StrideB ? max_index + 1 - min_index : 1;
 387          if (input->bo != NULL) {
 388             /* Already-uploaded vertex data is present from a previous
 389              * prepare_vertices, but we had to re-validate state due to
 390              * check_aperture failing and a new batch being produced.
 391              */
 392             continue;
 393          }
 394
 395          /* Queue the buffer object up to be uploaded in the next pass,
 396           * when we've decided if we're doing interleaved or not.
 397           */
 398          if (input->attrib == VERT_ATTRIB_POS) {
 399             /* Position array not properly enabled:
 400              */
 401             if (input->glarray->StrideB == 0) {
 402                intel->Fallback = GL_TRUE; /* boolean, not bitfield */
 403                return;
 404             }
 405
 406             interleave = input->glarray->StrideB;
 407             ptr = input->glarray->Ptr;
 408          }
 409          else if (interleave != input->glarray->StrideB ||
 410                   (const unsigned char *)input->glarray->Ptr - ptr < 0 ||
 411                   (const unsigned char *)input->glarray->Ptr - ptr > interleave)
 412          {
 413             interleave = 0;
 414          }
 415
 416          upload[nr_uploads++] = input;
 417
 418          /* We rebase drawing to start at element zero only when
 419           * varyings are not in vbos, which means we can end up
 420           * uploading non-varying arrays (stride != 0) when min_index
 421           * is zero.  This doesn't matter as the amount to upload is
 422           * the same for these arrays whether the draw call is rebased
 423           * or not - we just have to upload the one element.
 424           */
 425          assert(min_index == 0 || input->glarray->StrideB == 0);
 426       }
 427    }
 428
 429    /* Handle any arrays to be uploaded. */
 430    if (nr_uploads > 1 && interleave && interleave <= 256) {
 431       /* All uploads are interleaved, so upload the arrays together as
 432        * interleaved.  First, upload the contents and set up upload[0].
 433        */
 434       copy_array_to_vbo_array(brw, upload[0], interleave);
 435
 436       for (i = 1; i < nr_uploads; i++) {
 437          /* Then, just point upload[i] at upload[0]'s buffer. */
 438          upload[i]->stride = interleave;
 439          upload[i]->offset = upload[0]->offset +
 440             ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 441          upload[i]->bo = upload[0]->bo;
 442          dri_bo_reference(upload[i]->bo);
 443       }
 444    }
 445    else {
 446       /* Upload non-interleaved arrays */
 447       for (i = 0; i < nr_uploads; i++) {
 448           copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
 449       }
 450    }
 451
 452    brw_prepare_query_begin(brw);
 453
 454    for (i = 0; i < brw->vb.nr_enabled; i++) {
 455       struct brw_vertex_element *input = brw->vb.enabled[i];
 456
 457       brw_add_validated_bo(brw, input->bo);
 458    }
 459 }
 460
 461 static void brw_emit_vertices(struct brw_context *brw)
 462 {
 463    GLcontext *ctx = &brw->intel.ctx;
 464    struct intel_context *intel = intel_context(ctx);
 465    GLuint i;
 466
 467    brw_emit_query_begin(brw);
 468
 469    /* If the VS doesn't read any inputs (calculating vertex position from
 470     * a state variable for some reason, for example), emit a single pad
 471     * VERTEX_ELEMENT struct and bail.
 472     *
 473     * The stale VB state stays in place, but they don't do anything unless
 474     * a VE loads from them.
 475     */
 476    if (brw->vb.nr_enabled == 0) {
 477       BEGIN_BATCH(3);
 478       OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1);
 479       if (IS_GEN6(intel->intelScreen->deviceID)) {
 480          OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 481                    GEN6_VE0_VALID |
 482                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 483                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 484       } else {
 485          OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 486                    BRW_VE0_VALID |
 487                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 488                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 489       }
 490       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 491                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 492                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 493                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 494       ADVANCE_BATCH();
 495       return;
 496    }
 497
 498    /* Now emit VB and VEP state packets.
 499     *
 500     * This still defines a hardware VB for each input, even if they
 501     * are interleaved or from the same VBO.  TBD if this makes a
 502     * performance difference.
 503     */
 504    BEGIN_BATCH(1 + brw->vb.nr_enabled * 4);
 505    OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
 506              ((1 + brw->vb.nr_enabled * 4) - 2));
 507
 508    for (i = 0; i < brw->vb.nr_enabled; i++) {
 509       struct brw_vertex_element *input = brw->vb.enabled[i];
 510       uint32_t dw0;
 511
 512       if (intel->gen >= 6) {
 513          dw0 = GEN6_VB0_ACCESS_VERTEXDATA |
 514             (i << GEN6_VB0_INDEX_SHIFT);
 515       } else {
 516          dw0 = BRW_VB0_ACCESS_VERTEXDATA |
 517             (i << BRW_VB0_INDEX_SHIFT);
 518       }
 519
 520       OUT_BATCH(dw0 |
 521                 (input->stride << BRW_VB0_PITCH_SHIFT));
 522       OUT_RELOC(input->bo,
 523                 I915_GEM_DOMAIN_VERTEX, 0,
 524                 input->offset);
 525       if (intel->gen >= 5) {
 526          OUT_RELOC(input->bo,
 527                    I915_GEM_DOMAIN_VERTEX, 0,
 528                    input->bo->size - 1);
 529       } else
 530           OUT_BATCH(input->stride ? input->count : 0);
 531       OUT_BATCH(0); /* Instance data step rate */
 532    }
 533    ADVANCE_BATCH();
 534
 535    BEGIN_BATCH(1 + brw->vb.nr_enabled * 2);
 536    OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + brw->vb.nr_enabled * 2) - 2));
 537    for (i = 0; i < brw->vb.nr_enabled; i++) {
 538       struct brw_vertex_element *input = brw->vb.enabled[i];
 539       uint32_t format = get_surface_type(input->glarray->Type,
 540                                          input->glarray->Size,
 541                                          input->glarray->Format,
 542                                          input->glarray->Normalized);
 543       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 544       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 545       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 546       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 547
 548       switch (input->glarray->Size) {
 549       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 550       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 551       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 552       case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
 553          break;
 554       }
 555
 556       if (IS_GEN6(intel->intelScreen->deviceID)) {
 557          OUT_BATCH((i << GEN6_VE0_INDEX_SHIFT) |
 558                    GEN6_VE0_VALID |
 559                    (format << BRW_VE0_FORMAT_SHIFT) |
 560                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 561       } else {
 562          OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
 563                    BRW_VE0_VALID |
 564                    (format << BRW_VE0_FORMAT_SHIFT) |
 565                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 566       }
 567
 568       if (intel->gen >= 5)
 569           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 570                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 571                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 572                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 573       else
 574           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 575                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 576                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 577                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 578                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 579    }
 580    ADVANCE_BATCH();
 581 }
 582
 583 const struct brw_tracked_state brw_vertices = {
 584    .dirty = {
 585       .mesa = 0,
 586       .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
 587       .cache = 0,
 588    },
 589    .prepare = brw_prepare_vertices,
 590    .emit = brw_emit_vertices,
 591 };
 592
 593 static void brw_prepare_indices(struct brw_context *brw)
 594 {
 595    GLcontext *ctx = &brw->intel.ctx;
 596    struct intel_context *intel = &brw->intel;
 597    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 598    GLuint ib_size;
 599    dri_bo *bo = NULL;
 600    struct gl_buffer_object *bufferobj;
 601    GLuint offset;
 602    GLuint ib_type_size;
 603
 604    if (index_buffer == NULL)
 605       return;
 606
 607    ib_type_size = get_size(index_buffer->type);
 608    ib_size = ib_type_size * index_buffer->count;
 609    bufferobj = index_buffer->obj;;
 610
 611    /* Turn into a proper VBO:
 612     */
 613    if (!_mesa_is_bufferobj(bufferobj)) {
 614       brw->ib.start_vertex_offset = 0;
 615
 616       /* Get new bufferobj, offset:
 617        */
 618       get_space(brw, ib_size, &bo, &offset);
 619
 620       /* Straight upload
 621        */
 622       drm_intel_gem_bo_map_gtt(bo);
 623       memcpy((char *)bo->virtual + offset, index_buffer->ptr, ib_size);
 624       drm_intel_gem_bo_unmap_gtt(bo);
 625    } else {
 626       offset = (GLuint) (unsigned long) index_buffer->ptr;
 627       brw->ib.start_vertex_offset = 0;
 628
 629       /* If the index buffer isn't aligned to its element size, we have to
 630        * rebase it into a temporary.
 631        */
 632        if ((get_size(index_buffer->type) - 1) & offset) {
 633            GLubyte *map = ctx->Driver.MapBuffer(ctx,
 634                                                 GL_ELEMENT_ARRAY_BUFFER_ARB,
 635                                                 GL_DYNAMIC_DRAW_ARB,
 636                                                 bufferobj);
 637            map += offset;
 638
 639            get_space(brw, ib_size, &bo, &offset);
 640
 641            dri_bo_subdata(bo, offset, ib_size, map);
 642
 643            ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
 644        } else {
 645           bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj),
 646                                       INTEL_READ);
 647           dri_bo_reference(bo);
 648
 649           /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
 650            * the index buffer state when we're just moving the start index
 651            * of our drawing.
 652            */
 653           brw->ib.start_vertex_offset = offset / ib_type_size;
 654           offset = 0;
 655           ib_size = bo->size;
 656        }
 657    }
 658
 659    if (brw->ib.bo != bo ||
 660        brw->ib.offset != offset ||
 661        brw->ib.size != ib_size)
 662    {
 663       drm_intel_bo_unreference(brw->ib.bo);
 664       brw->ib.bo = bo;
 665       brw->ib.offset = offset;
 666       brw->ib.size = ib_size;
 667
 668       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 669    } else {
 670       drm_intel_bo_unreference(bo);
 671    }
 672
 673    brw_add_validated_bo(brw, brw->ib.bo);
 674 }
 675
 676 const struct brw_tracked_state brw_indices = {
 677    .dirty = {
 678       .mesa = 0,
 679       .brw = BRW_NEW_INDICES,
 680       .cache = 0,
 681    },
 682    .prepare = brw_prepare_indices,
 683 };
 684
 685 static void brw_emit_index_buffer(struct brw_context *brw)
 686 {
 687    struct intel_context *intel = &brw->intel;
 688    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 689
 690    if (index_buffer == NULL)
 691       return;
 692
 693    /* Emit the indexbuffer packet:
 694     */
 695    {
 696       struct brw_indexbuffer ib;
 697
 698       memset(&ib, 0, sizeof(ib));
 699
 700       ib.header.bits.opcode = CMD_INDEX_BUFFER;
 701       ib.header.bits.length = sizeof(ib)/4 - 2;
 702       ib.header.bits.index_format = get_index_type(index_buffer->type);
 703       ib.header.bits.cut_index_enable = 0;
 704
 705       BEGIN_BATCH(4);
 706       OUT_BATCH( ib.header.dword );
 707       OUT_RELOC(brw->ib.bo,
 708                 I915_GEM_DOMAIN_VERTEX, 0,
 709                 brw->ib.offset);
 710       OUT_RELOC(brw->ib.bo,
 711                 I915_GEM_DOMAIN_VERTEX, 0,
 712                 brw->ib.offset + brw->ib.size - 1);
 713       OUT_BATCH( 0 );
 714       ADVANCE_BATCH();
 715    }
 716 }
 717
 718 const struct brw_tracked_state brw_index_buffer = {
 719    .dirty = {
 720       .mesa = 0,
 721       .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
 722       .cache = 0,
 723    },
 724    .emit = brw_emit_index_buffer,
 725 };