src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    struct acp_entry;
  56 }
  57
  58 namespace brw {
  59    class fs_live_variables;
  60 }
  61
  62 class fs_reg {
  63 public:
  64    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  65
  66    void init();
  67
  68    fs_reg();
  69    fs_reg(float f);
  70    fs_reg(int32_t i);
  71    fs_reg(uint32_t u);
  72    fs_reg(struct brw_reg fixed_hw_reg);
  73    fs_reg(enum register_file file, int reg);
  74    fs_reg(enum register_file file, int reg, uint32_t type);
  75    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  76
  77    bool equals(const fs_reg &r) const;
  78    bool is_zero() const;
  79    bool is_one() const;
  80    bool is_null() const;
  81    bool is_valid_3src() const;
  82    fs_reg retype(uint32_t type);
  83
  84    /** Register file: GRF, MRF, IMM. */
  85    enum register_file file;
  86    /**
  87     * Register number.  For MRF, it's the hardware register.  For
  88     * GRF, it's a virtual register number until register allocation
  89     */
  90    int reg;
  91    /**
  92     * Offset from the start of the contiguous register block.
  93     *
  94     * For pre-register-allocation GRFs, this is in units of a float per pixel
  95     * (1 hardware register for SIMD8 mode, or 2 registers for SIMD16 mode).
  96     * For uniforms, this is in units of 1 float.
  97     */
  98    int reg_offset;
  99    /** Register type.  BRW_REGISTER_TYPE_* */
 100    int type;
 101    bool negate;
 102    bool abs;
 103    bool sechalf;
 104    struct brw_reg fixed_hw_reg;
 105    int smear; /* -1, or a channel of the reg to smear to all channels. */
 106
 107    /** Value for file == IMM */
 108    union {
 109       int32_t i;
 110       uint32_t u;
 111       float f;
 112    } imm;
 113
 114    fs_reg *reladdr;
 115 };
 116
 117 static const fs_reg reg_undef;
 118 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 119 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 120 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 121
 122 class ip_record : public exec_node {
 123 public:
 124    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 125
 126    ip_record(int ip)
 127    {
 128       this->ip = ip;
 129    }
 130
 131    int ip;
 132 };
 133
 134 class fs_inst : public backend_instruction {
 135 public:
 136    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 137
 138    void init();
 139
 140    fs_inst();
 141    fs_inst(enum opcode opcode);
 142    fs_inst(enum opcode opcode, fs_reg dst);
 143    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 144    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 145    fs_inst(enum opcode opcode, fs_reg dst,
 146            fs_reg src0, fs_reg src1,fs_reg src2);
 147
 148    bool equals(fs_inst *inst);
 149    bool overwrites_reg(const fs_reg &reg);
 150    bool is_send_from_grf();
 151    bool is_partial_write();
 152    int regs_read(fs_visitor *v, int arg);
 153
 154    bool reads_flag();
 155    bool writes_flag();
 156
 157    fs_reg dst;
 158    fs_reg src[3];
 159    bool saturate;
 160    int conditional_mod; /**< BRW_CONDITIONAL_* */
 161
 162    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 163     * mod and predication.
 164     */
 165    uint8_t flag_subreg;
 166
 167    int mlen; /**< SEND message length */
 168    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 169    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 170    uint32_t texture_offset; /**< Texture offset bitfield */
 171    int sampler;
 172    int target; /**< MRT target. */
 173    bool eot;
 174    bool header_present;
 175    bool shadow_compare;
 176    bool force_uncompressed;
 177    bool force_sechalf;
 178    bool force_writemask_all;
 179    uint32_t offset; /* spill/unspill offset */
 180
 181    /** @{
 182     * Annotation for the generated IR.  One of the two can be set.
 183     */
 184    const void *ir;
 185    const char *annotation;
 186    /** @} */
 187 };
 188
 189 /**
 190  * The fragment shader front-end.
 191  *
 192  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 193  */
 194 class fs_visitor : public backend_visitor
 195 {
 196 public:
 197
 198    fs_visitor(struct brw_context *brw,
 199               struct brw_wm_compile *c,
 200               struct gl_shader_program *shader_prog,
 201               struct gl_fragment_program *fp,
 202               unsigned dispatch_width);
 203    ~fs_visitor();
 204
 205    fs_reg *variable_storage(ir_variable *var);
 206    int virtual_grf_alloc(int size);
 207    void import_uniforms(fs_visitor *v);
 208
 209    void visit(ir_variable *ir);
 210    void visit(ir_assignment *ir);
 211    void visit(ir_dereference_variable *ir);
 212    void visit(ir_dereference_record *ir);
 213    void visit(ir_dereference_array *ir);
 214    void visit(ir_expression *ir);
 215    void visit(ir_texture *ir);
 216    void visit(ir_if *ir);
 217    void visit(ir_constant *ir);
 218    void visit(ir_swizzle *ir);
 219    void visit(ir_return *ir);
 220    void visit(ir_loop *ir);
 221    void visit(ir_loop_jump *ir);
 222    void visit(ir_discard *ir);
 223    void visit(ir_call *ir);
 224    void visit(ir_function *ir);
 225    void visit(ir_function_signature *ir);
 226    void visit(ir_emit_vertex *);
 227    void visit(ir_end_primitive *);
 228
 229    uint32_t gather_channel(ir_texture *ir, int sampler);
 230    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 231
 232    bool can_do_source_mods(fs_inst *inst);
 233
 234    fs_inst *emit(fs_inst inst);
 235    fs_inst *emit(fs_inst *inst);
 236    void emit(exec_list list);
 237
 238    fs_inst *emit(enum opcode opcode);
 239    fs_inst *emit(enum opcode opcode, fs_reg dst);
 240    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 241    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 242    fs_inst *emit(enum opcode opcode, fs_reg dst,
 243                  fs_reg src0, fs_reg src1, fs_reg src2);
 244
 245    fs_inst *MOV(fs_reg dst, fs_reg src);
 246    fs_inst *NOT(fs_reg dst, fs_reg src);
 247    fs_inst *RNDD(fs_reg dst, fs_reg src);
 248    fs_inst *RNDE(fs_reg dst, fs_reg src);
 249    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 250    fs_inst *FRC(fs_reg dst, fs_reg src);
 251    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 252    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 253    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 254    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 255    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 256    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 257    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 258    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 259    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 260    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 261    fs_inst *IF(uint32_t predicate);
 262    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 263    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 264                 uint32_t condition);
 265    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 266    fs_inst *DEP_RESOLVE_MOV(int grf);
 267    fs_inst *BFREV(fs_reg dst, fs_reg value);
 268    fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
 269    fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
 270    fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
 271    fs_inst *FBH(fs_reg dst, fs_reg value);
 272    fs_inst *FBL(fs_reg dst, fs_reg value);
 273    fs_inst *CBIT(fs_reg dst, fs_reg value);
 274    fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
 275    fs_inst *ADDC(fs_reg dst, fs_reg src0, fs_reg src1);
 276    fs_inst *SUBB(fs_reg dst, fs_reg src0, fs_reg src1);
 277    fs_inst *SEL(fs_reg dst, fs_reg src0, fs_reg src1);
 278
 279    int type_size(const struct glsl_type *type);
 280    fs_inst *get_instruction_generating_reg(fs_inst *start,
 281                                            fs_inst *end,
 282                                            fs_reg reg);
 283
 284    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 285                                         fs_reg varying_offset,
 286                                         uint32_t const_offset);
 287
 288    bool run();
 289    void assign_binding_table_offsets();
 290    void setup_payload_gen4();
 291    void setup_payload_gen6();
 292    void assign_curb_setup();
 293    void calculate_urb_setup();
 294    void assign_urb_setup();
 295    bool assign_regs(bool allow_spilling);
 296    void assign_regs_trivial();
 297    void get_used_mrfs(bool *mrf_used);
 298    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 299                                    int first_payload_node);
 300    void setup_mrf_hack_interference(struct ra_graph *g,
 301                                     int first_mrf_hack_node);
 302    int choose_spill_reg(struct ra_graph *g);
 303    void spill_reg(int spill_reg);
 304    void split_virtual_grfs();
 305    void compact_virtual_grfs();
 306    void move_uniform_array_access_to_pull_constants();
 307    void setup_pull_constants();
 308    void invalidate_live_intervals();
 309    void calculate_live_intervals();
 310    bool opt_algebraic();
 311    bool opt_cse();
 312    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 313    bool opt_copy_propagate();
 314    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 315    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 316    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 317                                  exec_list *acp);
 318    bool register_coalesce();
 319    bool compute_to_mrf();
 320    bool dead_code_eliminate();
 321    bool dead_code_eliminate_local();
 322    bool remove_dead_constants();
 323    bool remove_duplicate_mrf_writes();
 324    bool virtual_grf_interferes(int a, int b);
 325    void schedule_instructions(instruction_scheduler_mode mode);
 326    void insert_gen4_send_dependency_workarounds();
 327    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 328    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 329    void fail(const char *msg, ...);
 330    void lower_uniform_pull_constant_loads();
 331
 332    void push_force_uncompressed();
 333    void pop_force_uncompressed();
 334
 335    void emit_dummy_fs();
 336    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 337    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 338                          glsl_interp_qualifier interpolation_mode,
 339                          bool is_centroid);
 340    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 341    fs_reg *emit_samplepos_setup(ir_variable *ir);
 342    fs_reg *emit_sampleid_setup(ir_variable *ir);
 343    fs_reg *emit_general_interpolation(ir_variable *ir);
 344    void emit_interpolation_setup_gen4();
 345    void emit_interpolation_setup_gen6();
 346    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 347    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 348                            bool is_rect, int sampler, int texunit);
 349    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 350                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 351    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 352                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 353                               fs_reg sample_index);
 354    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 355                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 356                               fs_reg sample_index, fs_reg mcs);
 357    fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, int sampler);
 358    fs_reg fix_math_operand(fs_reg src);
 359    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 360    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 361    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 362    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 363                     fs_reg src0, fs_reg src1);
 364    bool try_emit_saturate(ir_expression *ir);
 365    bool try_emit_mad(ir_expression *ir, int mul_arg);
 366    void try_replace_with_sel();
 367    bool opt_peephole_sel();
 368    bool opt_peephole_predicated_break();
 369    void emit_bool_to_cond_code(ir_rvalue *condition);
 370    void emit_if_gen6(ir_if *ir);
 371    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
 372                      int count);
 373
 374    void emit_fragment_program_code();
 375    void setup_fp_regs();
 376    fs_reg get_fp_src_reg(const prog_src_register *src);
 377    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 378    void emit_fp_alu1(enum opcode opcode,
 379                      const struct prog_instruction *fpi,
 380                      fs_reg dst, fs_reg src);
 381    void emit_fp_alu2(enum opcode opcode,
 382                      const struct prog_instruction *fpi,
 383                      fs_reg dst, fs_reg src0, fs_reg src1);
 384    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 385                              fs_reg dst, fs_reg src);
 386    void emit_fp_scalar_math(enum opcode opcode,
 387                             const struct prog_instruction *fpi,
 388                             fs_reg dst, fs_reg src);
 389
 390    void emit_fp_minmax(const struct prog_instruction *fpi,
 391                        fs_reg dst, fs_reg src0, fs_reg src1);
 392
 393    void emit_fp_sop(uint32_t conditional_mod,
 394                     const struct prog_instruction *fpi,
 395                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 396
 397    void emit_color_write(int target, int index, int first_color_mrf);
 398    void emit_alpha_test();
 399    void emit_fb_writes();
 400
 401    void emit_shader_time_begin();
 402    void emit_shader_time_end();
 403    void emit_shader_time_write(enum shader_time_shader_type type,
 404                                fs_reg value);
 405
 406    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 407                             fs_reg dst, fs_reg offset, fs_reg src0,
 408                             fs_reg src1);
 409
 410    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 411                                   fs_reg offset);
 412
 413    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 414                                fs_reg dst,
 415                                fs_reg src,
 416                                fs_inst *pre_rhs_inst,
 417                                fs_inst *last_rhs_inst);
 418    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 419                                const glsl_type *type, bool predicated);
 420    void resolve_ud_negate(fs_reg *reg);
 421    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 422
 423    fs_reg get_timestamp();
 424
 425    struct brw_reg interp_reg(int location, int channel);
 426    void setup_uniform_values(ir_variable *ir);
 427    void setup_builtin_uniform_values(ir_variable *ir);
 428    int implied_mrf_writes(fs_inst *inst);
 429
 430    void dump_instruction(backend_instruction *inst);
 431
 432    void visit_atomic_counter_intrinsic(ir_call *ir);
 433
 434    struct gl_fragment_program *fp;
 435    struct brw_wm_compile *c;
 436    unsigned int sanity_param_count;
 437
 438    int param_size[MAX_UNIFORMS * 4];
 439
 440    int *virtual_grf_sizes;
 441    int virtual_grf_count;
 442    int virtual_grf_array_size;
 443    int *virtual_grf_start;
 444    int *virtual_grf_end;
 445    brw::fs_live_variables *live_intervals;
 446
 447    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 448     * the visitor to the packed uniform number after
 449     * remove_dead_constants() that represents the actual uploaded
 450     * uniform index.
 451     */
 452    int *params_remap;
 453    int nr_params_remap;
 454
 455    struct hash_table *variable_ht;
 456    fs_reg frag_depth;
 457    fs_reg sample_mask;
 458    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 459    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 460    fs_reg dual_src_output;
 461    int first_non_payload_grf;
 462    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 463    int max_grf;
 464
 465    fs_reg *fp_temp_regs;
 466    fs_reg *fp_input_regs;
 467
 468    /** @{ debug annotation info */
 469    const char *current_annotation;
 470    const void *base_ir;
 471    /** @} */
 472
 473    bool failed;
 474    char *fail_msg;
 475
 476    /* Result of last visit() method. */
 477    fs_reg result;
 478
 479    fs_reg pixel_x;
 480    fs_reg pixel_y;
 481    fs_reg wpos_w;
 482    fs_reg pixel_w;
 483    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 484    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 485    fs_reg shader_start_time;
 486
 487    int grf_used;
 488    bool spilled_any_registers;
 489
 490    const unsigned dispatch_width; /**< 8 or 16 */
 491
 492    int force_uncompressed_stack;
 493 };
 494
 495 /**
 496  * The fragment shader code generator.
 497  *
 498  * Translates FS IR to actual i965 assembly code.
 499  */
 500 class fs_generator
 501 {
 502 public:
 503    fs_generator(struct brw_context *brw,
 504                 struct brw_wm_compile *c,
 505                 struct gl_shader_program *prog,
 506                 struct gl_fragment_program *fp,
 507                 bool dual_source_output);
 508    ~fs_generator();
 509
 510    const unsigned *generate_assembly(exec_list *simd8_instructions,
 511                                      exec_list *simd16_instructions,
 512                                      unsigned *assembly_size);
 513
 514 private:
 515    void generate_code(exec_list *instructions);
 516    void generate_fb_write(fs_inst *inst);
 517    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 518    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 519                          struct brw_reg *src);
 520    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 521    void generate_math1_gen7(fs_inst *inst,
 522                             struct brw_reg dst,
 523                             struct brw_reg src);
 524    void generate_math2_gen7(fs_inst *inst,
 525                             struct brw_reg dst,
 526                             struct brw_reg src0,
 527                             struct brw_reg src1);
 528    void generate_math1_gen6(fs_inst *inst,
 529                             struct brw_reg dst,
 530                             struct brw_reg src);
 531    void generate_math2_gen6(fs_inst *inst,
 532                             struct brw_reg dst,
 533                             struct brw_reg src0,
 534                             struct brw_reg src1);
 535    void generate_math_gen4(fs_inst *inst,
 536                            struct brw_reg dst,
 537                            struct brw_reg src);
 538    void generate_math_g45(fs_inst *inst,
 539                           struct brw_reg dst,
 540                           struct brw_reg src);
 541    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 542    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 543                      bool negate_value);
 544    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 545    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 546    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 547    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 548                                             struct brw_reg index,
 549                                             struct brw_reg offset);
 550    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 551                                                  struct brw_reg dst,
 552                                                  struct brw_reg surf_index,
 553                                                  struct brw_reg offset);
 554    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 555                                             struct brw_reg index,
 556                                             struct brw_reg offset);
 557    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 558                                                  struct brw_reg dst,
 559                                                  struct brw_reg index,
 560                                                  struct brw_reg offset);
 561    void generate_mov_dispatch_to_flags(fs_inst *inst);
 562
 563    void generate_set_omask(fs_inst *inst,
 564                            struct brw_reg dst,
 565                            struct brw_reg sample_mask);
 566
 567    void generate_set_sample_id(fs_inst *inst,
 568                                struct brw_reg dst,
 569                                struct brw_reg src0,
 570                                struct brw_reg src1);
 571
 572    void generate_set_simd4x2_offset(fs_inst *inst,
 573                                     struct brw_reg dst,
 574                                     struct brw_reg offset);
 575    void generate_discard_jump(fs_inst *inst);
 576
 577    void generate_pack_half_2x16_split(fs_inst *inst,
 578                                       struct brw_reg dst,
 579                                       struct brw_reg x,
 580                                       struct brw_reg y);
 581    void generate_unpack_half_2x16_split(fs_inst *inst,
 582                                         struct brw_reg dst,
 583                                         struct brw_reg src);
 584
 585    void generate_shader_time_add(fs_inst *inst,
 586                                  struct brw_reg payload,
 587                                  struct brw_reg offset,
 588                                  struct brw_reg value);
 589
 590    void generate_untyped_atomic(fs_inst *inst,
 591                                 struct brw_reg dst,
 592                                 struct brw_reg atomic_op,
 593                                 struct brw_reg surf_index);
 594
 595    void generate_untyped_surface_read(fs_inst *inst,
 596                                       struct brw_reg dst,
 597                                       struct brw_reg surf_index);
 598
 599    void mark_surface_used(unsigned surf_index);
 600
 601    void patch_discard_jumps_to_fb_writes();
 602
 603    struct brw_context *brw;
 604    struct gl_context *ctx;
 605
 606    struct brw_compile *p;
 607    struct brw_wm_compile *c;
 608
 609    struct gl_shader_program *prog;
 610    struct gl_shader *shader;
 611    const struct gl_fragment_program *fp;
 612
 613    unsigned dispatch_width; /**< 8 or 16 */
 614
 615    exec_list discard_halt_patches;
 616    bool dual_source_output;
 617    void *mem_ctx;
 618 };
 619
 620 bool brw_do_channel_expressions(struct exec_list *instructions);
 621 bool brw_do_vector_splitting(struct exec_list *instructions);
 622 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
 623
 624 struct brw_reg brw_reg_from_fs_reg(fs_reg *reg);